HV513 HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect Features General Description ❑ HVCMOS‚ technology The HV513 is a low voltage serial to high voltage parallel converter with 8 high voltage push-pull outputs. This device has been designed to drive small capacitve loads such as piezoelectric transducers. It can also be used in any application requiring multiple high voltage outputs, with medium current source and sink capabilities. ❑ Operating output voltage of 250V ❑ Low power level shifting from 5V to 250V ❑ Shift register speed 8MHz @ VDD=5V ❑ 8 latch data outputs The device consists of an 8-bit shift register, 8 latches, and control logic to perform the polarity select and blanking of the outputs. Data is shifted through the shift register on the low to high transition of the clock. A data output buffer is provided for cascading devices. Operation of the shift register is not affected by the /LE, /BL, /POL, or the /HI-Z control inputs. Transfer of data from the shift register to the latch occurs when the /LE is high. The data in the latch is stored when /LE is low. A high-Z, /HI-Z, pin is provided to set all the outputs in a high-Z state. ❑ Output polarity and blanking ❑ CMOS compatible inputs ❑ Output short circuit detect ❑ Output high-Z control Applications ❏ Piezoelectric transducer driver All outputs have short circuit protection that detects if the outputs have reached the required output state. If output does not track the required state, then the /SHORT pin will be low. This output will pulse low during the output transistion period under normal operation; see SC Timing Diagram for details. ❏ Weaving applications ❏ Braille ❏ Printers ❏ MEMs All outputs will have a break-before-make circuitry to reduce cross-over current during output state changes. ❏ Displays Note: All logic control inputs have internal 20k-ohm pull-up resistors. Top Block Diagram VDD 8 Level translator 8 Output control 8 8-bit latch HVOUT1 8-bit shift register DIN CLK DOUT VPP • • • • • • HVOUT8 GND LE* BL* POL* Hi-Z* Short* 02/11/02 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. 1 HV513 DC Electrical Characteristics (Over operating supply voltages unless otherwise noted) Symbol Parameter Min Typ Max Units 4 mA Conditions IDD VDD supply current IDDQ Quiescent VDD supply current IPP VPP supply current 100 µA VPP=250V, fOUT=300Hz, no load IPPQ Quiescent VPP supply current 100 µA VPP=240V, outputs static IIH High-level logic input current 10 µA VIH=VDD IIL Low-level logic input current VOH VOL 0.1 2.0 -10 -350 140 HVOUT High-level output Data out Low-level output fCLK=8MHz, LE*=LOW All VIN=VDD mA All VIN=0V VIL=0V µA VIL=0V, for inputs w/pull-up resistors VPP =200V, IHVOUT=-20mA V VDD-1V HVOUT 60 Data out 1.0 IDOUT=-0.1mA VDD =4.5V, IHVOUT=20mA V IDOUT=0.1mA DC Electrical Characteristics (Over operating supply voltages unless otherwise noted) Symbol fCLK fOUT Parameter Min Clock frequency Typ 0 Output switching frequency (SOA limited) Max Units 8 MHz 300 Hz tW Clock width high and low 62 ns tSU Data setup time before clock rises 15 ns tH Data hold time after clock rises 30 ns tWLE Width of latch enable pulse 80 ns tDLE /LE delay time after rising edge of clock 35 ns tSLE /LE setup time before rising edge of clock 40 ns tOR, tOF Conditions CL=50nF, VPP=200V Rise/fall time of HVOUT 1000 µs td ON/OFF Delay time for output to start rise/fall 500 ns tDHL Delay time clock to DOUT high to low 110 ns CL=15pF tDLH Delay time clock to DOUT low to high 110 ns CL=15pF tR, tF All logic inputs 5 ns Output short circuit detection 500 ns Short to output fall of /SHORT, CL=15pF tSC Output short circuit clear 1000 ns Short clear to output rise of /SHORT tHI-Z Output high-Z state 500 ns tSD CL=100nF, VPP=200V Ordering Information Absolute Maximum Ratings* Supply Voltage, VDD -0.5V to 6V Device Part Number Package Supply Voltage, VPP VDD to 275V HV513 HV513WG 24 Lead SOW Logic input levels Ground current High voltage supply current Continuous total power dissipation Operating temperature range Storage temperature range -0.5V to VDD+0.5V 0.3A 0.25A 750mW -40°C to +85°C -65°C +150°C * All voltages are referenced to device ground. 2 HV513 Operating Supply Voltages Symbol Parameter Min Typ Max Units 5.0 5.5 V VDD Logic supply voltage 4.5 VPP High voltage supply 30 250 V VIH High-level input voltage VDD-0.9 VDD V VIL Low-level input voltage 0 0.9 V TA Operating free-air temperature -40 +85 °C Conditions Note 1 Notes: 1. Below minimum VPP the output may not switch. 2. Power-up sequence should be the following: 1. Connect ground. 2. Apply V DD. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. 4. Apply VPP. Power-down sequence should be the reverse of the above. Input and Output Equivalent Circuits VDD VDD 20kΩ VPP * Data Out Input GND GND Logic Inputs HVOUT HVGND Logic Data Output * POL, BL, LE, and HI-Z 3 High Voltage Outputs HV513 Switching Waveforms VIH Data Input 50% Data Valid 50% VIL tSU tH VIH CLK 50% 50% 50% tWL 50% VIL tWH VOH 50% VOL tDLH Data Out VOH 50% VOL tDHL LE VIL tWLE tDLE tSLE 90% 10% HVOUT w/ S/R LOW tdOFF HVOUT w/ S/R HIGH 90% 10% tOR LE VH POL BL VL VIH VIL tHI-Z VOH Within xV of rail VOL tSD tSC Short Detect VH VL If the output is not within 5V to 10V of the desired output state, the SHORT signal goes LOW. 4 VOL VOH VOL Short Circuit Detect Detail Timing (HV513) Hi-Z VOH tOF tdON HVOUT VIH 50% 50% HV513 Functional Block Diagram POL BL LE VPP DIN HVOUT1 L/T CLK 8-Bit Static Shift Register 8 Latches 6 Additional Outputs HVOUT8 L/T DOUT HI-Z Short Detect Short POL, BL, LE, and HI-Z have internal 20kΩ pull-up resistors. Function Table Data CLK /LE /BL /POL /HI-Z Shift Reg 1 2…8 HV Outputs 1 2..8 Data Out * All on X X X L L H * *…* H H…H * All off X X X L H H * *…* L L…L * Invert mode X X L H L H * *…* * *…* (b) * H or L ➔ Outputs L H H H H or L *…* * *…* * X X L H H H * *…* * *…* * X X L H L H * *…* * *…* (b) * L ➔ ➔ Inputs H H H H L *…* L *…* * H H H H H *…* H *…* * * * Function Load S/R Store Data in latches Transparent mode H X X X X X L * *…* Outputs ON X X X X X H * *…* * *…* ➔ Outputs High-Z High impedance outputs 5 HV513 Pin Configuration Pin Function 1 N/C 2 VDD 3 DOUT 4 BL 5 POL 6 CLK 7 Package Outline 1 24 2 23 3 22 4 21 5 20 6 19 LE 7 18 8 SHORT 8 17 9 HI-Z 9 16 10 DIN 10 15 11 LGND 11 14 12 N/C 12 13 13 HVGND 14 HVGND 15 HVout1 16 HVout2 17 HVout3 18 HVout4 19 HVout5 20 HVout6 21 HVout7 22 HVout8 23 VPP 24 VPP 24-Lead SOW Package (WG) (Wide Body) 02/11/02 ©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 6 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com