Not for new design, this product will be obsoleted soon S593T/S593TR/S593TRW Vishay Semiconductors MOSMIC® for TV-Tuner Prestage with 5 V Supply Voltage 2 1 Comments MOSMIC - MOS Monolithic Integrated Circuit Features • • • • • • • • • SOT143 3 Integrated gate protection diodes Low noise figure e3 High gain Biasing network on chip Improved cross modulation at gain reduction High AGC-range SMD package Lead (Pb)-free component Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC 4 2 1 SOT143R 4 3 1 2 SOT343R 4 3 19216 Electrostatic sensitive device. Observe precautions for handling. Applications Mechanical Data Low noise gain controlled input stages in UHF-and VHF- tuner with 5 V supply voltage. Typ: S593T Case: SOT-143 Plastic case Weight: approx. 8.0 mg Pinning: 1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1 Typ: S593TR Case: SOT-143R Plastic case Weight: approx. 8.0 mg Pinning: 1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1 Typ: S593TRW Case: SOT-343R Plastic case Weight: approx. 6.0 mg Pinning: 1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1 Typical Application RFC C block AGC VDD(VDS) D G2 RF out RF in G1 C block Document Number 85047 Rev. 1.6, 08-Sep-08 S C block 94 9296 www.vishay.com 1 S593T/S593TR/S593TRW Vishay Semiconductors Parts Table Part Marking Package S593T 593 SOT-143 S593TR 93R SOT-143R S593TRW W93 SOT-343R Absolute Maximum Ratings Tamb = 25 °C, unless otherwise specified Parameter Test condition Symbol Value VDS 8 V ID 30 mA ± IG1/G2SM 10 mA Drain - source voltage Drain current Gate 1/Gate 2 - source peak current Gate 1/Gate 2 - source voltage Total power dissipation Unit ± VG1/G2SM 6 V Ptot 200 mW Tamb ≤ 60 °C Channel temperature TCh 150 °C Storage temperature range Tstg - 55 to + 150 °C Symbol Value Unit RthChA 450 K/W Maximum Thermal Resistance Parameter Channel ambient 1) Test condition 1) on glass fibre printed board (25 x 20 x 1.5) mm3 plated with 35 μm Cu Electrical DC Characteristics Tamb = 25 °C, unless otherwise specified Max Unit Gate 1 - source breakdown voltage Parameter ± IG1S = 10 mA, VG2S = VDS = 0 ± V(BR)G1SS Test condition 7 10 V Gate 2 - source breakdown voltage ± IG2S = 10 mA, VG1S = VDS = 0 ± V(BR)G2SS 7 10 V + IG1SS 50 μA - VG1S = 5 V, VG2S = VDS = 0 - IG1SS 100 μA Gate 2 - source leakage current ± VG2S = 5 V, VG1S = VDS = 0 ± IG2SS 20 nA 500 μA 18 mA Gate 1 - source leakage current + VG1S = 5 V, VG2S = VDS = 0 Drain current VDS = 5 V, VG1S = 0, VG2S = 4 V Symbol Min IDSS 50 9 Self-biased operating current VDS = 5 V, VG1S = nc, VG2S = 4 V IDSP Gate 2 - source cut-off voltage VDS = 5 V, VG1S = nc, ID = 20 μA VG2S(OFF) Typ. 13 1.0 V Caution for Gate 1 switch-off mode: No external DC-voltage on Gate 1 in active mode! Switch-off at Gate 1 with VG1S < 0.7 V is feasible. Using open collector switching transistor (inside of PLL), insert 10 kΩ collector resistor. www.vishay.com 2 Document Number 85047 Rev. 1.6, 08-Sep-08 S593T/S593TR/S593TRW Vishay Semiconductors Electrical AC Characteristics Tamb = 25 °C, unless otherwise specified VDS = 5 V, VG2S = 4 V, ID= IDSP , f = 1 MHz Symbol Min Typ. Max Unit Forward transadmittance Parameter Test condition |y21s| 35 40 50 mS Gate 1 input capacitance Cissg1 3.2 pF Feedback capacitance Crss 30 fF Output capacitance Coss 1.5 pF GS = 2 mS, GL = 0.5 mS, f = 200 MHz Gps 28 dB GS = 3,3 mS, GL = 1 mS, f = 800 MHz Gps 20 23 dB ΔGps 40 Power gain AGC range VG2S = 1 to 4 V, f = 800 MHz dB Noise figure GS = 2 mS, GL = 0.5 mS, f = 200 MHz F 1 dB GS = 3.3 mS, GL = 1 mS, f = 800 MHz F 1.3 dB Common Emitter S-Parameters f/MHz S11 S21 LOG MAG ANG 50 -0.02 100 150 S12 LOG MAG ANG -6.1 11.83 -0.06 -12.3 -0.17 -18.2 200 -0.29 250 300 S22 LOG MAG ANG LOG MAG ANG 172.1 -61.74 89.0 -0.07 -3.0 11.72 163.6 11.53 154.8 -55.68 87.3 -0.10 -6.0 -52.35 86.2 -0.15 -23.9 11.35 -8.8 146.8 -50.26 86.0 -0.19 -11.8 -0.41 -29.7 -0.59 -35.1 11.10 138.4 -48.69 86.2 -0.26 -14.7 10.83 130.7 -47.51 87.6 -0.33 350 -0.75 -17.3 -40.5 10.50 123.3 -46.72 89.9 -0.38 400 -20.0 -0.92 -45.7 10.18 115.6 -45.95 93.1 -0.47 -22.6 450 -1.10 -50.6 9.82 108.8 -45.27 97.4 -0.53 -27.6 500 -1.30 -55.5 9.51 101.8 -44.56 102.7 -0.60 -30.2 550 -1.46 -60.2 9.19 95.1 -43.72 109.4 -0.65 -33.1 600 -1.63 -64.9 8.78 88.2 -42.33 114.3 -0.72 -35.1 650 -1.79 -69.1 8.47 82.4 -41.42 116.7 -0.78 -37.6 700 -1.94 -73.5 8.14 76.1 -40.50 121.0 -0.82 -40.3 750 -2.12 -77.6 7.89 70.0 -39.46 125.4 -0.84 -42.8 800 -2.23 -81.7 7.56 63.7 -38.31 128.9 -0.87 -45.5 850 -2.37 -85.9 7.29 57.3 -37.06 131.4 -0.91 -48.2 900 -2.45 -89.8 6.93 50.6 -35.80 132.9 -0.97 -51.0 950 -2.56 -93.9 6.60 44.0 -34.52 132.4 -1.03 -54.1 1000 -2.70 -97.8 6.26 38.4 -33.56 131.2 -1.04 -56.8 1050 -2.81 -101.6 5.95 32.4 -32.82 131.0 -1.07 -59.3 1100 -2.92 -105.2 5.61 26.0 -32.10 131.9 -1.16 -59.3 1150 -3.02 -108.7 5.36 18.9 -31.19 132.0 -1.18 -62.4 1200 -3.05 -112.3 5.05 12.3 -30.25 132.5 -1.19 -66.0 1250 -3.09 -115.9 4.80 4.8 -29.32 131.9 -1.21 -69.8 1300 -3.16 -119.4 4.33 -2.6 -28.56 130.9 -1.31 -72.9 deg Document Number 85047 Rev. 1.6, 08-Sep-08 deg deg deg www.vishay.com 3 S593T/S593TR/S593TRW Vishay Semiconductors 250 y21s – Forward Transadmittance ( mS ) Ptot - Total Power Dissipation ( mW ) Typical Characteristics (Tamb = 25 °C unless otherwise specified) 200 150 100 50 0 0 25 50 75 100 20 10 0 0 16 12 V G2S = 4 V 8 2V 4 0 1 2 3 4 2 1 V DS = 5 V f = 200 MHz 0 2 3 6 5 4 Figure 5. Gate 1 Input Capacitance vs. Gate 2 Source Voltage Coss – Output Capacitance ( pF ) 2 V DS = 5 V ID – Drain Current ( mA ) 1 V G2S – Gate 2 Source Voltage ( V ) 95 11165 20 16 12 8 4 1.5 1 0.5 V G2S = 4 V f = 200 MHz 0 0 0 1 2 3 4 V G2S - Gate 2 Source V oltage ( V ) Figure 3. Drain Current vs. Gate 2 Source Voltage www.vishay.com 4 4 0 Figure 2. Drain Current vs. Drain Source Voltage 95 11163 3 3 5 V DS – Drain Source Voltage ( V ) 95 11162 2 4 1V 0 1 V G2S – Gate 2 Source Voltage ( V ) Figure 4. Forward Transadmittance vs. Gate 2 Source Voltage Cissg1 – Gate 1 Input Capacitance ( pF 20 ID – Drain Current ( mA ) 30 95 11164 Figure 1. Total Power Dissipation vs. Ambient Temperature 3V V DS = 5 V f = 200 MHz 150 125 Tamb – AmbientTemperature (° C ) 95 10759 40 3 95 11166 4 5 7 6 V DS – Drain Source Voltage ( V ) Figure 6. Output Capacitance vs. Drain Source Voltage Document Number 85047 Rev. 1.6, 08-Sep-08 S593T/S593TR/S593TRW Vishay Semiconductors S21 2 - Transducer Gain ( dB ) 20 V DS = 5 V f = 800 MHz 0 -20 -40 -60 0 1 2 3 4 V G2S - Gate 2 Source V oltage ( V ) 95 11167 Figure 7. Transducer Gain vs. Gate 2 Source Voltage CM – Cross Modulation ( dB ) 80 60 40 20 V DS = 5 V f = 800 MHz 0 2 95 11168 3 4 5 6 V G2S – Gate 2 Source Voltage ( V ) Figure 8. Cross Modulation vs. Gate 2 Source Voltage Document Number 85047 Rev. 1.6, 08-Sep-08 www.vishay.com 5 S593T/S593TR/S593TRW Vishay Semiconductors VDS = 10 V, ID = 10 mA, Z0 = 50 Ω S11 S12 j 90° 120° j0.5 60° j2 1300 MHz 150° j0.2 30° j5 1050 800 0 0.2 0.5 1 2 ∞ 5 180° 50 50 –j0.2 0.02 0.04 0° –j5 300 1300 MHz 1050 800 550 –j0.5 550 –150° –30° –j2 –120° –j 12 928 –60° –90° 12 929 Figure 11. Reverse Transmission Coefficient Figure 9. Input Reflection Coefficient S21 S22 j 120° 300 150 ° 90° j0.5 60° 550 30° 800 j2 j5 j0.2 1050 180 ° 50 1300 MHz 4 0° 0 0.2 0.5 1 2 5 50 ∞ 300 –150 ° –30 ° –120 ° 12 930 –90 ° –60 ° Figure 10. Forward Transmission Coefficient www.vishay.com 6 –j0.2 550 800 –j0.5 12 931 1050 1300 MHz –j5 –j2 –j Figure 12. Output Reflection Coefficient Document Number 85047 Rev. 1.6, 08-Sep-08 S593T/S593TR/S593TRW Vishay Semiconductors Package Dimensions in mm 96 12239 0.5 [0.020] 0.35 [0.014] 0.5 [0.020] 0.35 [0.014] 1.1 [0.043] 0.9 [0.035] 0.08 [0.003] 0.15 [0.006] 3 [0.118] 2.8 [0.110] 0.1 [0.004] max. Package Dimensions in mm 2.6 [0.102] 2.35 [0.093] 1.8 [0.071] 1.6 [0.063] 0.5 [0.020] 0.35 [0.014] 0.9 [0.035] 0.75 [0.030] foot print recommendation: 96 12240 Document Number 85047 Rev. 1.6, 08-Sep-08 0.8 [0.031] 1.2 [0.047] 0.8 [0.031] 0.8 [0.031] 2 [0.079] 2 [0.079] 1.8 [0.071] 0.9 [0.035] 0.9 [0.035] 1.4 [0.055] 1.2 [0.047] 1.7 [0.067] 1.9 [0.075] www.vishay.com 7 S593T/S593TR/S593TRW Vishay Semiconductors Package Dimensions in mm 96 12238 www.vishay.com 8 Document Number 85047 Rev. 1.6, 08-Sep-08 S593T/S593TR/S593TRW Vishay Semiconductors Ozone Depleting Substances Policy Statement It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Document Number 85047 Rev. 1.6, 08-Sep-08 www.vishay.com 9 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1