BTS 4880 R Smart Power High-Side-Switch Eight Channels: 8 x 200 mΩ Features Product Summary • Output current 0,625 A per channel Overvoltage protection Vbb(AZ) • Short circuit protection Operating voltage Vbb(on) 11...45 V • Maximum current internally limited On-state resistance RON 47 200 V mΩ • Overload protection • Input protection • Overvoltage protection (including load dump) • Undervoltage shutdown with autorestart and hysteresis • Switching inductive loads • Thermal shutdown with restart P-DSO-36-12; -10 • Thermal independence of separate channels • ESD - Protection • Loss of GND and loss of Vbb protection • Very low standby current • Reverse battery protection • Programmable input for CMOS or Vbb /2 • Common diagnostic output ( current output ) for overtemperature Application • Output driver for industrial applications ( PLC ) • All types of resistive, inductive and capacitive loads • µC or optocoupler compatible power switch for 24 V DC applications • Replaces electromechanical relays and discrete circuits General Description N channel vertical power FET with charge pump, ground referenced CMOS or Vbb/2 compatible input and common diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions. Page 1 2004-01-27 BTS 4880 R Block Diagram D IA G V bb LS Input Level S hifter U ndervoltage C om m on shutdow n D iagnostic Logic each channel Logic each channel w ith restart Logic each channel C urrent lim it O vervoltage source protection G ate protection Lim it for unclam ped ind. loads C harge pum p Level shifter Logic each channel V oltage O U T1 Tem perature sensor R ectifier O U T2 IN 1 ESD Logic R IN OUT3 IN 2 O U T4 IN 3 C hannel 2...7 O U T5 IN 4 O U T6 IN 5 O U T7 IN 6 C urrent lim it IN 7 C harge pum p Level shifter G ate protection Lim it for unclam ped ind. loads OUT8 T em perature sensor R ectifier IN 8 ESD Logic R IN m iniP R O FET GND S ignal G N D Page 2 2004-01-27 BTS 4880 R Pin Symbol Function 1,2,4,5 NC not connected 3 LS Enable pin for switching the input-levels to V bb/2 6 IN1 Input, activates channel 1 in case of logic high signal 7 IN2 Input, activates channel 2 in case of logic high signal 8 IN3 Input, activates channel 3 in case of logic high signal 9 IN4 Input, activates channel 4 in case of logic high signal 10 IN5 Input, activates channel 5 in case of logic high signal 11 IN6 Input, activates channel 6 in case of logic high signal 12 IN7 Input, activates channel 7 in case of logic high signal 13 IN8 Input, activates channel 8 in case of logic high signal 14-18 NC not connected 19 GND Logic ground 20 DIAG Common diagnostic output for overtemperature 21 OUT8 High-side output of channel 8 22 OUT8 High-side output of channel 8 23 OUT7 High-side output of channel 7 24 OUT7 High-side output of channel 7 25 OUT6 High-side output of channel 6 26 OUT6 High-side output of channel 6 27 OUT5 High-side output of channel 5 28 OUT5 High-side output of channel 5 29 OUT4 High-side output of channel 4 30 OUT4 High-side output of channel 4 31 OUT3 High-side output of channel 3 32 OUT3 High-side output of channel 3 33 OUT2 High-side output of channel 2 34 OUT2 High-side output of channel 2 35 OUT1 High-side output of channel 1 36 OUT1 High-side output of channel 1 TAB Vbb Positive power supply voltage Page 3 2004-01-27 BTS 4880 R Maximum Ratings Parameter Symbol Value Unit at Tj = -40...135 °C, unless otherwise specified Supply voltage Vbb -1 1)...45 Continuous input voltage2) VIN -10...V bb Continuous voltage at LS-pin VLS -1...Vbb Load current (Short - circuit current, see page 6) IL self limited Current through input pin (DC), each channel IIN ±5 mA Reverse current through GND-pin 1) -IGND 1.6 A Operating temperature Tj internal limited °C Storage temperature Tstg -55 ... +150 Power dissipation 3) Ptot 3.3 Inductive load switch-off energy dissipation 4) EAS single pulse, Tj = 125 °C, IL = 0.625 A one channel active V A W J 10 all channels simultaneously active ( each channel ) Load dump protection 4) VLoadDump5)= VA + VS 1 V VLoaddump VIN= low or high td = 400 ms, RI = 2 Ω, RL = 27 Ω, VA = 13.5 V 90 td = 350 ms, RI = 2 Ω, RL = 47 Ω, VA = 27 V 117 Electrostatic discharge voltage (Human Body Model) kV VESD according to ANSI EOS/ESD - S5.1 - 1993 ESD STM5.1 - 1998 Input pin, LS pin, Common diagnostic pin ±1 all other pins ±5 Continuous reverse drain current1)4), each channel IS 4 A 1defined by P tot 2At V > Vbb, the input current is not allowed to exceed ±5 mA. IN 3 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for drain connection. PCB is vertical without blown air. 4not subject to production test, specified by design 5V Loaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 . Supply voltages higher than Vbb(AZ) require an external current limit for the GND pin, e.g. with a 150Ω resistor in GND connection. A resistor for the protection of the input is integrated. Page 4 2004-01-27 BTS 4880 R Electrical Characteristics Parameter Symbol at Tj = -25...125°C, Vbb=15...30V, unless otherwise specified Values Unit min. typ. max. Thermal Characteristics Thermal resistance junction - case RthJC - - 1.5 Thermal resistance @ min. footprint Rth(JA) - - 50 Thermal resistance @ 6 cm 2 cooling area 1) Rth(JA) - - 38 K/W Load Switching Capabilities and Characteristics On-state resistance RON mΩ Tj = 25 °C, IL = 0.5 A - 150 200 Tj = 125 °C - 270 320 ton - 50 100 toff - 75 150 dV/dton - 1 2 -dV/dtoff - 1 2 Turn-on time to 90% VOUT µs RL = 47 Ω, V IN = 0 to 10 V Turn-off time to 10% VOUT RL = 47 Ω, V IN = 10 to 0 V Slew rate on 10 to 30% VOUT , V/µs RL = 47 Ω, V bb = 15 V Slew rate off 70 to 40% V OUT, RL = 47 Ω, V bb = 15 V 1 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for drain connection. PCB is vertical without blown air. Page 5 2004-01-27 BTS 4880 R Electrical Characteristics Parameter Symbol at Tj = -25...125°C, Vbb=15...30V, unless otherwise specified Values Unit min. typ. max. Operating Parameters Operating voltage Vbb(on) 11 - 45 V Undervoltage shutdown Vbb(under) 7 - 10.5 Undervoltage restart Vbb(u rst) - - 11 Undervoltage hysteresis ∆Vbb(under) - 0.5 - Standby current Ibb(off) - 50 150 µA Operating current 1) IGND - 5 12 mA Leakage output current (included in Ibb(off)) IL(off) - 5 10 µA ∆Vbb(under) = Vbb(u rst) - Vbb(under) VIN = low , each channel Protection Functions2) Initial peak short circuit current limit A IL(SCp) Tj = -25 °C, Vbb = 30 V, tm = 700 µs - - 1.9 Tj = 25 °C - 1.4 - Tj = 125 °C 0.7 - - - 1.1 - Repetitive short circuit current limit IL(SCr) Tj = Tjt (see timing diagrams) Output clamp (inductive load switch off) VON(CL) 47 53 60 at VOUT = Vbb - VON(CL), Overvoltage protection 3) Vbb(AZ) 47 - - Thermal overload trip temperature 4) Tjt 135 - - °C Thermal hysteresis ∆Tjt - 10 - K V 1contains all input currents 2Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 3 see also V ON(CL) in circuit diagram on page 10 4 higher operating temperature at normal function for each channel available Page 6 2004-01-27 BTS 4880 R Electrical Characteristics Parameter Symbol at Tj = -25...125°C, Vbb=15...30V, unless otherwise specified Values Unit min. typ. max. -10 - Vbb Input Continuous input voltage1) VIN Input turn-on threshold voltage CMOS 2) VIN(T+) - - 2.2 Input turn-off threshold voltage CMOS 2) VIN(T-) 0.8 - - Input turn-on threshold voltage V bb/2 2) VIN(T+) - - V bb/2+1 Input turn-off threshold voltage Vbb/22) VIN(T-) V bb/2-1 - - Input threshold hysteresis ∆VIN(T) - 0.3 - Off state input current CMOS ( each channel ) IIN(off) 8 - - On state input current CMOS ( each channel ) IIN(on) - - 70 Off state input current V bb/2 ( each channel ) On state input current Vbb/2 ( each channel ) IIN(off) 80 - - IIN(on) - - 260 Input delay time at switch on Vbb td(Vbbon) 150 340 - µs Input resistance (see page 10) RI 2 3 4 kΩ Internal pull down resistor at LS-pin 3) RLS 300 800 - I diag 2 3 4 mA I diag(high) - - 2 µA V µA Diagnostic Characteristics Common diagnostic output current 4) ( overtemperature of any channel ) Tj = 135 °C Common diagnostic output leakage current 1At V > Vbb, the input current is not allowed to exceed ±5 mA. IN 2see page 9 3LS-pin is connected to V bb 4see page 10 Page 7 2004-01-27 BTS 4880 R Electrical Characteristics Parameter Symbol at Tj = -25...125°C, Vbb=15...30V, unless otherwise specified Values min. typ. Unit max. Reverse Battery Reverse battery voltage1) V -Vbb RGND = 0 Ω - - 1 RGND = 150 Ω - - 45 - - 1.2 Diode forward on voltage -VON IF = 1.25 A, VIN = low , each channel 1defined by P tot Page 8 2004-01-27 BTS 4880 R Truth table for common diagnostic pin ( LED-driver ): Input Output level level Normal L L L operation H H L Short circuit L L L to GND H L L Undervoltage L L L H L L L L L H L H1) Overtemperature Diagnostic L = no diagnostic output current H = diagnostic output current typ. 2 mA (see page 7) Programmable input: IN Logic LS Input Level Shifter V bb GND typ . 800 kΩ Functional description LS-Pin: With using the LS-pin it is possible to change the input turn-on and -off threshold voltage between CMOS and half supply voltage level. Therefore you have either to connect the LS-pin to GND ( state 1 ) or to supply voltage ( state 2 ). If the LS-pin is not connected the input threshold voltages are automatically at CMOS level, caused by an internal pull down to GND with typ. 800k Ω ( see circuit ). State 1: LS-Pin to GND State 2: LS-Pin to supply voltage CMOS - Input level Vbb/2 - Input level 1toggeling with restart Page 9 2004-01-27 BTS 4880 R Terms each channel Inductive and overvoltage output clamp each channel Ibb LS I IN Vbb + Vbb I DIAG V DIAG IL IN1...8 V bb PROFET Z V VON ON OUT1...8 OUT GND V GND IN I GND VOUT VON clamped to 47 V min. Input circuit (ESD protection) each channel Overvoltage protection of logic part + Vbb V bb R IN V Z2 IN I L o g ic ST I I GND GND R GND o p tio n a l The use of ESD zener diodes as voltage clamp at DC conditions is not recommended S ig n a l G N D VZ2=Vbb(AZ)=47 V min., RI =3 kΩ typ., RGND=150Ω Reverse battery protection each channel - Vbb IN Common diagnostic output Vbb RI OUT Power In v e r s e D io d e L o g ic Logic DIAG GND RGND RL o p ti o n a l S ig n a l G N D ESD Power GND RGND=150Ω, RI=3kΩ typ., Temperature protection is not active during inverse current Output current typ. 2 mA Page 10 2004-01-27 BTS 4880 R GND disconnect Inductive Load switch-off energy dissipation, each channel E bb DIAG Vbb LS IN1...8 E AS IN GND V V bb PROFET OUT L = V GND IN E Load Vbb OUT1...8 PROFET GND ZL { EL ER RL GND disconnect with GND pull up Energy stored in load inductance: EL = ½ * L * IL2 LS Vbb IN1...8 PROFET DIAG OUT1...8 While demagnetizing load inductance, the enérgy dissipated in PROFET is E AS = E bb + EL - ER = VON(CL) * iL(t) dt, with an approximate solution for RL > 0Ω: GND E AS = V ST V IN V bb IL * R L IL * L ) * ( V b b + | V O U T ( C L )| ) * ln (1 + | V O U T ( C L )| 2 * RL V GND Vbb disconnect with charged inductive load LS Vbb high IN1...8 PROFET DIAG OUT1...8 GND V bb Page 11 2004-01-27 BTS 4880 R Typ. on-state resistance Typ. on-state resistance RON = f(Tj) ; Vbb = 15V ; V in = high RON = f(Vbb ); IL = 0.5A ; Vin = high 0.3 0.3 125°C Ω RON RON Ω 0.2 0.2 25°C 0.15 0.15 0.1 0.1 0.05 0.05 0 -25 0 25 50 75 0 10 125 °C -25°C 15 20 25 30 35 40 Tj V Vbb 50 Typ. initial peak short circuit current limit Typ. input delay time at switch on V bb IL(SCp) = f(Tj) ; Vbb = 24V td(Vbbon) = f(Vbb); Tj = -25...125 °C 2 0.5 A ms td(Vbbon) IL(SCp) 1.6 1.4 1.2 0.3 1 0.8 0.2 0.6 0.4 0.1 0.2 0 -25 0 25 50 75 0 10 125 °C Tj Page 12 15 20 25 30 35 40 V Vbb 50 2004-01-27 BTS 4880 R Typ. turn on time Typ. turn off time ton = f(Tj ); RL = 47Ω toff = f(Tj); RL = 47Ω 100 100 µs 80 80 70 70 toff ton µs 60 60 50 50 40 40 30 30 20 20 10 10 0 -25 0 25 50 75 0 -25 125 °C 0 25 50 75 125 °C Tj Tj Typ. slew rate on Typ. slew rate off dV/dton = f(T j) ; RL = 47 Ω, Vbb = 15 V dV/dtoff = f(Tj); R L = 47 Ω, V bb = 15 V 1 1.4 V/s -dV dtoff dV dton V/s 0.6 1 0.8 0.6 0.4 0.4 0.2 0.2 0 -25 0 25 50 75 0 -25 125 °C Tj 0 25 50 75 125 °C Tj Page 13 2004-01-27 BTS 4880 R Typ. standby current Typ. leakage current Ibb(off) = f(Tj ) ; Vbb = 30V ; VIN = low I L(off) = f(Tj) ; Vbb = 30V ; VIN = low 4 50 µA µA I L(off) Ibb(off) 3 30 2.5 2 20 1.5 1 10 0.5 0 -25 0 25 50 75 0 -25 125 °C 0 25 50 75 125 °C Tj Tj Typ. common diagnostic output current Typ. internal pull down resistor at LS-pin Idiag = f(Vbb ) ; Tj = 135°C RLS = f(Vbb ); VLS = Vbb 3 1.5 MΩ RLS I diag mA 2.8 125°C 1 25°C 0.75 -25°C 2.7 0.5 2.6 2.5 10 0.25 15 20 25 30 35 0 10 45 V Vbb Page 14 15 20 25 30 35 40 V Vbb 50 2004-01-27 BTS 4880 R Typ. input current @ CMOS level Typ. input current @ CMOS level IIN(on/off) = f(Tj); Vbb = 15V; VIN = low/high I IN = f(VIN); V bb = 15V VINlow ≤ 0,8V; VINhigh = 2,2V 50 50 -25°C µA on 25°C IIN IIN µA 30 off 20 20 10 10 0 -25 0 25 50 75 0 0 125 °C 125°C 30 2.5 5 7.5 10 15 V Tj VIN Typ. input current @ Vbb/2 level Typ. input current @ V bb/2 level IIN(on/off) = f(Tj); Vbb = 30V; VIN = low/high I IN = f(VIN); V bb = 30 V 180 200 µA µA -25°C on off 25°C 150 120 I IN I IN 140 125 125°C 100 100 80 75 60 50 40 25 20 0 -25 0 25 50 75 0 0 125 °C Tj 5 10 15 20 30 V VIN Page 15 2004-01-27 BTS 4880 R Typ. input threshold voltage Typ. input threshold voltage @ CMOS level @ CMOS level VIN(th) = f(Tj ) ; Vbb = 15V VIN(th) = f(Vbb) ; Tj = 25°C 2 2 V V on on 1.6 VIN(th) VIN(th) 1.5 1.4 off 1.2 1 off 1.25 1 0.8 0.75 0.6 0.5 0.4 0.25 0.2 0 -25 0 25 50 75 0 10 125 °C 15 20 25 30 35 40 Tj V Vbb Typ. input threshold voltage Typ. input threshold voltage @ Vbb/2 level @ Vbb/2 level: LS-pin connected to V bb VIN(th) = f(V bb) ; Tj = 25°C VIN(th) = f(Tj ) ; Vbb = 30V 16 25 V V 50 on 20 VIN(th) VIN(th) 15 off 14.5 on 17.5 off 14 15 13.5 12.5 13 10 12.5 7.5 12 -25 0 25 50 75 5 10 125 °C Tj Page 16 15 20 25 30 35 40 V Vbb 50 2004-01-27 BTS 4880 R Maximum allowable load inductance Maximum allowable inductive switch-off for a single switch off, calculated energy, single pulse L = f(IL); Tjstart =125°C, Vbb=24V, RL=0Ω EAS = f(IL ); Tjstart = 125°C, Vbb = 24V 45 3.5 all channels simultaneously active H all channels simultaneously active J 35 2.5 L EAS 30 2 25 20 1.5 15 1 10 0.5 5 0 200 300 400 500 600 0 200 800 mA 300 400 IL 500 600 IL Typ. transient thermal impedance Typ. transient thermal impedance Z thJA=f(tp) @ min. footprint Z thJA=f(tp) @ 6cm 2 heatsink area Parameter: D=tp/T Parameter: D=tp/T 10 2 K/W 10 1 10 2 K/W D = 0.5 D = 0.5 D = 0.2 10 1 D = 0.05 D = 0.02 D = 0.2 D = 0.1 Z thJA Z thJA D = 0.1 10 0 800 mA D = 0.05 10 0 D = 0.02 D = 0.01 D = 0.01 10 -1 10 -1 D=0 D=0 10 -2 -7 -6 -5 -4 -3 -2 -1 0 1 2 10 10 10 10 10 10 10 10 10 10 s 10 4 tp 10 -2 -7 -6 -5 -4 -3 -2 -1 0 1 2 10 10 10 10 10 10 10 10 10 10 s 10 tp Page 17 2004-01-27 4 BTS 4880 R Timing diagrams Figure 1a: Vbb turn on: Figure 2b: Switching a lamp IN IN Vb b V I L I OUT L D IA G t DIAG t d (V b b o n ) Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition Figure 2c: Switching an inductive load IN V IN O U T VO U T 90% t on d V /d to n 10% d V / d to ff t o ff IL IL t D IA G D IAG Page 18 2004-01-27 BTS 4880 R Figure 3a: Turn on into short circuit, shut down by overtemperature, restart by cooling Figure 3b: Short circuit in on-state shut down by overtemperature, restart by cooling IN V IN V OUT OUT n o rm a l o p e r a tio n O u tp u t s h o r t to G N D I L I L (S C p ) I I O u tp u t s h o r t to G N D L I L (S C r) L (S C r) D IA G D IA G t t Heating up of the chip may require several milliseconds, depending on external conditions. Figure 4: Overtemperature: Reset if Tj < Tjt Figure 5: Undervoltage shutdown and restart IN IN Vbb V OUT 10,5V Vout TJ DIAG t D IA G t t d(Vbbon) Page 19 2004-01-27 BTS 4880 R Package and ordering code all dimensions in mm Ordering code: Q67060-S7020 +0.1 1.3 C B 6.3 0 15.74 ±0.1 (Heatslug) 0.1 11±0.15 1) 2.8 3.5 max. 1.1±0.1 0.95 ±0.15 14.2 ±0.3 0.25 B 0.1 C 36x Seating Plane 3.2 ±0.1 19 CODE 5.9 ±0.1 13.7 -0.2 36 5˚ ±0.3˚ 15.9 ±0.1 1) A +0.07 0.25 -0.02 BTS 4880 R Index Marking 1 0.65 18 +0.13 0.25 1 × 45˚ 0.25 M C A B 17 × 0.65 = 11.05 1) Does not include plastic or metal protrusion of 0.15 max. per side Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 München © Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Page 20 2004-01-27