Order this document by MMBT3906LT1/D SEMICONDUCTOR TECHNICAL DATA PNP Silicon COLLECTOR 3 Motorola Preferred Device 1 BASE 2 EMITTER MAXIMUM RATINGS 3 1 Rating Symbol Value Unit Collector – Emitter Voltage VCEO –40 Vdc Collector – Base Voltage VCBO –40 Vdc Emitter – Base Voltage VEBO –5.0 Vdc IC –200 mAdc Symbol Max Unit Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C PD 225 mW 1.8 mW/°C Thermal Resistance Junction to Ambient RqJA 556 °C/W PD 300 mW 2.4 mW/°C RqJA 417 °C/W TJ, Tstg – 55 to +150 °C Collector Current — Continuous 2 CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB) THERMAL CHARACTERISTICS Characteristic Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance Junction to Ambient Junction and Storage Temperature DEVICE MARKING MMBT3906LT1 = 2A ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max –40 — –40 — –5.0 — — –50 — –50 Unit OFF CHARACTERISTICS Collector – Emitter Breakdown Voltage(3) (IC = –1.0 mAdc, IB = 0) V(BR)CEO Collector – Base Breakdown Voltage (IC = –10 mAdc, IE = 0) V(BR)CBO Emitter – Base Breakdown Voltage (IE = –10 mAdc, IC = 0) V(BR)EBO Base Cutoff Current (VCE = –30 Vdc, VEB = –3.0 Vdc) IBL Collector Cutoff Current (VCE = –30 Vdc, VEB = –3.0 Vdc) ICEX Vdc Vdc Vdc nAdc nAdc 1. FR– 5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. 3. Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. Thermal Clad is a trademark of the Bergquist Company. Preferred devices are Motorola recommended choices for future use and best overall value. REV 1 Motorola Small–Signal Transistors, FETs and Diodes Device Data Motorola, Inc. 1996 1 MMBT3906LT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Max 60 80 100 60 30 — — 300 — — — — –0.25 –0.4 –0.65 — –0.85 –0.95 250 — — 4.5 — 10 2.0 12 0.1 10 100 400 3.0 60 — 4.0 Unit ON CHARACTERISTICS(3) DC Current Gain (IC = –0.1 mAdc, VCE = –1.0 Vdc) (IC = –1.0 mAdc, VCE = –1.0 Vdc) (IC = –10 mAdc, VCE = –1.0 Vdc) (IC = –50 mAdc, VCE = –1.0 Vdc) (IC = –100 mAdc, VCE = –1.0 Vdc) HFE Collector – Emitter Saturation Voltage (IC = –10 mAdc, IB = –1.0 mAdc) (IC = –50 mAdc, IB = –5.0 mAdc) VCE(sat) Base – Emitter Saturation Voltage (IC = –10 mAdc, IB = –1.0 mAdc) (IC = –50 mAdc, IB = –5.0 mAdc) VBE(sat) — Vdc Vdc SMALL– SIGNAL CHARACTERISTICS Current – Gain — Bandwidth Product (IC = –10 mAdc, VCE = –20 Vdc, f = 100 MHz) fT Output Capacitance (VCB = –5.0 Vdc, IE = 0, f = 1.0 MHz) Cobo Input Capacitance (VEB = –0.5 Vdc, IC = 0, f = 1.0 MHz) Cibo Input Impedance (IC = –1.0 mAdc, VCE = –10 Vdc, f = 1.0 kHz) hie Voltage Feedback Ratio (IC = –1.0 mAdc, VCE = –10 Vdc, f = 1.0 kHz) hre Small – Signal Current Gain (IC = –1.0 mAdc, VCE = –10 Vdc, f = 1.0 kHz) hfe Output Admittance (IC = –1.0 mAdc, VCE = –10 Vdc, f = 1.0 kHz) hoe Noise Figure (IC = –100 mAdc, VCE = –5.0 Vdc, RS = 1.0 kΩ, f = 1.0 kHz) NF MHz pF pF kΩ X 10– 4 — mmhos dB SWITCHING CHARACTERISTICS Delay Time Rise Time Storage Time Fall Time 3. Pulse Test: Pulse Width (VCC = –3.0 Vdc, VBE = 0.5 Vdc, IC = –10 mAdc, IB1 = –1.0 mAdc) td — 35 tr — 35 (VCC = –3.0 Vdc, IC = –10 mAdc, IB1 = IB2 = –1.0 mAdc) ts — 225 tf — 75 v 300 ms, Duty Cycle v 2.0%. ns ns 3V 3V < 1 ns +9.1 V 275 275 < 1 ns +0.5 V 10 k 10 k 0 CS < 4 pF* 10.6 V 300 ns DUTY CYCLE = 2% 1N916 10 < t1 < 500 ms DUTY CYCLE = 2% t1 CS < 4 pF* 10.9 V * Total shunt capacitance of test jig and connectors Figure 1. Delay and Rise Time Equivalent Test Circuit 2 Figure 2. Storage and Fall Time Equivalent Test Circuit Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT3906LT1 TYPICAL TRANSIENT CHARACTERISTICS 10 5000 7.0 3000 2000 Cobo 5.0 Q, CHARGE (pC) CAPACITANCE (pF) TJ = 25°C TJ = 125°C Cibo 3.0 2.0 VCC = 40 V IC/IB = 10 1000 700 500 300 200 QT QA 1.0 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 REVERSE BIAS (VOLTS) 100 70 50 20 30 40 1.0 2.0 3.0 Figure 3. Capacitance 5.0 7.0 10 20 30 50 70 100 IC, COLLECTOR CURRENT (mA) 200 Figure 4. Charge Data 500 500 IC/IB = 10 300 200 VCC = 40 V IB1 = IB2 300 200 tr @ VCC = 3.0 V 15 V 30 20 t f , FALL TIME (ns) TIME (ns) IC/IB = 20 100 70 50 100 70 50 30 20 IC/IB = 10 40 V 10 7 5 2.0 V td @ VOB = 0 V 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 10 7 5 1.0 2.0 3.0 5.0 7.0 10 20 30 IC, COLLECTOR CURRENT (mA) Figure 5. Turn – On Time Figure 6. Fall Time Motorola Small–Signal Transistors, FETs and Diodes Device Data 200 50 70 100 IC, COLLECTOR CURRENT (mA) 3 MMBT3906LT1 TYPICAL AUDIO SMALL–SIGNAL CHARACTERISTICS NOISE FIGURE VARIATIONS (VCE = – 5.0 Vdc, TA = 25°C, Bandwidth = 1.0 Hz) 12 SOURCE RESISTANCE = 200 W IC = 1.0 mA 4.0 f = 1.0 kHz SOURCE RESISTANCE = 200 W IC = 0.5 mA 3.0 SOURCE RESISTANCE = 2.0 k IC = 50 mA 2.0 SOURCE RESISTANCE = 2.0 k IC = 100 mA 1.0 0 0.1 0.2 0.4 IC = 1.0 mA 10 NF, NOISE FIGURE (dB) NF, NOISE FIGURE (dB) 5.0 IC = 0.5 mA 8 6 IC = 50 mA 4 IC = 100 mA 2 1.0 2.0 4.0 10 f, FREQUENCY (kHz) 20 40 0 100 0.1 0.2 0.4 1.0 2.0 4.0 10 20 Rg, SOURCE RESISTANCE (k OHMS) Figure 7. 40 100 Figure 8. h PARAMETERS (VCE = – 10 Vdc, f = 1.0 kHz, TA = 25°C) 100 hoe, OUTPUT ADMITTANCE (m mhos) h fe , DC CURRENT GAIN 300 200 100 70 50 70 50 30 20 10 7 30 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5 5.0 7.0 10 0.1 0.2 Figure 9. Current Gain h re , VOLTAGE FEEDBACK RATIO (X 10 –4 ) h ie , INPUT IMPEDANCE (k OHMS) 10 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) Figure 11. Input Impedance 4 5.0 7.0 10 Figure 10. Output Admittance 20 0.3 0.2 0.3 0.5 0.7 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 7.0 10 10 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 7.0 10 Figure 12. Voltage Feedback Ratio Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT3906LT1 h FE, DC CURRENT GAIN (NORMALIZED) TYPICAL STATIC CHARACTERISTICS 2.0 TJ = +125°C VCE = 1.0 V +25°C 1.0 0.7 – 55°C 0.5 0.3 0.2 0.1 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 IC, COLLECTOR CURRENT (mA) 20 30 70 50 100 200 VCE, COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 13. DC Current Gain 1.0 TJ = 25°C 0.8 IC = 1.0 mA 10 mA 30 mA 100 mA 0.6 0.4 0.2 0 0.01 0.02 0.03 0.05 0.07 0.2 0.3 0.5 IB, BASE CURRENT (mA) 0.1 0.7 1.0 2.0 3.0 5.0 7.0 10 Figure 14. Collector Saturation Region TJ = 25°C V, VOLTAGE (VOLTS) 0.8 q V , TEMPERATURE COEFFICIENTS (mV/°C) 1.0 VBE(sat) @ IC/IB = 10 VBE @ VCE = 1.0 V 0.6 0.4 VCE(sat) @ IC/IB = 10 0.2 0 1.0 2.0 50 5.0 10 20 IC, COLLECTOR CURRENT (mA) 100 200 Figure 15. “ON” Voltages Motorola Small–Signal Transistors, FETs and Diodes Device Data 1.0 0.5 qVC FOR VCE(sat) 0 +25°C TO +125°C – 55°C TO +25°C – 0.5 +25°C TO +125°C – 1.0 – 55°C TO +25°C qVB FOR VBE(sat) – 1.5 – 2.0 0 20 40 60 80 100 120 140 IC, COLLECTOR CURRENT (mA) 160 180 200 Figure 16. Temperature Coefficients 5 MMBT3906LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 6 SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT3906LT1 PACKAGE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 3 B S 1 V 2 G C D H K J CASE 318–08 SOT–23 (TO–236AB) ISSUE AE Motorola Small–Signal Transistors, FETs and Diodes Device Data DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60 STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR 7 MMBT3906LT1 Motorola reserves the right to make changes without further notice to any products herein. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 8 ◊ *MMBT3906LT1/D* Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBT3906LT1/D