MAXIM MAX4588EWI

19-1425; Rev 0; 1/99
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
Features
The MAX4588 low-voltage, dual 4-channel multiplexer
is designed for RF and video signal processing at frequencies up to 180MHz in 50Ω and 75Ω systems. A
flexible digital interface allows control of on-chip functions through either a parallel interface or an SPI™/
MICROWIRE™ serial port.
♦ Low Insertion Loss: -2.5dB up to 100MHz
Each channel of the MAX4588 is designed using a “T”
switch configuration, ensuring excellent high-frequency
off-isolation. The MAX4588 has low on-resistance of
60Ω max, with an on-resistance match across all channels of 4Ω max. Additionally, on-resistance is flat
across the specified signal range (2Ω max). The offleakage current is under 1nA at TA = +25°C, and less
than 10nA at TA = +85°C.
The MAX4588 operates from single +2.7V to +12V or
dual ±2.7V to ±6V supplies. When operating with a +5V
supply, the inputs maintain TTL- and CMOS-level compatibility. The MAX4588 is available in 28-pin narrow
DIP, wide SO, and space-saving SSOP packages.
♦ 180MHz -3dB Signal Bandwidth
Applications
♦ High Off-Isolation: -74dB at 10MHz
♦ Low Crosstalk: -70dB up to 10MHz
♦ 16MHz -0.1dB Signal Bandwidth
♦ 60Ω (max) On-Resistance with ±5V Supplies
♦ 4Ω (max) On-Resistance Matching with ±5V
Supplies
♦ 2Ω (max) On-Resistance Flatness with ±5V
Supplies
♦ +2.7V to +12V Single Supply
±2.7V to ±6V Dual Supplies
♦ Low Power Consumption: <20µW
♦ Rail-to-Rail®, Bidirectional Signal Handling
♦ Parallel or SPI/MICROWIRE-Compatible Serial
Interface
RF Switching
Automatic Test Equipment
♦ >±2kV ESD Protection per Method 3015.7
Video Signal Routing
Networking
♦ TTL/CMOS-Compatible Inputs with VL = +5V
High-Speed Data Acquisition
Pin Configuration
TOP VIEW
GND 1
MAX4588
COM1 2
28 COM2
27 V-
Ordering Information
PART
TEMP. RANGE
MAX4588CAI
0°C to +70°C
28 SSOP
PIN-PACKAGE
MAX4588CWI
0°C to +70°C
28 Wide SO
28 Narrow Plastic DIP
MAX4588CPI
0°C to +70°C
V+ 3
26 NO5
MAX4588EAI
-40°C to +85°C
28 SSOP
NO1 4
25 GND
MAX4588EWI
-40°C to +85°C
28 Wide SO
GND 5
24 NO6
MAX4588EPI
-40°C to +85°C
28 Narrow Plastic DIP
NO2 6
23 GND
GND 7
22 NO7
NO3 8
21 GND
GND 9
20 NO8
NO4 10
19 VL
4/8 11
RS 12
LE/CS 13
18 SER/PAR
CONTROL
LOGIC
A2/SCLK 14
17 EN
16 A0/DOUT
15 A1/DIN
SSOP/SO/DIP
SPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
MAX4588
General Description
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND)
V+ ........................................................................-0.3V to +13.0V
VL .......................-0.3V to (V+ + 0.3V) or 7V (whichever is lower)
V- ........................................................................-13.0V to +0.3V
V+ to V-................................................................-0.3V to +13.0V
VNO_, VCOM_ (Note 1) ..........................(V- - 0.3V) to (V+ + 0.3V)
4/8, RS, LE/CS, A2/SCLK, A1/DIN,
A0/DOUT, EN, SER/PAR to GND ...............-0.3V to (V+ + 0.3V)
Continuous Current into Any Terminal..............................±20mA
Peak Current into Any Terminal
(pulsed at 1ms, 10% duty cycle)..................................±40mA
ESD per Method 3015.7.......................................................±2kV
Continuous Power Dissipation (TA = +70°C)
SSOP (derate 9.52mW/°C above +70°C) ....................762mW
Wide SO (derate 12.50mW/°C above +70°C)................1.00W
Plastic DIP (derate 14.29mW/°C above +70°C) ............1.14W
Operating Temperature Ranges
MAX4588C_ I ......................................................0°C to +70°C
MAX4588E_ I ...................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Note 1: Voltages on these pins exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current
rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Dual Supplies
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C, V+ = VL = +5V, V- = -5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
V+
V
60
Ω
ANALOG
ANALOG SWITCH
Analog Signal Range
(Note 3)
On-Resistance
On-Resistance Match Between
Channels (Note 4)
VCOM_,
VNO
V-
RON
V+ = 5V, V- = -5V, VNO_ = ±2V,
ICOM_ = 4mA
+25°C
∆RON
V+ = 5V, V- = 5V, VNO_ = ±2V,
ICOM_ = 4mA
+25°C
40
C, E
75
1
C, E
4
5
On-Resistance Flatness
(Note 5)
RFLAT(ON)
V+ = 5V; V- = -5V; VNO_ = 1V, 0, -1V;
ICOM_ = 1mA
+25°C
0.5
NO_ Off-Leakage Current
(Note 6)
INO_(OFF)
V+ = 5.5V, V- = -5.5V,
– 4.5V
VCOM_ = ±4.5V, VNO_ = +
+25°C
-1
C, E
-10
COM_ Off-Leakage Current
(Note 6)
ICOM_(OFF)
V+ = 5.5V, V- = -5.5V,
– 4.5V
VCOM_ = ±4.5V, VNO_ = +
+25°C
-2
C, E
-20
COM_ On-Leakage Current
(Note 6)
ICOM_(ON)
V+ = 5.5V, V- = -5.5V, VCOM_ = ±4.5V, +25°C
VNO_ = ±4.5V or floating
C, E
C, E
2.5
3
-2
0.01
1
10
0.01
2
20
0.01
-20
2
20
Ω
Ω
nA
nA
nA
LOGIC INPUTS
INPUTS (4/8,
(Pins RS,
11 LE/CS, A2/SCLK, A1/DIN, A0/DOUT, EN, SER/PAR)
LOGIC
Input Logic Threshold High
VINH
C, E
Input Logic Threshold Low
VINL
C, E
2.4
1.5
Input Threshold Hysteresis
Input Current
1.7
V
0.8
V
1
µA
0.4
V
0.2
IIN
VIN_ = 0 or VL
C, E
-1
0.03
V
OUTPUT(SERIAL
(SERIAL INTERFACE)
LOGIC OUTPUT
DOUT Logic Low Output
VOL
ISINK = 3.2mA
C, E
DOUT Logic High Output
VOH
ISOURCE = -1mA
C, E
2
VL - 1
_______________________________________________________________________________________
V
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C, V+ = VL = +5V, V- = -5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
SWITCH DYNAMIC
DYNAMICCHARACCHARACTERISTICS
SWITCH
Turn-On Time
tON
VNO_ = 3V, V+ = 4.5V, V- = -4.5V,
Figure 1
+25°C
Turn-Off Time
tOFF
VNO_ = 3V, V+ = 4.5V, V- = -4.5V,
Figure 1
+25°C
Break-Before-Make Time Delay
(Note 3)
tBBM
VNO_ = ±3V, V+ = 5.5V, V- = -5.5V,
Figure 2
Charge Injection
Q
CL = 1.0nF, VNO_ = 0, RS = 0,
Figure 3
380
C, E
150
C, E
C, E
550
600
300
350
10
ns
ns
180
ns
+25°C
15
pC
NO_ Off-Capacitance
CNO_(OFF) VNO_ = 0, fIN = 1MHz, Figure 4
+25°C
2
pF
COM_ Off-Capacitance
CCOM_(OFF) VCOM_ = 0, fIN = 1MHz, Figure 4
+25°C
4
pF
COM_ On-Capacitance
CCOM_(ON) VCOM_ = 0, fIN = 1MHz, Figure 4
+25°C
7
pF
-74
dB
-70
dB
Off-Isolation (Note 7)
VISO
VNO_ = 1VRMS, f = 10MHz,
all channels off, Figure 5
+25°C
Channel-to-Channel Crosstalk
VCT
VNO_ = 1VRMS, f = 10MHz, Figure 5
+25°C
4-channel mode
180
-3dB Bandwidth
BW
Figure 5
-0.1dB Bandwidth
BW
Figure 5
A_, EN to LE Rise Setup Time
tDS
Figure 6
C, E
80
ns
A_, EN to LE Rise Hold Time
tDH
Figure 6
C, E
0
ns
LE Low Pulse Width
tL
Figure 6
C, E
80
ns
RS Low Pulse Width
tRS
Figure 6
C, E
80
ns
Operating Frequency
fCLK
Figure 7
C, E
SCLK Pulse Width High
tCH
Figure 7
C, E
80
ns
SCLK Pulse Width Low
tCL
Figure 7
C, E
80
ns
DIN to SCLK Rise Setup Time
tDS
Figure 7
C, E
60
ns
DIN to SCLK Rise Hold Time
tDH
Figure 7
C, E
0
ns
tCSS0
Figure 7
C, E
50
CL = 50pF, Figure 7
C, E
8-channel mode
4-channel mode
8-channel mode
+25°C
MHz
140
16
+25°C
MHz
11
PARALLEL-INTERFACE
TIMING
PARALLEL
MODE INPUT TIM-
SERIAL-INTERFACE
SERIAL PERIPHERAL TIMING
INTER-
CS Fall to SCLK Rise Setup Time
SCLK Rise to DOUT Valid
tDO
6.25
MHz
ns
150
ns
CS Rise to SCLK Rise Hold Time
tCSH1
Figure 7
C, E
0
ns
CS Rise to SCLK Rise Setup
Time
tCSS1
Figure 7
C, E
80
ns
CS Fall to SCLK Rise Hold Time
tCSS1
Figure 7
C, E
80
ns
tRS
Figure 6
C, E
80
ns
RS Low Pulse Width
_______________________________________________________________________________________
3
MAX4588
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = VL = +4.5V to +5.5V, V- = -4.5V to -5.5V, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C, V+ = VL = +5V, V- = -5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
POWERSUPPLY
SUPPLY
POWER
Power-Supply Range
V+, V-
±2.7
±6
VL
2.7
V+
V+ Supply Current
I+
V+ = 5.5V, V- = -5.5V
V - Supply Current
I-
V+ = 5.5V, V- = -5.5V
V+ = 5.5V
VL Supply Current
IL
VL = 5.5V, all VIN_ = 0 or VL
+25°C
-1
C, E
-10
+25°C
-1
C, E
-10
C, E
-10
0.0001
1
10
0.0001
1
10
2
10
V
µA
µA
µA
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA
= +25°C, V+ = VL = +5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
V+
V
120
Ω
ANALOG
ANALOG SWITCH
Analog Signal Range (Note 3)
On-Resistance
On-Resistance Match Between
Channels (Note 4)
VCOM_,
VNO_
0
RON
V+ = 5V, VNO_ = 3V, ICOM_ = 4mA
∆RON
V+ = 5V, VNO_ = 3V, ICOM_ = 4mA
+25°C
80
C, E
150
+25°C
1
C, E
8
10
On-Resistance Flatness
(Note 5)
RFLAT(ON)
COM_ = 4mA,
V+ = 5V, ICOM_
VNO_ = 2V, 3V, 4V
+25°C
4
NO_ Off Leakage Current
(Notes 6, 9)
INO_(OFF)
V+ = 5.5V; VCOM_ = 4.5V, 1V;
VNO_ = 1V, 4.5V
+25°C
-1
C, E
-10
COM_ Off Leakage Current
(Notes 6, 9)
ICOM(OFF)
V+ = 5.5V; VCOM_ = 4.5V, 1V;
VNO_ = 1V, 4.5V
+25°C
-2
C, E
-20
COM_ On Leakage Current
(Notes 6, 9)
ICOM_(ON)
V+ = 5.5V; VCOM_ = 4.5V, 1V;
VNO_ = 4.5V, 1V, or floating
+25°C
-2
C, E
-20
2.4
C, E
10
12
0.005
1
10
0.005
2
20
0.005
2
20
Ω
Ω
nA
nA
nA
LOGIC INPUTS
INPUTS(Pins
(4/8, 11
RS,through
LE/CS, A2/SCLK, A1/DIN, A0/DOUT, EN, SER/PAR)
Input Logic Threshold High
VINH
C, E
Input Logic Threshold Low
VINL
C, E
1.5
Input Threshold Hysteresis
Input Current
1.7
V
0.8
0.2
IIN
VIN = 0 or VL
C, E
-1
V
V
1
µA
0.4
V
LOGIC
LOGIC OUTPUT
OUTPUT (SERIAL
(SERIAL INTERFACE)
DOUT Logic Low Output
VOL
ISINK = 3.2mA
C, E
DOUT Logic High Output
VOH
ISOURCE = -1mA
C, E
4
VL - 1
_______________________________________________________________________________________
V
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA
= +25°C, V+ = VL = +5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
SWITCH DYNAMIC
DYNAMICCHARACCHARACTERISTICS
SWITCH
Turn-On Time
tON
VNO_ = 3V, V+ = 4.5V, Figure 1
Turn-Off Time
tOFF
VNO_ = 3V, V+ = 4.5V, Figure 1
Break-Before-Make Time Delay
(Note 3)
tBBM
VNO_ = 3V, V+ = 5.5V, Figure 2
Charge Injection
Q
+25°C
550
C, E
+25°C
150
C, E
C, E
800
900
300
350
10
ns
ns
200
ns
CL = 1.0nF, VNO_ = 2.5V, RS = 0,
Figure 3
+25°C
5
pC
-65
dB
-70
dB
Off-Isolation
VISO
VNO_ = 1VRMS, f = 10MHz,
all channels off, Figure 5
+25°C
Channel-to-Channel Crosstalk
VCT
VNO_ = 1VRMS, f = 10MHz, Figure 5
+25°C
4-channel mode
-3dB Bandwidth
BW
Figure 5
-0.1dB Bandwidth
BW
Figure 5
A_, EN to LE Rise Setup Time
tDS
Figure 6
C, E
A_, EN to LE Rise Hold Time
8-channel mode
4-channel mode
8-channel mode
100
+25°C
MHz
75
10
+25°C
MHz
7
PARALLEL-INTERFACE
PARALLEL MODE INPUT TIMING
TIM80
ns
tDH
Figure 6
C, E
0
ns
LE Low Pulse Width
tL
Figure 6
C, E
80
ns
RS Low Pulse Width
tRS
Figure 6
C, E
80
ns
Operating Frequency
fCLK
Figure 7
C, E
SCLK Pulse Width High
tCH
Figure 7
C, E
80
ns
SCLK Pulse Width Low
tCL
Figure 7
C, E
80
ns
DIN to SCLK Rise Setup Time
tDS
Figure 7
C, E
60
ns
DIN to SCLK Rise Hold Time
tDH
Figure 7
C, E
0
ns
CS Fall to SCLK Rise Setup Time
tCSS0
Figure 7
C, E
50
ns
CS Fall to SCLK Rise Hold Time
tCSS1
Figure 7
C, E
80
ns
CS Rise to SCLK Rise Hold Time
tCSH1
Figure 7
C, E
0
ns
CS Rise to SCLK Rise Setup
Time
tCSS1
Figure 7
C, E
80
ns
SERIAL-INTERFACE
SERIAL PERIPHERAL TIMING
INTER-
SCLK Rise to DOUT Valid
tDO
CL = 50pF, Figure 7
C, E
RS Low Pulse Width
tRS
Figure 6
C, E
6.25
150
80
MHz
ns
ns
_______________________________________________________________________________________
5
MAX4588
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = VL = +4.5V to +5.5V, V- = 0, VINH = +2.4V, VINL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA
= +25°C, V+ = VL = +5V.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
POWERSUPPLY
SUPPLY
POWER
V+
Power-Supply Range
VL
V+ ≤ 6.5V
V+ > 6.5V
V+ Supply Current
I+
V+ = 5.5V, VIN = 0 or VL
VL Supply Current
IL
VL = 5.5V, all VIN_ = 0 or VL
2.7
12
2.7
V+
2.7
6.5
+25°C
-1
1
C, E
-10
10
C, E
-10
2
10
V
µA
µA
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = VL = +2.7V to +3.6V, V- = 0, VINH = +2V, VINL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA =
+25°C, V+ = VL = +3.0V.)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
V+
V
350
Ω
ANALOG SWITCH
SWITCH
ANALOG
Analog Signal Range
On-Resistance
VCOM_,
VNO_
RON
0
V+ = 2.7V, VNO_ = 1V,
ICOM_ = 1mA
+25°C
240
C, E
450
LOGIC INPUT
(Pins
through
INPUTS
(4/8,11RS,
LE/CS, A2/SCLK, A1/DIN, A0/DOUT, EN, SER/PAR)
Input Logic Threshold High
VINH
C, E
Input Logic Threshold Low
VINL
C, E
Input Current
IIN
VIN_ = 0 or VL
C, E
2.0
V
-1
0.5
V
1
µA
SWITCH DYNAMIC
DYNAMICCHARACCHARACTERISTICS
SWITCH
Turn-On Time
tON
VNO_ = 1.5V, V+ = 2.7V, Figure 1
Turn-Off Time
tOFF
VNO_ = 1.5V, V+ = 2.7V, Figure 1
Break-Before-Make Time Delay
(Note 3)
tBBM
VNO_ = 1.5V, V+ = 3.6V, Figure 2
+25°C
700
C, E
1000
200
+25°C
250
C, E
400
500
350
ns
ns
+25°C
10
ns
200
ns
PARALLEL-INTERFACE
PARALLEL MODE INPUT TIMING
TIMA_, EN to LE Rise Setup Time
tDS
Figure 6
C, E
A_, EN to LE Rise Hold Time
tDH
Figure 6
C, E
0
ns
LE Low Pulse Width
tL
Figure 6
C, E
200
ns
RS Low Pulse Width
tRS
Figure 6
C, E
200
ns
Operating Frequency
fCLK
Figure 7
C, E
SCLK Pulse Width High
tCH
Figure 7
C, E
200
ns
SCLK Pulse Width Low
tCL
Figure 7
C, E
200
ns
DIN to SCLK Rise Setup Time
tDS
Figure 7
C, E
100
ns
DIN to SCLK Rise Hold Time
tDH
Figure 7
C, E
0
ns
RS Low Pulse Width
tRS
Figure 6
C, E
200
ns
SERIAL-INTERFACE
SERIAL PERIPHERAL TIMING
INTER-
6
2.1
_______________________________________________________________________________________
MHz
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
(V+ = VL = +2.7V to +3.6V, V- = 0, VINH = +2V, VINL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA =
+25°C, V+ = VL = +3.0V.)
PARAMETER
SYMBOL
TA
MIN
CS Fall to SCLK Rise Setup Time
tCSS0
Figure 7
C, E
100
ns
CS Rise to SCLK Rise Hold Time
tCSH1
Figure 7
C, E
0
ns
CS Rise to SCLK Rise Setup
Time
tCSS1
Figure 7
C, E
200
ns
CS Fall to SCLK Rise Hold Time
tCSS1
Figure 7
C, E
200
ns
CL = 50pF, Figure 7
C, E
SCLK Rise to DOUT Valid
tDO
CONDITIONS
TYP
MAX
250
UNITS
ns
POWERSUPPLY
SUPPLY
POWER
V+ Supply Current
I+
V+ = 3.6V, VIN = 0 or VL
VL Supply Current
IL
VL = 3.6V, all VIN = 0 or VL
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
+25°C
-1
1
C, E
-10
10
C, E
-10
1
10
µA
µA
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Guaranteed by design.
∆RON = ∆RON(MAX) - ∆RON(MIN).
Resistance flatness is defined as the difference between the maximum and the minimum value of on-resistance as
measured over the specified analog-signal range.
Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at TA = +25°C.
Off isolation = 20log10 [VCOM_ / (VNC_ or VNO_)], VCOM_ = output, VNC_ or VNO_ = input to off switch.
Between any two switches.
Leakage testing for single-supply operation is guaranteed by testing with dual supplies.
_______________________________________________________________________________________
7
MAX4588
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
Typical Operating Characteristics
(V+ = VL = +5V, V- = -5V, TA = +25°C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
(SINGLE SUPPLY)
ON-RESISTANCE vs. VCOM
(DUAL SUPPLIES)
250
±2.5V
ON-RESISTANCE (Ω)
ON-RESISTANCE (Ω)
±3V
60
±4V
50
±5V
40
30
±6V
V- = 0
V+ = +2.5V
200
80
70
20
150
V+ = +3.0V
V+ = +3.6V
100
V+ = +5V
V+ = +9V
50
10
V+ = +12V
0
0
-6
-4
-2
0
2
4
0
6
4
8
6
10
12
VCOM (V)
ON-RESISTANCE vs. VCOM
AND TEMPERATURE (DUAL SUPPLIES)
ON-RESISTANCE vs. VCOM
AND TEMPERATURE (SINGLE SUPPLY)
V- = 0
130
120
55
TA = +85°C
50
TA = +50°C
45
TA = +25°C
40
TA = 0°C
35
ON-RESISTANCE (Ω)
60
MAX4588-04
140
MAX4588-03
65
ON-RESISTANCE (Ω)
2
VCOM (V)
70
TA = -40°C
30
25
110
TA = +85°C
100
TA = +50°C
90
TA = +25°C
80
70
TA = 0°C
60
TA = -40°C
50
20
40
-5
-4
-3
-2
-1
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCOM (V)
VCOM (V)
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE
CHARGE INJECTION vs. VCOM
30
CHARGE INJECTION (pC)
1n
100p
ON-LEAKAGE
10p
OFF-LEAKAGE
1p
MAX4588-06
35
MAX4588-05
10n
25
DUAL SUPPLIES
20
15
10
SINGLE SUPPLY
5
0
0.1p
-40
-20
0
20
40
60
TEMPERATURE (°C)
8
MAX4588-02
90
MAX4588-01
100
LEAKAGE CURRENT (A)
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
80
100 120
-5
-4
-3
-2
-1
0
1
2
3
VCOM (V)
_______________________________________________________________________________________
4
5
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
ON/OFF TIME vs. TEMPERATURE
tON
200
300
200
tOFF
tOFF
100n
10n
1n
100p
I+
100
100
I-
10p
0
0
3.0
3.5
4.0
4.5
5.0
5.5
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
6.0
10
0
ON LOSS
40
10
0
AMPLITUDE (dB)
RS = 75Ω
RL = 600Ω
-30
20
60
80
100 120
INSERTION LOSS, OFF-ISOLATION,
AND CROSSTALK vs. FREQUENCY
(SINGLE SUPPLY)
INSERTION LOSS
-10
-20
0
TEMPERATURE (°C)
INSERTION LOSS, OFF-ISOLATION,
AND CROSSTALK vs. FREQUENCY
(DUAL SUPPLIES)
-10
1p
-40 -20
TEMPERATURE (°C)
SUPPLY VOLTAGE (±V)
MAX4588-10
2.5
-40
-50
-60
MAX4588-11
300
IL
1µ
SUPPLY CURRENT (A)
tON, tOFF (ns)
400
10µ
MAX4588-08
MAX4588-07
400
tON
AMPLITUDE (dB)
tON, tOFF (ns)
500
SUPPLY CURRENT vs. TEMPERATURE
500
MAX4588-09
ON/OFF TIME vs. SUPPLY VOLTAGE
600
-20
RS = 75Ω
RL = 600Ω
-30
-40
-50
CROSSTALK
-60
OFF-ISOLATION
-70
-70
CROSSTALK
-80
OFF-ISOLATION
-80
-90
-90
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
_______________________________________________________________________________________
9
MAX4588
Typical Operating Characteristics (continued)
(V+ = VL = +5V, V- = -5V, TA = +25°C, unless otherwise noted.)
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
Pin Description
PIN
NAME
1, 5, 7,
9, 21,
23, 25
GND
2
COM1
3
V+
4
NO1
Normally Open Analog Input Terminal. See Truth Tables.
6
NO2
Normally Open Analog Input Terminal. See Truth Tables.
8
NO3
Normally Open Analog Input Terminal. See Truth Tables.
10
NO4
Normally Open Analog Input Terminal. See Truth Tables.
11
4/8
Multiplexer Configuration Control. Connect to VL to select dual 2-channel mode. Connect to GND for single
4-channel multiplexer operation. See Truth Tables.
12
RS
Active-Low Reset Input. In serial mode, drive RS low to force the latches and shift registers to the poweron reset state and force all switches open. In parallel mode, drive RS low to force the latches to the poweron reset state and force all switches open. See Truth Tables.
13
LE/CS
14
A2/SCLK
15
A1/DIN
16
A0/DOUT
17
EN
Switch Enable. Drive EN low to force all channels off. Drive high to allow normal multiplexer operation.
Operates asynchronously in serial mode. In parallel mode, EN is latched when LE signal is high.
18
SER/PAR
Interface Select Input. Drive low for parallel data interface operation. Drive high for serial data interface
operation and to enable the DOUT driver.
19
VL
Logic Supply Input. Powers the DOUT driver and other digital circuitry. VL sets both the digital input and
output logic levels.
20
NO8
Normally Open Analog Input Terminal. See Truth Tables.
22
NO7
Normally Open Analog Input Terminal. See Truth Tables.
24
NO6
Normally Open Analog Input Terminal. See Truth Tables.
26
NO5
Normally Open Analog Input Terminal. See Truth Tables.
27
V-
28
COM2
10
FUNCTION
Ground. Connect all ground pins to a ground plane. See Grounding section.
Analog Switch Common Terminal. See Truth Table.
Analog Positive Supply Voltage Input
In parallel mode, this pin is the transparent Latch Enable. In the serial mode, this pin is the Chip-Select
Input. See Truth Tables.
Most Significant Address Bit in parallel mode with 4/8 low. If 4/8 pin is high, this pin is ignored. In the serial
mode, this is the Serial Shift Clock Input. Data is loaded on the rising edge of SCLK. See Truth Tables.
Address Input in the parallel mode. Serial Data Input in serial mode. In serial mode, data is loaded on
SCLK’s rising edge.
Least Significant Address Input in the parallel mode. In the serial mode this is an output from the internal
4-bit shift register. DOUT is intended for daisy-chain cascading. DOUT is not three-stated by CS. See
Serial Operation.
Analog Negative Supply Voltage Input. Connect to ground plane for single-supply operation.
Analog Switch Common Terminal. See Truth Tables.
______________________________________________________________________________________
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
MAX4588
V+
V+
LE/CS
NO_
EN
VNO_
50%
50%
MAX4588
EN
COM_
90%
VOUT
300Ω
30pF
GND
V-
90%
VOUT
tOFF
tON
V-
Figure 1. Turn-On/Turn-Off Time
V+
V+
NO_
LE/CS
A0
NO_
SER/PAR
VNO_
VOUT
MAX4588
A0
90%
VOUT
COM_
300Ω
30pF
GND
GND
V-
tBBM
V-
Figure 2. Break-Before-Make Time Delay
V+
V+
LE/CS
NO_
VNO_
1nF
SER/PAR
10µF
EN
VOUT
VOUT
MAX4588
EN
COM_
CL
GND
V-
∆VOUT
Q = ∆VOUT · CL
V∆VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER
ERROR Q WHEN THE CHANNEL TURNS OFF.
Figure 3. Charge Injection
______________________________________________________________________________________
11
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
V+
FLOATING
NO_
V+
NO_
1MHz
CAPACITANCE
ANALYZER
MAX4588
MAX4588
FLOATING
COM_
COM_
1MHz
CAPACITANCE
ANALYZER
GND
V-
GND
V-
Figure 4. NO_, COM_ Capacitance
V+
V+
NO_
50Ω
49.9Ω
56Ω
MAX4588
+
-
NO_
MEASURE
NODE
24.9Ω
50Ω
V-
COM_
MEASURE
NODE
560Ω
50Ω
VALL SIGNALS NORMALIZED TO VCOM = 0dB.
Figure 5. Off-Isolation, Crosstalk, and Bandwidth
tL
LE
tDS
tDH
MAX4588
A0, A1, A2, EN
tRS
RS
NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH tR AND tF <10ns. TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
Figure 6. Parallel Timing Diagram
12
______________________________________________________________________________________
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
MAX4588
CS
tCSS
tCH
tCL
tCSH
MAX4588
SCLK
tDS
tDH
DIN
A0
A1
A2
DISABLE
tDO
DOUT
NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH tR AND tF < 10ns.
TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.
Figure 7. Serial Timing Diagram
Detailed Description
NORMALLY OPEN SWITCH CONSTRUCTION
Logic-Level Translators
The MAX4588 is constructed of high-frequency “T”
switches, as shown in Figure 8. The logic-level inputs
are translated by amplifier A1 into a V+ to V- logic signal that drives amplifier A2. Amplifier A2 drives the
gates of N-channel MOSFETs N1 and N2 from V+ to V-,
turning them fully on or off. The same signal drives
inverter A3 (which drives the P-channel MOSFETs P1
and P2, turning them fully on or off) from V+ to V-, and
turns the N-channel MOSFET N3 on and off. The logiclevel threshold is determined by VL and GND.
N1
COM_
N2
P1
NO_
P2
V+
VCC
A1
A2
INPUT
A3
N3
GND
Switch On Condition
When the switch is on, MOSFETs N1, N2, P1, and P2
are on and MOSFET N3 is off (Figure 8). The signal
path is COM_ to NO_, and because both N-channel
and P-channel MOSFETs act as pure resistances, it is
symmetrical (i.e., signals may pass in either direction).
The off MOSFET, N3, has no DC conduction, but has a
small amount of capacitance to GND. The four on
MOSFETs also have capacitance to ground that,
together with the series resistance, forms a lowpass filter. All of these capacitances are distributed evenly
along the series resistance, so they act as a transmission line rather than a simple R-C filter. The MAX4588’s
construction allows an exceptional 180MHz bandwidth
when the switches are on.
V+
VESD DIODES
ON GND, NO_,
AND COM_
V+
Figure 8. T-Switch Construction
Typical attenuation in 75Ω systems is 2.5dB and is reasonably flat up to 50MHz. Higher-impedance circuits
show even lower attenuation (and vice versa), but
slightly lower bandwidth due to the increased effect of
the internal and external capacitance and the switch’s
internal resistance.
______________________________________________________________________________________
13
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
The MAX4588 is optimized for ±5V operation. Using
lower supply voltages or a single supply increases
switching time, on-resistance (and therefore on-state
attenuation), and nonlinearity.
Switch Off Condition
When the switch is off, MOSFETs N1, N2, P1, and P2
are off and MOSFET N3 is on (Figure 8). The signal
path is through the parasitic off-capacitances of the
series MOSFETs, but it is shunted to ground by N3.
This forms a highpass filter whose exact characteristics
are dependent on the source and load impedances. In
75Ω systems, and below 10MHz, the attenuation can
exceed 80dB. This value decreases with increasing frequency and increasing circuit impedances. External
capacitance and board layout have a major role in
determining overall performance.
Applications Information
Power-Supply Considerations
Overview
The MAX4588 construction is typical of many CMOS
analog switches. It has four supply pins: V+, V-, VL, and
GND. V+ and V- are used to drive the internal CMOS
switches and set the limits of the analog voltage on any
switch. Reverse ESD-protection diodes are internally
connected between each analog signal pin and both
V+ and V-. If the voltage on any pin exceeds V+ or V-,
one of these diodes will conduct. During normal operation these reverse-biased ESD diodes leak, forming the
only current drawn from V- and V+.
Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given signal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages vary as the signal varies. The difference in the
two diode leakages from the signal path to the V+ and
V- pins constitutes the analog signal-path leakage current. All analog leakage current flows to the supply terminals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of either the same or opposite polarity.
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase with V+ and V- by the logic-level translators.
VL and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals to drive the gates of the
14
analog switches. This drive signal is the only connection between the logic supplies and the analog supplies.
Bipolar-Supply Operation
The MAX4588 operates with bipolar supplies between
±2.7V and ±6V. The V+ and V- supplies are not required
to be symmetrical, but their sum cannot exceed the
absolute maximum rating of 13.0V. Do not connect the
MAX4588 V+ pin to +3V and connect the logic-level
input pins to +5V logic-level signals. This level
exceeds the absolute maximum ratings, and may
cause damage to the part and/or external circuits.
CAUTION: The absolute maximum V+ to V- differential voltage is 13.0V. Typical “±6-Volt” or “12-Volt”
supplies with ±10% tolerances can be as high as
13.2V. This voltage can damage the MAX4588. Even
±5% tolerance supplies may have overshoot or
noise spikes that exceed 13.0V.
Single-Supply Operation
The MAX4588 operates from a single supply between
+2.7V and +12V when V- is connected to GND.
Observe all of the precautions listed in the BipolarSupply Operation section. Note, however, that these
parts are optimized for ±5V operation, and AC and DC
characteristics are degraded significantly when operating at less than ±5V. As the overall supply voltage (V+
to V-) is reduced, switching speed, on-resistance, offisolation, and distortion are degraded (see Typical
Operating Characteristics).
Single-supply operation also limits signal levels and
interferes with grounded signals. When V- = 0, AC signals are limited to -0.3V. Voltages below -0.3V can be
clipped by the internal ESD-protection diodes, and the
parts can be damaged if excessive current flows.
Power Off
When power to the MAX4588 is off (i.e., V+ = 0 and V= 0), the Absolute Maximum Ratings still apply. This
means that none of the MAX4588 pins can exceed
±0.3V. Voltages beyond ±0.3V cause the internal ESDprotection diodes to conduct, with potentially catastrophic consequences.
Power-Supply Sequencing
When applying power to the MAX4588, follow this
sequence: V+, V- (if biased to potential other than
ground), VL, then logic inputs. Apply signals on the
analog NO_ and COM_ pins any time after V+, V-, and
GND voltages are set. Turning on all pins simultaneously is acceptable only if the circuit design guarantees
concurrent power-up.
______________________________________________________________________________________
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
Grounding
DC Ground Considerations
Satisfactory high-frequency operation requires that
careful consideration be given to grounding. For most
applications, a ground plane is strongly recommended, and all GND pins must connect to it with
solid copper. While the V+ and V- power-supply pins
are common to all switches in a given package, each
input is separated with ground pins that are not internally connected to each other. This contributes to the
overall high-frequency performance by reducing channel-to-channel crosstalk. All the GND pins have ESD
diodes to V+ and V-.
In systems that have separate digital and analog (signal) grounds, connect all GND pins to analog signal
ground. Preserving a good signal ground is much more
important than preserving a digital ground. Ground current is only a few nanoamperes.
The digital inputs have voltage thresholds determined by
VL and GND (V- does not influence the logic-level threshold). With +5V applied to VL, the threshold is about 1.6V,
ensuring compatibility with TTL- and CMOS-logic drivers.
AC Ground and Bypassing
A ground plane is mandatory for satisfactory highfrequency operation. Prototyping using hand wiring or
wire-wrap boards is not recommended. Connect all
GND pins to the ground plane with solid copper. (The
GND pins extend the high-frequency ground through
the package wire-frame, into the silicon itself, thus
improving isolation.) Make the ground plane solid metal
underneath the device, without interruptions. There
should be no traces under the device itself. For DIP
packages, this applies to both sides of a two-sided
board. Failure to observe this has a minimal effect on
the “on” characteristics of the switch at high frequencies, but will degrade the off-isolation and crosstalk.
When using the MAX4588’s SO package on PC boards
with a buried ground plane, connect each GND pin to the
ground plane with a separate via. Do not share this via
with any other ground path. Providing a ground via on
both sides of the SMT land further enhances the off-isolation by lowering the parasitic inductance. The DIP package can have the through-holes directly tied to the buried
plane, or thermally relieved as required to meet manufac-
turability requirements. Again, do not use the throughhole pads as the current path for any other components.
Bypass all V+ and V- pins to the ground plane with surface-mount 0.01µF capacitors. Locate these capacitors
as close as possible to the pins on the same side of the
board as the device. Do not use feedthroughs or vias
for bypass capacitors. If board layout dictates that the
bypass capacitors are mounted on the opposite side of
the PC board, use short feedthroughs or vias, directly
under the V+ and V- pins. Use multiple vias if possible.
If V- is 0, connect it directly to the ground plane with
solid copper. Keep all traces short.
Signal Routing
Keep all signal leads as short as possible. Separate all
signal leads from each other, and keep them away from
any other traces that could induce interference.
Separating the signal traces with generously sized
ground wires also helps minimize interference. Routing
signals via coaxial cable, terminated as close to the
MAX4588 as possible, provides the highest isolation.
Board Layout
IC sockets degrade high-frequency performance and
should not be used if signal bandwidth exceeds 5MHz.
Surface-mount parts, having shorter internal lead
frames, provide the best high-frequency performance.
Keep all bypass capacitors close to the device, and
separate all signal leads with ground planes. Such
grounds tend to be wedge-shaped as they get closer to
the device. Use vias to connect the ground planes on
each side of the board, and place the vias in the apex of
the wedge-shaped grounds that separate signal leads.
Logic-level signal lead placement is not critical.
Impedance Matching
The MAX4588 is intended for use in 75Ω systems,
where the inputs are terminated external to the IC and
the COM terminals see an impedance of 600Ω or higher. The MAX4588 can operate in 50Ω and 75Ω systems
with terminations through the IC. However, variations in
RON and RON flatness cause nonlinearities.
Crosstalk and Off-Isolation
The graphs shown in Typical Operating Characteristics
for crosstalk and off-isolation are taken on adjacent
channels. The adjacent channel is the worst-case condition. For example, NO1 has the worst off-isolation to
COM1 due to their proximity. Furthermore, NO1 has the
most crosstalk to NO2, and the least crosstalk to NO4.
Choosing channels wisely necessitates separating the
most sensitive channels from the most offensive.
Conversely, the above information also applies to the
NO5–NO8 inputs to the COM2 pin.
______________________________________________________________________________________
15
MAX4588
The power-down sequence is the opposite of the
power-up sequence. That is, the VL and logic inputs
must go to zero potential before (or simultaneously
with) the V- then V+ supplies. The Absolute Maximum
Ratings must always be observed in order to ensure
proper operation.
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
Power-On Reset (POR)
The MAX4588 has internal circuitry to guarantee a
known state on power-up. In the default state, A0 = A1
= A2 = 0, disable = 1, and all switches are off. This
state is equivalent to asserting RS during normal operation.
This allows cascading of multiple MAX4588s using only
one chip-select line. For example, one 16-bit write could
load the shift registers of four cascaded MAX4588s. The
data from the shift register is moved to the internal control latches only upon the rising edge of CS, so all four
MAX4588s change state simultaneously.
Serial Operation
Parallel Operation
The serial mode is activated by driving the SER/PAR
input pin to a logic high. The data is then entered using a
normal SPI/MICROWIRE write operation. Refer to Figure
7 for a detailed diagram of the serial-interface logic.
There are four flip-flops in the shift register, with the output of the fourth shift register being output on the DOUT
pin. Note: DOUT changes on the rising edge of SCLK.
The parallel mode is activated by driving SER/PAR to a
logic low. The MAX4588 is programmed by a latched
parallel bus scheme. Refer to Figure 6 for a detailed
diagram of the parallel-interface logic. Note that 4/8 is
not latched. It is best to hard-wire 4/8 to a known state
for the desired mode of operation, or to use a dedicated microcontroller port pin.
Truth Tables
Parallel Operation
SER/PAR
A2
A1
A0
EN
LE
RS
8
4/8
0
x
x
x
x
1
1
x
Maintain previous state.
x
x
x
x
x
x
0
x
All switches off, latches are cleared.
1
x
x
x
x
x
1
x
Serial Mode. Refer to Serial Operation
Truth Table.
SWITCH STATES
0
x
x
x
0
0
1
x
All switches off.
0
0
0
0
1
0
1
0
Connects NO1 to COM1
0
0
0
1
1
0
1
0
Connects NO2 to COM1
0
0
1
0
1
0
1
0
Connects NO3 to COM1
0
0
1
1
1
0
1
0
Connects NO4 to COM1
0
1
0
0
1
0
1
0
Connects NO5 to COM2
0
1
0
1
1
0
1
0
Connects NO6 to COM2
0
1
1
0
1
0
1
0
Connects NO7 to COM2
0
1
1
1
1
0
1
0
Connects NO8 to COM2
0
x
0
0
1
0
1
1
Connect NO1 to COM1 and NO5 to COM2
0
x
0
1
1
0
1
1
Connect NO2 to COM1 and NO6 to COM2
0
x
1
0
1
0
1
1
Connect NO3 to COM1 and NO7 to COM2
0
x
1
1
1
0
1
1
Connect NO4 to COM1 and NO8 to COM2
x = Don’t Care
Note: 4/8 is not latched when LE is high. When LE is low, all latches are transparent. A2, A1, A0, and EN are latched.
Connect COM1 to COM2 externally for 1-of-8 single-ended operation.
16
______________________________________________________________________________________
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
Serial Operation
SER/PAR
CS
SCLK
DIN
EN
RS
DOUT
1
x
x
x
x
0
0
All switches off. Latches and shift register are
cleared. This is the power-on reset (POR) state.
0
x
x
x
x
x
High-Z
Parallel Mode. Refer to Parallel Operation Truth
Table.
1
x
x
x
0
1
*
All switches off.
1
1
x
x
1
1
*
Chip unselected.
1
0
0
1
1
*
Input shift register loads one bit from DIN. DOUT
updates on SCLK’s rising edge.
1
0
1
1
1
*
Input shift register loads one bit from DIN. DOUT
updates on SCLK’s rising edge.
x
1
1
*
Contents of shift register transferred to control
latches.
1
x
ON SWITCHES/STATES
x = Don’t Care
*DOUT is delayed by 4 clock cycles from DIN.
Control Bit and 4/8 Logic
DISABLE
BIT
A2
BIT
A1
BIT
A0
BIT
8
4/8
PIN
ON SWITCHES/STATES
1
x
x
x
x
All switches off.
0
0
0
0
0
Connect NO1 to COM1
0
0
0
1
0
Connect NO2 to COM1
0
0
1
0
0
Connect NO3 to COM1
0
0
1
1
0
Connect NO4 to COM1
0
1
0
0
0
Connect NO5 to COM2
0
1
0
1
0
Connect NO6 to COM2
0
1
1
0
0
Connect NO7 to COM2
0
1
1
1
0
Connect NO8 to COM2
0
x
0
0
1
Connect NO1 to COM1 and NO5 to COM2
0
x
0
1
1
Connect NO2 to COM1 and NO6 to COM2
0
x
1
0
1
Connect NO3 to COM2 and NO7 to COM2
0
x
1
1
1
Connect NO4 to COM2 and NO8 to COM2
x = Don’t Care
Note: DISABLE, A2, A1, and A0 are the 4 bits latched into the MAX4588 with a MICROWIRE/SPI write. A0 is the LSB (first bit in
time). DISABLE is the MSB (last bit in time).
______________________________________________________________________________________
17
MAX4588
Truth Tables (continued)
____________________Chip Information
TRANSISTOR COUNT: 1033
Package Information
28LNPDIP.EPS
MAX4588
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
18
______________________________________________________________________________________
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
SOICW.EPS
______________________________________________________________________________________
19
MAX4588
Package Information (continued)
Low-Voltage, High-Isolation,
Dual 4-Channel RF/Video Multiplexer
SSOP.EPS
MAX4588
Package Information (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.