TS3DS10224 SCDS318 – JUNE 2011 www.ti.com High-Speed 2:4 Differential Multiplexer / Demultiplexer Check for Samples: TS3DS10224 FEATURES APPLICATIONS • • • • • • • 16 ENB OUTA0- OUTA0+ OUTA1- 1 15 INAINB+ VCC INBGND SAO SAI SBI 5 11 OUTB0- OUTB0+ OUTB1- OUTB1+ 6 • INA+ SBO 10 • RUK PACKAGE (TOP VIEW) ENB • Desktop/Notebooks Computers DisplayPort Auxiliary Channel Multiplexing USB 2.0 Multiplexing Netbooks/eBooks/Tablets OUTA1+ • • 2:4 Differential Multiplexer/Demultiplexer Bidirectional Operation Can be used in – Single 1:4 Configuration – Dual 1:2 Configuration – Fan out 1:2 Configuration High BW (1.2 GHz Typ) Low RON and CON: – 13 Ω RON Typ – 9 pF CON Typ ESD Performance (I/O Pins) – ±8-kV Contact Discharge (IEC61000-4-2) – 2-kV Human Body Model per JESD22-A114E (to GND) ESD Performance (All Pins) – 2-kV Human Body Model per JESD22-A114E Small QFN package (3 x 3 mm, 0.4-mm pitch) 20 1 DESCRIPTION The TS3DS10224 is a 2:4 bidirectional multiplexer for high-speed differential and single ended signal applications (up to 720 Mbps). The TS3DS10224 can be used in a 1:4 or dual 1:2 multiplexer/demultiplexer configuration. The TS3DS10224 offers a high BW of 1.2 GHz with channel RON of 13 Ω (Typ). The TS3DS10224 can also be used to fan out a differential or single ended signal pair to two ports simultaneously (fan-out configuration). The BW performance is lower in this configuration. The TS3DS10224 operates with a 3 to 3.6V power supply. It features ESD protection of up to ±8-kV contact discharge and 2-kV Human Body Model on its I/O pins. The TS3DS10224 provides fail-safe protection by isolating the I/O pins with high impedance when the power supply (VCC) is not present. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PACKAGE (1) (2) TA –40°C to 85°C (1) (2) QFN Tape and Reel ORDERABLE PART NUMBER TOP-SIDE MARKING TS3DS10224RUKR ZTB Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. PIN FUNCTIONS PIN NAME PIN TYPE DESCRIPTION SAI Input Control input SAO Input Control input SBI Input Control input SBO Input Control input ENA Input Enable INA+ I/O Input A INA– I/O Input A ENB Input Enable INB+ I/O Input B INB- I/O Input B OUTB0– I/O Output B0 OUTB0+ I/O Output B0 OUTB1– I/O Output B1 OUTB1+ I/O Output B1 GND Ground Ground VCC Power Power supply OUTA0– I/O Output A0 OUTA0+ I/O Output A0 OUTA1– I/O Output A1 OUTA1+ I/O Output A1 LOGIC DIAGRAM ENA INA +- 1 1 0 0 + OUTA1 + OUTA0 SAO SAI SBI SBO INB +- 0 1 1 0 + OUTB1 + OUTB0 - ENB 2 Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com Table 1. FUNCTION TABLE ENA, ENB OUTA0 OUTA1 OUTB0 OUTB1 00 Hi-Z Hi-Z Hi-Z Hi-Z 01 Hi-Z Hi-Z – – 10 – – Hi-Z Hi-Z 11 – – – – SAI, SAO, SBI, SBO OUTA0 OUTA1 OUTB0 OUTB1 0000 INB – INA – 0001 INB – – INA 0010 INB – INB – 0011 INB – – INB 0100 – INB INA – 0101 – INB – INA 0110 – INB INB 0111 – INB – 1000 INA – INA – 1001 INA – – INA 1010 INA – INB – 1011 INA – – INB 1100 – INA INA – 1101 – INA – INA 1110 – INA INB – 1111 – INA – INB INB CONFIGURATIONS 1. Single 1:4 Configuration In this configuration either INA or INB is not connected and the other input can be multiplexed/demultiplexed to either of the four outputs. 2. Dual 1:2 Configuration In this configuration SAI and SBI are both connected to VCC. SAO and SBO are used to control two separate 1:2 multiplexers/demultiplexers. 3. Fan out 1:2 Configuration In this configuration either INA or INB can be multiplexed to both OUTAx and OUTBx simultaneously. There is an impact on the device characteristics. Copyright © 2011, Texas Instruments Incorporated 3 TS3DS10224 SCDS318 – JUNE 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.3 4.0 V VI/O Analog I/O voltage range (2) (3) (4) –0.3 VCC + 0.3 V II/O ON-state switch current (5) ±100 ICC Continuous current through VCC or GND ±100 VIN Control input voltage range (2) (3) θJA Package thermal impedance (6) Tstg Storage temperature range (1) (2) (3) (4) (5) (6) –0.3 VCC + 0.3 RUK package –65 mA V 82.7 °C/W 150 °C Stresses above these ratings may cause permanent damage. These are stress ratings only, and functional operation of the device at these or any other conditions beyond the recommended operating conditions is not implied. Exposure to absolute maximum conditions for extended periods may degrade device reliability. All voltages are with respect to ground, unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions for II/O The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) (2) MIN MAX UNIT VCC Supply voltage 3 3.6 V VIH High-level control input voltage 0.75 x VCC VCC V VIL Low-level control input voltage 0 0.6 V VI/O Input/Output voltage 0 VCC V TA Operating free-air temperature –40 85 °C (1) (2) 4 All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. It is recommended to pull down to ground unused I/O pins through a 1-kΩ resistor. Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS (1) For Single 1:4 or Dual 1:2 configurations. TA = –40°C to 85°C, Typical values are at VCC = 3.3V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (2) UNIT Digital input clamp voltage VCC = 3.6 V, II = –18 mA IIN Digital input leakage current VCC = 3.6 V, VIN = 0 to 3.6 V ±2 μA VCC = 3.6 V, VO = 0 V to 3.6 V, VI = 0 V, Switch OFF ±2 μA ±5 μA 50 100 μA IOZ (3) –1.2 MAX VIK -0.9 V IOFF Power off leakage current VCC = 0 V, VIN = VCC or GND,VI/O = 0 V to 3.6 V ICC Supply current VCC = 3.6 V, II/O = 0, Switch ON or OFF CIN Digital input capacitance VCC = 3.3 V, VIN = VCC or GND 3 5 pF CI/O(OFF) OFF capacitance VCC = 3.3 V, VI/O = 3.3 V or 0, f = 10 MHz, Switch OFF 6 7 pF CI/O(ON) ON capacitance VCC = 3.3 V, VI/O = 3.3 V or 0, f = 10 MHz, Switch ON 9 10 pF ron ON state resistance VCC = 3.6 V, VI = VCC, IO = –30 mA 13 19 Ω VCC = 3.3 V, VI = 0.5V, IO = –30 mA 10 Δron ON state resistance match between channels VCC = 3 V, VI = 0 to VCC, IO = –30 mA 2 2.5 Ω ron(flat) ON state resistance flatness VCC = 3 V, VI = 1.5 V and VCC, IO = –30 mA 4 6 Ω (1) (2) (3) Ω VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. DYNAMIC CHARACTERISTICS For Single 1:4 or Dual 1:2 configurations. TA = –40°C to 85°C, Typical values are at VCC = 3.3 V ± 10% and TA = 25°C (unless otherwise noted) TYP UNIT BW Bandwidth PARAMETER RL = 50 Ω, Switch ON TEST CONDITIONS 1.2 GHz OISO OFF Isolation RL = 50 Ω , f = 250 MHz –30 dB XTALK Crosstalk RL = 50 Ω , f = 250 MHz –30 dB SWITCHING CHARACTERISTICS For Single 1:4 or Dual 1:2 configurations. Over operating range, TA = –40°C to 85°C, VCC = 3.3 V ±10%, GND = 0 V (unless otherwise noted) PARAMETER tpd (1) TEST CONDITIONS MIN TYP MAX UNIT RL = 50 Ω, CL = 2 pF 50 ps tON SAI/SAO/SBI/SBO to OUTAx/OUTBx RL = 50 Ω, CL = 2 pF 40 100 ns tOFF SAI/SAO/SBI/SBO to OUTAx/OUTBx RL = 50 Ω, CL = 2 pF 20 30 ns RL = 50 Ω, CL = 2 pF 40 ps RL = 50 Ω, CL = 2 pF 40 ps tsk(o) tsk(p) (1) (2) (3) (2) (3) The propagation delay is the calculated RC time constant of the typical ON-State resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance). Output skew between center channel and any other channel. Skew between opposite transitions of the same output ( |tPHL – tPLH| ). Copyright © 2011, Texas Instruments Incorporated 5 TS3DS10224 SCDS318 – JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS (1) For fan-out 1:2 configurations. TA = –40°C to 85°C, Typical values are at VCC = 3.3V, TA = 25°C (unless otherwise noted) PARAMETER MIN TYP (2) MAX TEST CONDITIONS UNIT VIK Digital input clamp voltage VCC = 3.6 V, II = –18 mA IIN Digital input leakage current VCC = 3.6 V, VIN = 0 to 3.6 V ±2 μA IOZ (3) -1.2 -0.9 V VCC = 3.6 V, VO = 0 V to 3.6 V, VI = 0 V, Switch OFF ±2 μA IOFF Power off leakage current VCC = 0 V, VIN = VCC or GND, VI/O = 0 V to 3.6 V ±5 μA ICC Supply current VCC = 3.6 V, II/O = 0, Switch ON or OFF 50 100 μA CIN Digital input capacitance VCC = 3.3 V, VIN = VCC or GND 3 5 pF CI/O(OFF) OFF capacitance VCC = 3.3 V, VI/O = 3.3 V or 0, f = 10 MHz, Switch OFF 6 7 pF CI/O(ON) ON capacitance VCC = 3.3 V, VI/O = 3.3 V or 0, f = 10 MHz, Switch ON 12 13 pF ron ON state resistance VCC = 3.6 V, VI = VCC, IO = –30 mA 13 19 Ω Δron ON state resistance match between channels VCC = 3 V, VI = 0 to VCC, IO = –30 mA 2 2.5 Ω ron(flat) ON state resistance flatness VCC = 3 V, VI = 1.5 V and VCC, IO = –30 mA 4 6 Ω (1) (2) (3) VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. DYNAMIC CHARACTERISTICS For fan-out 1:2 configurations. TA = –40°C to 85°C, Typical values are at VCC = 3.3 V ± 10% and TA = 25°C (unless otherwise noted) TYP UNIT BW Bandwidth PARAMETER RL = 50 Ω, Switch ON TEST CONDITIONS 500 MHz OISO OFF Isolation RL = 50 Ω , f = 250 MHz –30 dB XTALK Crosstalk RL = 50 Ω , f = 250 MHz –30 dB SWITCHING CHARACTERISTICS For fan-0ut 1:2 configurations. Over operating range, TA = –40°C to 85°C, VCC = 3.3 V ±10%, GND = 0 V (unless otherwise noted) PARAMETER tpd (1) TEST CONDITIONS MIN TYP MAX UNIT RL = 50 Ω, CL = 2 pF 140 ps tON SAI/SAO/SBI/SBO to OUTAx/OUTBx R = 50 Ω, CL = 2 pF 40 100 ns tOFF SAI/SAO/SBI/SBO to OUTAx/OUTBx RLL = 50 Ω, CL = 2 pF 20 30 ns RL = 50 Ω, CL = 2 pF 60 ps RL = 50 Ω, CL = 2 pF 60 ps tsk(o) tsk(p) (1) (2) (3) 6 (2) (3) The propagation delay is the calculated RC time constant of the typical ON-State resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance). Output skew between center channel and any other channel. Skew between opposite transitions of the same output ( |tPHL – tPLH| ). Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (Single 1:4 or Dual 1:2 configurations) 0 12 Single 1:4 -2 Dual 1:2 -4 Insertion Loss - dB 10 Ron - Ω 8 6 4 -6 -8 -10 2 -12 0 0 1 2 3 -14 1.00E+05 Vin - V Figure 1. ON-Resistance vs. Vout Figure 2. Insertion loss vs. Frequency 0 0 -10 -10 -20 -20 -30 -30 Crosstalk - dB OFFISOLATION - dB 1.00E+10 f - Frequency - MHz -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 1.00E+05 1.00E+10 f - Frequency - MHz Figure 3. Off Isolation vs. Frequency Copyright © 2011, Texas Instruments Incorporated -90 1.00E+05 1.00E+09 f - Frequency - MHz Figure 4. Crosstalk vs. Frequency 7 TS3DS10224 SCDS318 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (Fan out 1:2 configurations) 0 12 -2 10 Insertion Loss - dB -4 Ron - Ω 8 6 4 -6 -8 -10 2 -12 -14 1.00E+06 0 0 0.5 1 1.5 Vin - V 2 2.5 3 Figure 5. ON-Resistance vs. Vout 1.00E+08 1.00E+09 1.00E+07 f - Frequency - MHz 1.00E+10 Figure 6. Insertion loss vs. Frequency 0 0 -10 -20 -40 -30 Crosstalk - dB Off Isolation - dB -20 -60 -80 -40 -50 -60 -70 -100 -80 -120 1.00E+06 1.00E+08 1.00E+09 1.00E+07 f - Frequency - MHz Figure 7. Off Isolation vs. Frequency 8 1.00E+10 -90 1.00E+05 1.00E+11 f - Frequency - MHz Figure 8. Crosstalk vs. Frequency Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT 2 × VCC Input Generator S1 RL VO VI 50 Ω CL (see Note A) 50 Ω VG2 RL TEST VCC S1 RL Vin CL V∆ t PLZ/t PZL 3.3 V ± 0.3 V 2 × VCC 50 Ω GND 2 pF 0.3 V t PHZ/t PZH 3.3 V ± 0.3 V GND 50 Ω VCC 2 pF 0.3 V VSEL VO VCC Output Control (VIN) VCC/2 VCC/2 0V Output Waveform 1 S1 at 2 x VCC (see Note B) t PZL t PLZ VOH VCC/2 t PZH VO Open GND Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL t PHZ VCC/2 VOH - 0.3 V VOH VOL VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics:PRR ≤10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tOFF. F. tPZL and tPZH are the same as tON. Figure 9. Test Circuit and Voltage Waveforms Copyright © 2011, Texas Instruments Incorporated 9 TS3DS10224 SCDS318 – JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT 2 × VCC Input Generator 50 Ω RL S1 RL Vin CL t sk(o) 3.3 V ± 0.3 V Open 50 Ω VCC or GND 2 pF t sk(p) 3.3 V ± 0.3V Open 50 Ω VCC or GND 2 pF VCC 3.0 V 1.5 V 0V Data In at Ax or Ay t PLHx t PHLx VOH (VOH + VOL)/2 VOL Data Out at XB 1 or XB 2 t sk(o) VO CL (see Note A) 50 Ω TEST VO Open GND VG2 VI RL VO VI S1 VOH (VOH + VOL)/2 VOL t PHLy t sk(o) = t PLHy − tPLHx or t PHLy − tPHLx VOLTAGE WAVEFORMS OUTPUT SKEW (t sk(o)) Input t sk(o) Data Out at YB 1 or YB 2 t PLHy 3.0 V 1.5 V 0V t PLH t PHL VOH (VOH + VOL)/2 VOL Output t sk(p) = t PHL − tPLH VOLTAGE WAVEFORMS PULSE SKEW [t sk(p)] NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 10. Test Circuit and Voltage Waveforms 10 Copyright © 2011, Texas Instruments Incorporated TS3DS10224 SCDS318 – JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Network Analyzer P2 50Ω P1 50Ω VDD ENA OUTA1+ OUTA1- INA+ OUTA0+ INA- OUTA0- OUTB1+ INB+ OUTB1- NB- SAO=SAI=SBO=SBI=1 ENB=0 for Single 1:4 and Dual 1:2 configurations ENB=1 for Fan out 1:2 configuration OUTB0+ OUTB0- GND Figure 11. Frequency Response (BW) Network Analyzer P1 50 W P2 50 W VCC 50 W ENA OUTA1+ OUTA1- INA+ OUTA0+ INA- OUTA0SAO=SAI=SBO=SBI=1 OUTB1+ INB+ OUTB1- NB- OUTB0+ ENB GND OUTB0- Figure 12. Off Isolation (OISO) Copyright © 2011, Texas Instruments Incorporated 11 TS3DS10224 SCDS318 – JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Network Analyzer P2 P1 50 W 50 W VCC ENA OUTA1+ 50 W OUTA1INA+ OUTA0+ INA- 50 W OUTA0- OUTB1+ INB+ OUTB1- NB- OUTB0+ ENB GND SAO=SAI=SBO=SBI=1 OUTB0- Figure 13. Crosstalk (XTALK) 12 Copyright © 2011, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 17-Jun-2011 PACKAGING INFORMATION Orderable Device TS3DS10224RUKR Status (1) PREVIEW Package Type Package Drawing QFN RUK Pins Package Qty 20 3000 Eco Plan TBD (2) Lead/ Ball Finish Call TI MSL Peak Temp (3) Samples (Requires Login) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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