WF8M32-XG4DX5 HI-RELIABILITY PRODUCT 8Mx32 5V FLASH MODULE ADVANCED* FEATURES ■ Data Polling and Toggle Bit feature for detection of program or erase cycle completion. ■ Supports reading or programming data to a sector not being erased. ■ Access Time of 100, 120, 150ns ■ Packaging: ■ ■ ■ ■ ■ ■ • 68 Lead, 40 mm (1.560") square hermetic CQFP, 5.2 mm (0.205") high (Package 503) Sector Architecture • 32 equal size sectors of 64KBytes per each 2Mx8 chip • Any combination of sectors can be erased. Also supports full chip erase. 100,000 Write/Erase Cycles Minimum Organized as 8Mx32 Commercial, Industrial, and Military Temperature Ranges 5 Volt Read and Write. 5V ± 10% Supply. Low Power CMOS FIG. 1 ■ RESET pin resets internal state machine to the read mode. (Not available in HIP package for WF2M32-XHX5) ■ Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation, Seperate Power and Ground Planes to improve noise immunity. ■ Built in Buffering. * This data sheet describes a product that may or may not be under development, and is subject to change or cancellation without notice. Note: For programming information refer to Flash Programming 16M5 Application Note. PIN CONFIGURATION FOR WF8M32-XG4DX5 PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC TOP VIEW 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 RESET 1 CS 1-4 4 WE OE A0-22 1 1 Chip Selects OE Output Enable VCC Power Supply Reset GND Ground NC Not Connected 1 1 CS1 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 8 CS4 2M x 8 2M x 8 2M x 8 2M x 8 I/O16-23 I/O8-15 I/O0-7 8 CS3 CS2 2M x 8 2M x 8 2M x 8 A22 A21 Write Enable CS1-4 4 2M x 8 RESET Address Inputs WE 23 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 A19 A20 A0-22 1 23 I/O0-31 Data Inputs/Outputs RESET BLOCK DIAGRAM Interface I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O0-31 8 I/O24-31 8 32 CS 1 selects I/O0-7, CS 2 selects I/O8-15, CS3 selects I/O 16-23, CS4 selects I/O 24-31 October 1999 Rev. 3 1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WF8M32-XG4DX5 ABSOLUTE MAXIMUM RATINGS Parameter CAPACITANCE (TA = +25°C) Symbol Ratings Voltage on Any Pin Relative to VSS VT -2.0 to +7.0 V Parameter Symbol Conditions Power Dissipation PT 8 W OE capacitance COE VIN = 0 V, f = 1.0 MHz 20 Tstg -65 to +125 °C WE capacitance CWE VIN = 0 V, f = 1.0 MHz 20 pF IOS 100 mA CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF 100,000 min cycles Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 60 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 20 pF RESET capacitance CRST VIN = O V, f = 1.0 MHz 20 pF Storage Temperature Short Circuit Output Current Endurance - Write/Erase Cycles (Mil Temp) Data Retention (Mil Temp) Unit 20 years Symbol Min Typ Max Supply Voltage V CC 4.5 5.0 5.5 V Ground V SS 0 0 0 V Input High Voltage V IH 2.0 - V CC + 0.5 V Input Low Voltage V IL -0.5 - +0.8 V Operating Temperature (Mil.) TA -55 - +125 °C Operating Temperature (Ind.) TA -40 - +85 °C pF This parameter is guaranteed by design but not tested. RECOMMENDED DC OPERATING CONDITIONS Parameter Max Unit Unit DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Input Leakage Current Symbol Conditions Min Max Unit µA I LI V CC = 5.5, V IN = GND to VCC 10 I LOx32 V CC = 5.5, V IN = GND to VCC 10 µA VCC Active Current for Read (1) ICC1 CS = VIL, OE = VIH, f = 5MHz 640 mA V CC Active Current for Program or Erase (2) I CC2 CS = VIL, OE = VIH 960 mA V CC Standby Current I CC3 V CC = 5.5, CS = V IH , f = 5MHz, RESET = Vcc ± 0.3V 160 mA Output Low Voltage V OL I OL = 12.0 mA, V CC = 4.5 0.45 V Output High Voltage V OH I OH = -2.5 mA, V CC = 4.5 Low V CC Lock-Out Voltage V LKO Output Leakage Current 0.85 x Vcc 3.2 V 4.2 V NOTES: 1. The Icc current listed includes both the DC operating current and the frequency dependent component (@ 5MHz). The frequency component typically is less than 2mA/MHz, with OE at VIH. 2. Icc active while Embedded Algorithm (program or erase) is in progress. 3. DC test conditions VIL = 0.3V, VIH = VCC - 0.3V White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 2 WF8M32-XG4DX5 AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS - WE CONTROLLED (VCC = 5.0V, TA = -55°C to +125°C) Parameter Symbol -100 Min -120 Max Min -150 Max Min Unit Max Write Cycle Time tAVAV tWC 100 120 150 Chip Select Setup Time tELWL tCS 0 0 0 ns Write Enable Pulse Width tWLWH tWP 50 50 50 ns Address Setup Time tAVWL tAS 0 0 0 ns Data Setup Time tDVWH tDS 50 50 50 ns Data Hold Time tWHDX tDH 0 0 0 ns Address Hold Time tWLAX tAH 50 50 50 ns Write Enable Pulse Width High tWHWL tWPH 20 20 20 ns Duration of Byte Programming Operation (1) tWHWH1 300 300 300 µs Sector Erase (2) tWHWH2 15 15 15 sec Read Recovery Time before Write tGHWL 0 0 0 V CC Setup Time t VCS 50 50 50 Chip Programming Time 44 Chip Erase Time (3) ns µs µs 44 256 256 44 sec 256 sec Output Enable Hold Time (4) tOEH 10 10 10 ns RESET Pulse Width tRP 500 500 500 ns NOTES: 1. Typical value for t WHWH1 is 7µs. 2. Typical value for t WHWH2 is 1sec. 3. Typical value for Chip Erase Time is 32sec. 4. For Toggle and Data Polling. AC CHARACTERISTICS – READ-ONLY OPERATIONS (VCC = 5.0V, TA = -55°C to +125°C) Parameter Symbol -100 Min Read Cycle Time -120 Max 100 Min -150 Max 120 Min Unit Max t AVAV t RC 150 ns Address Access Time t AVQV t ACC 100 120 150 Chip Select Access Time t ELQV t CE 100 120 150 ns Output Enable to Output Valid t GLQV t OE 50 50 55 ns ns Chip Select High to Output High Z (1) t EHQZ t DF 30 30 35 ns Output Enable High to Output High Z (1) t GHQZ t DF 30 30 35 ns Output Hold from Addresses, CS or OE Change, whichever is First t AXQX t OH RST Low to Read Mode (1) 0 0 20 t Ready 0 20 ns 20 µs 1. Guaranteed by design, not tested. 3 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF8M32-XG4DX5 AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Symbol -100 Min -120 Max Min -150 Max Min Unit Max Write Cycle Time t AVAV t WC 100 120 150 Write Enable Setup Time t WLEL t WS 0 0 0 ns Chip Select Pulse Width t ELEH t CP 50 50 50 ns Address Setup Time t AVEL t AS 0 0 0 ns Data Setup Time t DVEH t DS 50 50 50 ns Data Hold Time t EHDX t DH 0 0 0 ns Address Hold Time t ELAX t AH 50 50 50 ns t EHEL t CPH 20 Chip Select Pulse Width High 20 ns 20 ns Duration of Byte Programming Operation (1) t WHWH1 300 300 300 µs Sector Erase Time (2) t WHWH2 15 15 15 sec Read Recovery Time t GHEL 100 sec 480 sec 0 0 Chip Programming Time 100 Chip Erase Time (3) 480 Output Enable Hold Time (4) tOEH 10 µs 0 100 480 10 10 ns NOTES: 1. Typical value for t WHWH1 is 7µs. 2. Typical value for t WHWH2 is 1sec. 3. Typical value for Chip Erase Time is 32sec. 4. For Toggle and Data Polling. FIG. 2 AC TEST CONDITIONS AC TEST CIRCUIT Parameter I OL Current Source VZ D.U.T. ≈ 1.5V (Bipolar Supply) C eff = 50 pf CS I OH The Current Source Typ VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: VZ is programmable from -2V to +7V. IOL & I OH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω. VZ is typically the midpoint of V OH and V OL. I OH are of adjusted to simulate a typical resistive load circuit. IOL & edge rising the last WE signal ATE tester includes jig capacitance. WE Entire programming or erase operations FIG. 3 RY/BY RESET TIMING DIAGRAM tBUSY RESET tRP tReady White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 4 Unit Input Pulse Levels WF8M32-XG4DX5 FIG. 4 5 Outputs WE OE CS High Z tACC tCE tOE Addresses Stable Addresses tRC Output Valid tOH tDF High Z AC WAVEFORMS FOR READ OPERATIONS White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF8M32-XG4DX5 NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to each chip. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 6 A0H tDH tWPH Data tDS tCS WE OE 5.0 V tWP tGHWL CS tWC Addresses 5555H tAS PA PD tAH tWHWH1 Data Polling D7 PA DOUT tOE tCE tRC tDF WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED tOH FIG. 5 WF8M32-XG4DX5 FIG. 6 tDH AAH tDS tVCS VCC Data WE OE CS Addresses tGHWL tCS tWP tAS tWPH 55H 2AAAH 5555H tAH 5555H 80H 5555H AAH 2AAAH 55H SA 10H/30H AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS NOTE: 1. SA is the sector address for Sector Erase. 7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF8M32-XG4DX5 FIG. 7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 8 Data WE OE CS D0-D6 D7 t CH tOEH tCE t OE tWHWH 1 or 2 D7 D0-D6 = Invalid D7 = Valid Data D0-D7 Valid Data t OH t DF High Z AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED ALGORITHM OPERATIONS WF8M32-XG4DX5 FIG. 8 A0H tDH tCPH 5.0 V tDS Data CS OE tWS tWC WE Addresses 5555H tGHEL tCP tAS PA PD tAH tWHWH1 Data Polling D7 PA DOUT ALTERNATE CS CONTROLLED PROGRAMMING OPERATION TIMINGS NOTES: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to each chip. 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence. 9 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WF8M32-XG4DX5 PACKAGE 503: 68 LEAD, CERAMIC QUAD FLAT PACK DUAL CAVITY, CQFP (G4D) 5.2 (0.205) MAX 39.6 (1.56) ± 0.38 (0.015) SQ 1.27 (0.050) ± 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES + 0.002 0.010 - 0.001 1.27 (0.050) TYP 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES ORDERING INFORMATION W F 8M32 - XXX G4D X 5 VPP PROGRAMMING VOLTAGE 5=5V DEVICE GRADE: M = Military Screened -55°C to +125°C I = Industrial -40°C to +85°C C = Commercial 0°C to +70°C PACKAGE TYPE: G4D = 40mm CQFP (Package 503) ACCESS TIME (ns) ORGANIZATION, 8M x 32 User configurable as 16M x 16 or 32M x 8 Flash WHITE ELECTRONIC DESIGNS CORP. White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 10