MAXIM MAX9380ESA

19-2236; Rev 0; 10/01
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
Features
♦ >300mV Differential Output at 3.5GHz
♦ Low 20mA Supply Current
♦ 33ps (typ) Part-to-Part Skew
♦ 263ps (typ) Propagation Delay
♦ <0.2psRMS Added Random Jitter
♦ High-Speed Select Input
♦ Output Low with Open Inputs
♦ Pin Compatible with MC10EP58
Applications
Precision Clock Distribution
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
DSLAM
MAX9380EUA*
-40°C to +85°C
8 µMAX
DLC
MAX9380ESA
-40°C to +85°C
8 SO-EP**
Base Station
*Future product—contact factory for availability.
**EP = Exposed paddle.
ATE
Input/Output Function Table
INPUTS
OUTPUTS
TOP VIEW
Da (SEL = high) or
Db (SEL = low)
Q
Q
High
H
L
Low or open
Pin Configuration
L
NC
8
VCC
1
7
Q
0
6
Q
5
VEE
1
MAX9380
H
Da
2
75kΩ
Db
3
75kΩ
SEL 4
75kΩ
µMAX/SO
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
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1
MAX9380
General Description
The MAX9380 is a high-speed, low-jitter 2:1 multiplexer
for clock and data distribution applications. The device
selects one of the two single-ended inputs and converts it to a differential output.
The MAX9380 features low part-to-part skew of 33ps
and propagation delay of 263ps.
The MAX9380 operates from a +3.0V to +3.8V supply for
LVPECL applications or from a -3.0V to -3.8V supply for
LVECL applications. The input is selected by a single select
input. The select and data inputs feature internal pulldown
resistors that ensure a low default state if left open.
These devices are specified for operation from -40°C to
+85°C, and are available in space-saving 8-pin µMAX
and SO packages.
MAX9380
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
ABSOLUTE MAXIMUM RATINGS
VCC - VEE ...............................................................-0.3V to +4.1V
Inputs (Da, Db, SEL).............................VEE - 0.3V to VCC + 0.3V
Output Current (Continuous)...............................................50mA
Output Current (Surge) .....................................................100mA
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin µMAX ..............................................................+221°C/W
8-Pin SO* .................................................................+170°C/W
Junction-to-Ambient Thermal Resistance with
500LFPM Airflow
8-Pin µMAX ..............................................................+155°C/W
8-Pin SO* ...................................................................+99°C/W
Junction-to-Case Thermal Resistance
8-Pin µMAX ................................................................+39°C/W
8-Pin SO.....................................................................+40°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (Inputs and Outputs) .........................2kV
Soldering Temperature (10s) ...........................................+300°C
* Rating is for exposed paddle not connected.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC - VEE = +3.0V to +3.8V, outputs terminated with 50Ω to VCC - 2.0V, unless otherwise noted.) (Notes 1, 2, 3)
PARAMETER
SYMBOL
CONDITIONS
-40°C
MIN
TYP
+25°C
MAX
MIN
TYP
+85°C
MAX
MIN
TYP
MAX
UNITS
INPUTS (Da, Db, SEL)
Input High Voltage
VIH
VCC 1.210
VCC - VCC 0.885 1.145
VCC - VCC 0.820 1.085
VCC 0.760
V
Input Low Voltage
VIL
VCC 1.935
VCC - VCC 1.610 1.870
VCC - VCC 1.545 1.81
VCC 1.485
V
Input High Current
IIH
VIN = VIH(MAX)
150
µA
Input Low Current
IIL
VIN = VIL(MIN)
150
0.5
150
0.5
0.5
µA
OUTPUTS (Q, Q)
Single-Ended
Output High
Voltage
VOH
Figure 1
VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC 1.135 0.979 0.885 1.07 0.959 0.82 1.01 0.947 0.76
V
Single-Ended
Output Low
Voltage
VOL
Figure 1
VCC - VCC - VCC 1.935 1.721 1.685
V
VOH VOL
Figure 1
IEE
(Note 4)
Differential Output
Voltage
550
748
VCC - VCC - VCC - VCC - VCC - VCC 1.87 1.698 1.62 1.81 1.681 1.56
550
741
550
734
mV
POWER SUPPLY
Supply Current
2
18
26
20
26
22
_______________________________________________________________________________________
30
mA
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
(VCC - VEE = +3.0V to +3.8V, outputs loaded with 50Ω to VCC - 2V, VIH = VCC - 1.11V, VIL = VCC - 1.53V, input frequency = 2.0GHz,
input transition time = 125ps (20% to 80%). Typical values are at VCC - VEE = +3.3V, unless otherwise noted.) (Notes 1, 5)
PARAMETER
SYMBOL
Data Input-to-Output
Delay
tPLH1,
tPHL1
Select Input-toOutput Delay
tPLH2,
tPHL2,
Part-to-Part Skew
tSKPP
Added Random
Jitter (Note 7)
tRJ
Added Deterministic
Jitter (Note 7)
Switching Frequency
tDJ
fMAX
CONDITIONS
tR , t F
+25°C
+85°C
UNITS
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Figure 1
176
258
298
192
263
316
222
277
385
ps
Figure 2
210
304
329
219
308
360
247
318
392
ps
27
122
33
124
14
163
ps
fIN = 3.2GHz,
clock pattern
1.2
0.2
1.2
1.2
ps
(RMS)
2.0Gbps, 223 - 1
PRBS
51
36
51
51
Data input to
output (Note 6)
ps
(p-p)
23
3.2Gbps, 2 - 1
PRBS
VOH - VOL ≥
Figure 300mV
1
VOH - VOL ≥
550mV
Output Rise/Fall
Time (20% to 80%)
-40°C
MIN
Figure 1
77
3.0
3.5
48
3.0
77
3.5
77
3.0
3.5
GHz
2.0
50
2.0
96
50
2.0
96
50
98
ps
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full operating temperature range.
Note 4: All pins are open except VCC and VEE.
Note 5: Guaranteed by design and characterization. Limits are set to ±6 sigma.
Note 6: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 7: Device jitter added to the input signal.
_______________________________________________________________________________________
3
MAX9380
AC ELECTRICAL CHARACTERISTICS
Typical Operating Characteristics
(VCC - VEE = +3.3V, VIH = VCC - 1.165V, VIL = VCC - 1.475V, outputs loaded with 50Ω to VCC - 2.0V, input frequency = 1GHz, input
transition time = 125ps (20% to 80%), unless otherwise noted.)
OUTPUT AMPLITUDE (VOH - VOL)
vs. FREQUENCY
SUPPLY CURRENT (IEE)
vs. TEMPERATURE
25
20
15
0.80
0.60
0.40
0.20
10
-15
10
35
60
0
85
500
1000 1500 2000 2500 3000 3500
TEMPERATURE (°C)
FREQUENCY (MHz)
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
PROPAGATION DELAY
vs. TEMPERATURE
95
320
MAX9380 toc03
100
90
85
80
300
PROPAGATION DELAY (ps)
tF
tR
75
MAX9380 toc04
-40
280
tPHL1
260
240
tPLH1
220
200
180
70
-40
-15
10
35
TEMPERATURE (°C)
4
MAX9380 toc02
MAX9380 toc01
1.00
OUTPUT AMPLITUDE (V)
SUPPLY CURRENT (mA)
30
OUTPUT RISE/FALL TIME (ps)
MAX9380
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
60
85
-40
-15
10
35
60
TEMPERATURE (°C)
_______________________________________________________________________________________
85
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
PIN
NAME
1
NC
No Connection. Not internally connected.
FUNCTION
2
Da
Single-Ended LVECL/LVPECL Data Input. Da is low default through internal 75kΩ pulldown resistor.
3
Db
Single-Ended LVECL/LVPECL Data Input. Db is low default through internal 75kΩ pulldown resistor.
4
SEL
Single-Ended Control Input. SEL is low default through an internal 75kΩ pulldown resistor selecting Db.
Setting SEL to high selects Da.
5
VEE
6
Q
Differential LVECL/LVPECL Output. Open Emitter. Q is default high when inputs are open.
7
Q
Differential LVECL/LVPECL Output. Open Emitter. Q is default low when inputs are open.
8
VCC
Exposed
Paddle
EP
Negative Supply Voltage
Positive Supply Voltage. Bypass VCC to VEE with 0.1µF and 0.01µF capacitors as close to the device as
possible, with the smaller capacitor closest to the IC.
Exposed paddle (MAX9380ESA-EP only). Connect to VEE internally. See package dimension.
VIH
50%
50%
Da WHEN SEL = HIGH
OR
Db WHEN SEL = LOW
VIL
tPLH1
tPHL1
VOH
Q
SINGLE-ENDED WAVEFORMS
VOH - VOL
VOL
Q
80%
VOH - VOL
80%
0 (DIFFERENTIAL)
DIFFERENTIAL WAVEFORM
VOH - VOL
20%
20%
Q-Q
tR
tF
Figure 1. Data Input-to-Output Propagation Delay and Transition Timing Diagram
_______________________________________________________________________________________
5
MAX9380
Pin Description
MAX9380
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
VIH
50%
Da = HIGH
Db = LOW
SEL
50%
VIL
tPHL2
tPLH2
Q
VOH
SINGLE-ENDED WAVEFORMS
Q
VOL
Figure 2. Select Input-to-Output Propagation Delay and Transition Timing Diagram
Detailed Description
The MAX9380 is a high-speed, low-jitter 2:1 multiplexer
designed for clock and data distribution. The device
selects one of the two single-ended inputs.
The multiplexer function is controlled by the singleended SEL input. A high level on the SEL input selects
the single-ended data input Da. Similarly, a low level on
the SEL input selects the single-ended data input Db.
The selected input is converted to a differential signal
at the Q and Q outputs.
The inputs Da, Db, and SEL have a 75kΩ pulldown to
VEE. This ensures that an open input has a low state. All
inputs can be driven from a single-ended LVECL/
LVPECL signal or to VEE and VCC.
Applications Information
LVECL/LVPECL
In LVECL systems, the positive supply voltage is conventionally chosen to be system ground. This arrangement produces the best noise immunity since ground is
normally a system-wide reference voltage. Operate the
MAX9380 with VCC = 0 (ground) and VEE = -3.3V for an
LVECL system.
The MAX9380 operates in LVPECL systems by connecting VEE to ground and VCC to a positive supply
voltage. Connect V CC = +3.3V and V EE = 0 for an
LVPECL system.
6
Power-Supply Bypassing
Adequate power-supply bypassing is necessary to
maximize the performance and noise immunity. This is
particularly true of use in an LVPECL system where the
power-supply voltage is used as a reference. Bypass
VCC to VEE with high-frequency surface-mount ceramic
0.1µF and 0.01µF capacitors in parallel as close to the
device as possible, with the 0.01µF capacitor closest to
the device pins. Use multiple parallel vias for ground
plane connection to minimize inductance.
Circuit Board Traces
Input and output trace characteristics affect the performance of ECL devices. Connect each of the MAX9380
inputs and outputs to a 50Ω characteristic impedance
trace. Avoid discontinuities in differential impedance
and maximize common-mode noise immunity by maintaining the distance between differential traces and
avoid sharp corners. Minimize the number of vias to
prevent impedance discontinuities. Reduce reflections
by maintaining the 50Ω characteristic impedance
through connectors and across cables. Minimize skew
by matching the electrical length of the traces.
Output Termination
Terminate outputs through 50Ω to VCC - 2V or use an
equivalent Thevenin termination. When a single-ended
signal is taken from a differential output, terminate both
outputs. For example, if the Q output of the MAX9380 is
connected to a single-ended input, terminate both the
Q and Q outputs.
_______________________________________________________________________________________
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
8LUMAXD.EPS
Package Information
_______________________________________________________________________________________
7
MAX9380
Chip Information
TRANSISTOR COUNT: 242
PROCESS: Bipolar
Single-Ended-to-Differential
LVECL/LVPECL 2:1 Multiplexer
8L, SOIC EXP. PAD.EPS
MAX9380
Package Information (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 2001 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.