MAXIM MAX9377EUA

19-2846; Rev 1; 7/03
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
Features
♦ Guaranteed 2GHz Switching Frequency
♦ Accept LVDS/LVPECL/Anything Inputs
♦ Pin-Selectable Divide-by-Four Function
♦ 421ps (typ) Propagation Delays (MAX9377)
♦ 30ps (max) Pulse Skew
♦ 2psRMS (max) Random Jitter
♦ Minimum 100mV Differential Input to Guarantee
AC Specifications
♦ Temperature-Compensated LVPECL Output
♦ +3.0V to +3.6V Power-Supply Operating Range
♦ ESD Protection: >2kV Human Body Model (HBM)
Ordering Information
Applications
Backplane Logic Standard Translation
PART
TEMP RANGE
PIN-PACKAGE
LAN
MAX9377EUA
-40°C to +85°C
8 µMAX
WAN
MAX9378EUA
-40°C to +85°C
8 µMAX
DSLAM
DLC
Functional Diagram
Pin Configuration
TOP VIEW
SEL
RST
SEL
1
8
VCC
IN
2
7
OUT
IN
3
6
OUT
5
RST
LVDS/ANY
GND 4
MAX9377
MAX9378
÷4
LVPECL (MAX9377)
OR
LVDS (MAX9378)
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9377/MAX9378
General Description
The MAX9377/MAX9378 are fully differential, highspeed, low-jitter anything-to-LVPECL and anything-toLVDS translators, respectively, with a selectable
divide-by-four function. Low propagation delay and
high speed make them ideal for various high-speed
network routing and backplane applications at speeds
up to 2GHz in nondivide mode.
The MAX9377/MAX9378 accept any differential input
signal within the supply rails and with minimum amplitude of 100mV. Inputs are fully compatible with the
LVDS, LVPECL, HSTL, and CML differential signaling
standards. The MAX9377 outputs are LVPECL and
have sufficient current to drive 50Ω transmission lines.
The MAX9378 outputs are LVDS and conform to the
ANSI EIA/TIA-644 LVDS standard.
The MAX9377/MAX9378 are available in 8-pin µMAX
packages and operate from a single +3.3V supply over
the -40°C to +85°C temperature range.
MAX9377/MAX9378
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
ABSOLUTE MAXIMUM RATINGS
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (IN, IN, OUT, OUT) ..............................≥2kV
Soldering Temperature (10s) ...........................................+300°C
VCC to GND ...........................................................-0.3V to +4.1V
Inputs (IN, IN, RST, SEL) ............................-0.3V to (VCC + 0.3V)
IN to IN................................................................................±3.0V
Short-Circuit Duration (MAX9378 OUT, OUT) ............Continuous
Continuous Output Current .................................................50mA
Surge Output Current .......................................................100mA
Continuous Power Dissipation (TA = +70°C)
8-µMAX (derate 5.9mW/°C above +70°C) ...............470.6mW
θJA in Still Air...........................................................+170°C/W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage
VCM = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%,
TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless
otherwise noted.) (Notes 1, 2, 3)
PARAMETER
SYMBOL
CONDITIONS
-40°C
MIN
TYP
+25°C
MAX
MIN
VCC
2.0
GND
0.8
0
150
-20
TYP
+85°C
TYP
MAX
UNITS
MAX
MIN
VCC
2.0
GND
0.8
GND
0.8
V
0
150
0
150
µA
+20
-20
+20
-20
+20
µA
+100
-100
+100
-100
+100
mV
LVCMOS/LVTTL INPUTS (RST, SEL)
Input High
Voltage
VIH
Input Low Voltage
VIL
Input High Current
IIH
VIN = VCC or 2V
Input Low Current
IIL
VIL = 0 or 0.8V
2.0
VCC
V
DIFFERENTIAL INPUTS (IN, IN)
Differential Input
Threshold
VTHD
Input Current
IIN, I IN
Input CommonMode Voltage
VCM
-100
±6
±6
±6
VIN, V IN = VCC or 0V
-20
+20
-20
+20
-20
+20
µA
Figure 1
0.05
VCC 0.05
0.05
VCC 0.05
0.05
VCC 0.05
V
LVPECL OUTPUTS (OUT, OUT) (MAX9377)
Single-Ended
Output High
Voltage
VOH
Figure 3
VCC 1.085
VCC 1.033
VCC - VCC - VCC 0.880 1.025 0.992
VCC0.880
VCC - VCC 1.025 0.978
VCC 0.880
V
Single-Ended
Output Low
Voltage
VOL
Figure 3
VCC 1.830
VCC 1.755
VCC - VCC - VCC 1.620 1.810 1.717
VCC 1.620
VCC - VCC 1.810 1.699
VCC 1.620
V
VOH VOL
Figure 3
595
725
595
725
250
370
250
363
Differential Output
Voltage
595
725
250
348
mV
LVDS OUTPUTS (OUT, OUT) (MAX9378)
Differential Output
Voltage
2
VOD
Figure 2
450
450
_______________________________________________________________________________________
450
mV
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage
VCM = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%,
TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless
otherwise noted.) (Notes 1, 2, 3)
PARAMETER
Change in
Magnitude of VOD
Between
Complementary
Output States
Offset CommonMode Voltage
Change in
Magnitude of VOS
Between
Complementary
Output States
SYMBOL
CONDITIONS
-40°C
MIN
+25°C
TYP
MAX
1.0
20
MIN
+85°C
TYP
MAX
1.0
20
MIN
UNITS
TYP
MAX
1.0
20
mV
1.375
V
∆VOD
Figure 2
VOS
Figure 2
∆VOS
Figure 2
0.1
20
0.1
20
0.1
20
mV
VID = ±100mV, one
output GND, other
output open or
shorted to GND
19.0
24
19.0
24
19.0
24
mA
VID = ±100mV,
VOUT = V OUT
4.0
12
4.0
12
4.0
12
mA
13
22
15
22
17
22
Output ShortCircuit Current,
Either Output
Shorted to GND
IOS
Output ShortCircuit Current,
Outputs Shorted
Together
IOSAB
1.125
1.375 1.125 1.250
1.375
1.125
POWER SUPPLY
MAX9377, all pins
open except VCC,
GND
Supply Current
mA
ICC
MAX9378, RL = 100,
quiescent, inputs are
open
18.0
30
20
30
22
30
_______________________________________________________________________________________
3
MAX9377/MAX9378
DC ELECTRICAL CHARACTERISTICS (continued)
MAX9377/MAX9378
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤ 1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage VCM = 0.05V to (VCC - 0.05V), LVPECL outputs
terminated with 50Ω ±1% to (VCC - 2.0V) MAX9377, LVDS outputs terminated with RL = 100Ω ±1% (MAX9378), TA = -40°C to +85°C.
Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.)
(Note 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.8
1.0
ns
Reset-to-Differential Output Low
Delay
tDR
Figure 4
Reset-to-Input Clock Setup Time
tSET
Figure 4
Clock-to-Divider Output
Propagation Delay
tPCO
Figure 4 (Note 5)
0.6
1.0
ns
SEL to Switched Output Delay
tSEL
Figure 5
0.3
0.6
ns
Switching Frequency
fMAX
VOH - VOL ≥ 250mV
2.0
2.5
Propagation Delay Low to High
tPLH
Figure 3, SEL = 0
250
421
600
ps
Propagation Delay High to Low
tPHL
Figure 3, SEL = 0
250
421
600
ps
0.5
ns
MAX9377
Pulse Skew |tPLH -tPHL|
GHz
tSKEW
(Note 6)
6
30
ps
Output Low-to-High Transition
Time (20% to 80%)
tR
Figure 3
116
220
ps
Output High-to-Low Transition
Time (20% to 80%)
tF
Figure 3
116
220
ps
Added Random Jitter
tRJ
fIN = 1.34GHz (Note 7), SEL = 0
0.7
2
ps(RMS)
MAX9378
Switching Frequency
fMAX
VOD ≥ 250mV
2.0
2.5
Propagation Delay Low to High
tPLH
Figure 3, SEL = 0
250
363
600
ps
Propagation Delay High to Low
tPHL
Figure 3, SEL = 0
250
367
600
ps
tSKEW
Figure 3 (Note 6)
3
30
ps
Pulse Skew |tPLH - tPHL|
GHz
Output Low-to-High Transition
Time (20% to 80%)
tR
Figure 2
93
220
ps
Output High-to-Low Transition
Time (20% to 80%)
tF
Figure 2
93
220
ps
Added Random Jitter
tRJ
fIN = 1.34GHz (Note 7), SEL = 0
0.8
2
ps(RMS)
Note 1: Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHD, VID,
VOD, and ∆VOD.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at TA = +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4: Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5: tPCO is the delay associated with the frequency-divider function. The total delay when divide-by-four is selected is tPCO +
tPLH.
Note 6: tSKEW is the magnitude difference of differential propagation delays for the same output under same conditions; tSKEW =
|tPHL - tPLH|.
Note 7: Device jitter added to the input signal.
4
_______________________________________________________________________________________
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
30
MAX9378
MAX9377
20
10
MAX9377
700
600
500
480
460
tPHL (MAX9377)
tPLH (MAX9377)
440
420
tPLH (MAX9378)
400
380
360
tPHL (MAX9378)
340
MAX9378
400
500
MAX9377/78 toc03
800
320
0
300
500
1000
1500
2000
300
0
500
FREQUENCY (MHz)
1000
1500
2000
FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (°C)
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
140
130
MAX9377/78 toc04
0
OUTPUT RISE/FALL TIME (ps)
SUPPLY CURRENT (mA)
40
900
MAX9377/78 toc02
MAX9377 NO LOAD
OUTPUT AMPLITUDE (mV)
MAX9377/78 toc01
50
PROPAGATION DELAY
vs. TEMPERATURE
OUTPUT AMPLITUDE vs. FREQUENCY
PROPAGATION DELAY (ps)
SUPPLY CURRENT vs. FREQUENCY
tF (MAX9377)
120
110
tR (MAX9377)
100
tF (MAX9378)
90
80
tR (MAX9378)
70
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
5
MAX9377/MAX9378
Typical Operating Characteristics
(VCC = +3.3V, differential input voltage |VID| = 0.2V, VCM = 1.2V, input frequency = 500MHz, outputs terminated with 50Ω ±1% to
VCC - 2.0V (MAX9377), outputs terminated with 100Ω ±1% (MAX9378), TA = +25°C, unless otherwise noted.)
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
MAX9377/MAX9378
Pin Description
PIN
NAME
FUNCTION
Frequency Divider Select Input. High = divide by four, low = no division. Internal 75kΩ pulldown to
GND.
1
SEL
2
IN
Differential LVDS/Any Noninverting Input
3
IN
Differential LVDS/Any Inverting Input
4
GND
5
RST
6
OUT
7
OUT
8
VCC
Ground
Frequency Divider Reset Input. Active high, asynchronous, reset. Internal 75kΩ pulldown to GND.
MAX9377
Differential LVPECL Inverting Output. Terminate with 50Ω ±1% to VCC - 2V.
MAX9378
Inverting LVDS Output. Terminate to OUT with 100Ω ±1%.
MAX9377
Differential LVPECL Noninverting Output. Terminate with 50Ω ±1% to VCC - 2V.
MAX9378
Noninverting LVDS Output. Terminate to OUT with 100Ω ±1%.
Positive Supply. Bypass from VCC to GND with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device
Detailed Description
The MAX9377/MAX9378 are fully differential, highspeed, low-jitter anything-to-LVPECL and anything-toLVDS translators, respectively, with a selectable
divide-by-four function. Low propagation delay and
high speed make them ideal for various high-speed
network routing and backplane applications at speeds
up to 2GHz in nondivide mode.
The MAX9377/MAX9378 accept any differential input
signals within the supply rails and with a minimum
amplitude of 100mV. Inputs are fully compatible with
the LVDS, LVPECL, HSTL, and CML differential signaling standards. The MAX9377 outputs are LVPECL and
have sufficient current to drive 50Ω transmission lines.
The MAX9378 outputs are LVDS and conform to the
ANSI EIA/TIA-644 LVDS standard.
Inputs
Inputs have a wide common-mode range of 0.05V to
(VCC - 0.05V), which accommodates any differential signals within the supply rails, and requires a minimum of
100mV to switch the outputs. This allows the
MAX9377/MAX9378 inputs to support virtually any differential signaling standard.
RST and SEL Inputs
The frequency-divide functions are controlled by two
LVCMOS/LVTTL inputs, RST and SEL. SEL selects
either the divide-by-four function or a no-division function as shown in Table 1. RST, an asynchronous activehigh input, resets the divide-by-four within the device
and places the circuits into a known state. Setting RST
6
Table 1. SEL AND RST Truth Table
RST
SEL
OUTPUT
X
L or open
H
H
Outputs are placed in differential low.
No frequency division.
L
H
Divide-by-four function.
high when powering up the device with SEL high prevents the unknown states with the divider from being
propagated to the outputs. If the device is powered up
with SEL high but without asserting RST, the outputs
are only guaranteed to be 1/4th the input frequency
after 2.5 cycles have been applied to the input.
LVPECL Outputs (MAX9377)
The MAX9377 LVPECL outputs are emitter followers
that require external resistive paths to a voltage source
(VT = VCC - 2.0V typ) more negative than worst-case
VOL for proper static and dynamic operation. When
properly terminated, the outputs generate steady-state
voltage levels, VOL or VOH with fast transition edges
between state levels. Output current always flows into
the termination during proper operation.
LVDS Outputs (MAX9378)
The MAX9378 LVDS outputs require a resistive load to
terminate the signal and complete the transmission
loop. Because the device switches current and not voltage, the actual output voltage swing is determined by
the value of the termination resistor. With a 3.5mA typical output current, the MAX9378 produces an output
voltage of 350mV when driving a 100Ω load.
_______________________________________________________________________________________
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
DRV
VCC
VOD
OUT
VOS
RL / 2
VID
CL
VCM (MAX) = VCC - 0.05V
MAX9377/MAX9378
RL / 2
OUT
CL
GND
VOD(+)
80%
VID
80%
VCM (MIN) = 0.05V
0V
GND
VOD(-)
20%
20%
OUT - OUT
tR
Figure 1. Differential Input Definition
tF
Figure 2. LVDS Output Load and Transition Times
Applications Information
IN
LVPECL Output Termination (MAX9377)
Terminate the MAX9377 LVPECL outputs with 50Ω to
(VCC - 2V) or use equivalent Thevenin terminations.
Terminate OUT and OUT with identical termination on
each for low output distortion. When a single-ended
signal is taken from the differential output, terminate
both OUT and OUT. Ensure that output currents do not
exceed the current limits as specified in the Absolute
Maximum Ratings. Under all operating conditions, the
device’s total thermal limits should be observed.
LVDS Output Termination (MAX9378)
The MAX9378 LVDS outputs are current-steering
devices; no output voltage is generated without a termination resistor. The termination resistors should match
the differential impedance of the transmission line.
Output voltage levels are dependent upon the value of
the termination resistor. The MAX9378 is optimized for
point-to-point communication with the 100Ω termination
resistor at the receiver inputs. Termination resistance
values may range between 90Ω and132Ω, depending
on the characteristic impedance of the transmission
medium.
Supply Bypassing
Bypass VCC to ground with high-frequency surfacemount ceramic 0.1µF and 0.01µF capacitors. Place the
capacitors as close to the device as possible with the
0.01µF capacitor closest to the device pins.
Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
VID OR (VIH - VIL)
0V DIFFERENTIAL
IN
tPHL
tPLH
VOH
OUT
VOD OR (VOH - VOL)
VOL
OUT
80%
80%
+VOD OR +(VOH - VOL)
DIFFERENTIAL OUTPUT
WAVEFORM
OUT - OUT
0V DIFFERENTIAL
-VOD OR -(VOH - VOL)
20%
tR
20%
tF
Figure 3. Differential Input-to-Output Propagation Delay Timing
Diagram
Maintaining integrity is accomplished in part by reducing signal reflections and skew, and increasing common-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ω characteristic impedance of the traces. Avoid discontinuities by maintaining the distance between differential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
_______________________________________________________________________________________
7
MAX9377/MAX9378
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
IN
IN
tPLH
1 OUT
IN/4
tPCO
4 OUT
tPCO
RST
SEL
OUT
tDR
tSET
tSEL
Figure 4. Frequency Divider and Reset Timing Diagram
Figure 5. Frequency Select Delay Timing Diagram
Chip Information
MAX9377 TRANSISTOR COUNT: 614
MAX9378 TRANSISTOR COUNT: 614
PROCESS: Bipolar
8
_______________________________________________________________________________________
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
8
INCHES
DIM
A
A1
A2
b
E
ÿ 0.50±0.1
H
c
D
e
E
H
0.6±0.1
L
1
1
α
0.6±0.1
S
BOTTOM VIEW
D
MIN
0.002
0.030
MAX
0.043
0.006
0.037
0.014
0.010
0.007
0.005
0.120
0.116
0.0256 BSC
0.120
0.116
0.198
0.188
0.026
0.016
6∞
0∞
0.0207 BSC
8LUMAXD.EPS
4X S
8
MILLIMETERS
MAX
MIN
0.05
0.75
1.10
0.15
0.95
0.25
0.36
0.13
0.18
2.95
3.05
0.65 BSC
2.95
3.05
4.78
5.03
0.41
0.66
0∞
6∞
0.5250 BSC
TOP VIEW
A1
A2
A
α
c
e
b
L
SIDE VIEW
FRONT VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
21-0036
REV.
J
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX9377/MAX9378
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)