19-2809; Rev 0; 4/03 LVDS/Anything-to-LVPECL/LVDS Dual Translator Features ♦ Guaranteed 2GHz Switching Frequency ♦ Accepts LVDS/LVPECL/Anything Inputs ♦ 421ps (typ) Propagation Delays ♦ 30ps (max) Pulse Skew ♦ 2psRMS (max) Random Jitter ♦ Minimum 100mV Differential Input to Guarantee AC Specifications ♦ Temperature-Compensated LVPECL Output ♦ +3.0V to +3.6V Power-Supply Operating Range ♦ >2kV ESD Protection (Human Body Model) Ordering Information Applications Backplane Logic Standard Translation LVDS-to-LVPECL, LVPECL-to-LVDS Up/Downconverters PART MAX9376EUB TEMP RANGE PIN-PACKAGE -40°C to +85°C 10 µMAX LANs WANs Pin Configuration DSLAMs DLCs MAX9376 TOP VIEW IN1 1 10 VCC ANYTHING LVDS IN1 2 9 OUT1 OUT2 3 8 OUT1 OUT2 4 7 IN2 GND 5 6 IN2 LVPECL ANYTHING Functional Diagram appears at end of data sheet. µMAX ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9376 General Description The MAX9376 is a fully differential, high-speed, LVDS/anything-to-LVPECL/LVDS dual translator designed for signal rates up to 2GHz. One channel is LVDS/anything-to-LVPECL translator and the other channel is LVDS/anything-to-LVDS translator. The MAX9376’s extremely low propagation delay and high speed make it ideal for various high-speed network routing and backplane applications. The MAX9376 accepts any differential input signal within the supply rails and with minimum amplitude of 100mV. Inputs are fully compatible with the LVDS, LVPECL, HSTL, and CML differential signaling standards. LVPECL outputs have sufficient current to drive 50Ω transmission lines. LVDS outputs conform to the ANSI EIA/TIA-644 LVDS standard. The MAX9376 is available in a 10-pin µMAX package and operates from a single +3.3V supply over the -40°C to +85°C temperature range. MAX9376 LVDS/Anything-to-LVPECL/LVDS Dual Translator ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +4.1V Inputs (IN_, IN_) .........................................-0.3V to (VCC + 0.3V) IN to IN ................................................................................±3.0V Continuous Output Current .................................................50mA Surge Output Current .......................................................100mA Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 6.9mW/°C above +70°C) ..........155mW θJA in Still Air ..........................................................+144°C/W Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C ESD Protection Human Body Model (IN_, IN_, OUT_, OUT_) ..................≥2kV Soldering Temperature (10s) ...........................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage VCM = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.) (Notes 1, 2, 3) PARAMETER SYMBOL CONDITIONS -40°C MIN TYP +25°C MAX MIN -100 +100 TYP +85°C TYP MAX UNITS MAX MIN -100 +100 -100 +100 mV DIFFERENTIAL INPUTS (IN_, IN_ ) Differential Input Threshold VTHD Input Current IIN, I IN VIN, V IN = VCC or 0V -20 +20 -20 +20 -20 +20 µA Input Common-Mode Voltage VCM Figure 1 0.05 VCC 0.05 0.05 VCC 0.05 0.05 VCC 0.05 V LVPECL OUTPUTS (OUT1, OUT1) Single-Ended Output High Voltage VOH Figure 3 VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC 1.085 1.035 0.880 1.025 0.985 0.880 1.025 0.976 0.880 V Single-Ended Output Low Voltage VOL Figure 3 VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC - VCC 1.830 1.745 1.620 1.810 1.694 1.620 1.810 1.681 1.620 V Differential Output Voltage VOH VOL Figure 3 595 710 VOD Figure 2 250 366 450 |∆VOD| Figure 2 1.0 20 VOS Figure 2 |∆VOS| Figure 2 1.0 20 1.0 20 VID = ±100mV, one output GND, other output open or shorted to GND 19 24 18 24 595 710 250 352 450 1.0 20 595 710 mV 250 339 450 mV 1.0 20 mV 1.375 V 1.0 20 mV 18 24 mA LVDS OUTPUTS (OUT2, OUT2 ) Differential Output Voltage Change in Magnitude of VOD Between Complementary Output States Offset Common-Mode Voltage Change in Magnitude of VOS Between Complementary Output States Output Short-Circuit Current, Either Output Shorted to GND 2 |IOS| 1.125 1.375 1.125 1.250 1.375 1.125 _______________________________________________________________________________________ LVDS/Anything-to-LVPECL/LVDS Dual Translator (VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage VCM = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.) (Notes 1, 2, 3) PARAMETER SYMBOL CONDITIONS |IOSAB| Output Short-circuit Current, Outputs Shorted Together -40°C MIN +25°C TYP MAX VID = ±100mV, VOUT_+ = VOUT_- 4.0 All pins open except VCC and GND with LVDS outputs (OUT2, OUT2) loaded with differential 100Ω 24 MIN +85°C TYP MAX 12 4.0 40 29 MIN UNITS TYP MAX 12 4.0 12 mA 40 31 40 mA SUPPLY Supply Current ICC AC ELECTRICAL CHARACTERISTICS (VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤ 1.34GHz, differential input transition time = 125ps (20% to 80%), input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage (VCM) = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.) (Note 4) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LVPECL OUTPUTS Switching Frequency fMAX VOH - VOL ≥ 250mV 2.0 2.5 Propagation Delay Low to High tPLH Figure 3 250 421 600 Propagation Delay High to Low tPHL Figure 3 250 421 600 ps Pulse Skew |tPLH - tPHL| Output Low-to-High Transition tSKEW 6 30 ps ps Figure 3 (Note 5) GHz ps tR Figure 3 116 220 Output High-to-Low Transition tF Figure 3 119 220 ps Added Random Jitter tRJ fIN = 1.34GHz (Note 6) 0.7 2 ps(RMS) LVDS OUTPUTS fMAX VOD ≥ 250mV 2.0 2.5 Propagation Delay Low to High tPLH Figure 3 250 363 600 Propagation Delay High to Low tPHL Figure 3 250 367 600 ps Figure 3 (Note 5) 5 30 ps Switching Frequency Pulse Skew |tPLH - tPHL| tSKEW GHz ps Output Low-to-High Transition Time (20% to 80%) tR Figure 2 93 220 ps Output High-to-Low Transition Time (20% to 80%) tF Figure 2 91 220 ps _______________________________________________________________________________________ 3 MAX9376 DC ELECTRICAL CHARACTERISTICS (continued) AC ELECTRICAL CHARACTERISTICS (continued) (VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤ 1.34GHz, differential input transition time = 125ps (20% to 80%), input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage (VCM) = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω ±1% to (VCC - 2.0V), LVDS outputs terminated with 100Ω ±1%, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.) (Note 4) PARAMETER SYMBOL Added Random Jitter tRJ CONDITIONS MIN fIN = 1.34GHz (Note 6) TYP MAX UNITS 0.8 2 ps(RMS) Note 1: Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHD, VID, VOD, and ∆VOD. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters production tested at TA = +25°C and guaranteed by design and characterization over the full operating temperature range. Note 4: Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma. Note 5: tSKEW is the magnitude difference of differential propagation delays for the same output under same conditions; tSKEW = |tPHL - tPLH|. Note 6: Device jitter added to the input signal. Typical Operating Characteristics (VCC = +3.3V, differential input voltage |VID| = 0.2V, VCM = 1.2V, input frequency = 500MHz, LVPECL outputs terminated with 50Ω ±1% to VCC - 2.0V, LVDS outputs terminated with 100Ω ±1%, TA = +25°C, unless otherwise noted.) OUTPUT AMPLITUDE vs. FREQUENCY SUPPLY CURRENT vs. FREQUENCY 800 OUTPUT AMPLITUDE (mV) 40 30 20 MAX9376 toc02 LVPECL OUTPUTS UNLOADED 10 LVPECL 700 600 500 LVDS 400 300 0 0 500 1000 1500 0 2000 500 480 tPLH (LVPECL) tPHL (LVPECL) 420 400 tPLH (LVDS) 380 360 tPHL (LVDS) 340 130 tF (LVPECL) 2000 120 110 tR (LVPECL) tF (LVDS) 100 90 tR (LVPECL) 80 320 70 300 -40 -15 10 35 TEMPERATURE (°C) 4 140 OUTPUT RISE/FALL TIME (ps) MAX9376 toc03 500 440 1500 OUTPUT RISE/FALL TIME vs. TEMPERATURE PROPAGATION DELAY vs. TEMPERATURE 460 1000 FREQUENCY (MHz) FREQUENCY (MHz) MAX9376 toc04 SUPPLY CURRENT (mA) 900 MAX9376 toc01 50 PROPAGATION DELAY (ps) MAX9376 LVDS/Anything-to-LVPECL/LVDS Dual Translator 60 85 -40 -15 10 35 TEMPERATURE (°C) _______________________________________________________________________________________ 60 85 LVDS/Anything-to-LVPECL/LVDS Dual Translator PIN NAME 1 IN1 Differential LVDS/Anything Noninverting Input 1 FUNCTION 2 IN1 Differential LVDS/Anything Inverting Input 1 3 OUT2 Differential LVDS Noninverting Output 2. Terminate with 100Ω ±1% to OUT2. 4 OUT2 Differential LVDS Inverting Output 2. Terminate with 100Ω ±1% to OUT2. 5 GND 6 IN2 Differential LVDS/Anything Inverting Input 2 7 IN2 Differential LVDS/Anything Noninverting Input 2 8 OUT1 Differential LVPECL Inverting Output. Terminate with 50Ω ±1% to VCC - 2V. 9 OUT1 Differential LVPECL Noninverting Output. Terminate with 50Ω ±1% to VCC - 2V. 10 VCC Ground Positive Supply. Bypass from VCC to GND with 0.1µF and 0.01µF ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. Detailed Description The MAX9376 is a fully differential, high-speed, LVDS/anything-to-LVPECL/LVDS dual translator designed for signal rates up to 2GHz. One channel is LVDS/anything-to-LVPECL translator and the other channel is LVDS/anything-to-LVDS translator. The MAX9376’s extremely low propagation delay and high speed make it ideal for various high-speed network routing and backplane applications. The MAX9376 accepts any differential input signal within the supply rails and with a minimum amplitude of 100mV. Inputs are fully compatible with the LVDS, LVPECL, HSTL, and CML differential signaling standards. LVPECL outputs have sufficient current to drive 50Ω transmission lines. LVDS outputs conform to the ANSI EIA/TIA-644 LVDS standard. Inputs Inputs have a wide common-mode range of 0.05V to VCC - 0.05V, which accommodates any differential signals within rails, and requires a minimum of 100mV to switch the outputs. This allows the MAX9376 inputs to support virtually any differential signaling standard. LVPECL Outputs The MAX9376 LVPECL outputs are emitter followers that require external resistive paths to a voltage source (VT = VCC - 2.0V typ) more negative than worst-case VOL for proper static and dynamic operation. When properly terminated, the outputs generate steady-state voltage levels, VOL or VOH with fast transition edges between state levels. Output current always flows into the termination during proper operation. LVDS Outputs The MAX9376 LVDS outputs require a resistive load to terminate the signal and complete the transmission loop. Because the device switches current and not voltage, the actual output voltage swing is determined by the value of the termination resistor. With a 3.5mA typical output current, the MAX9376 produces an output voltage of 350mV when driving a 100Ω load. _______________________________________________________________________________________ 5 MAX9376 Pin Description MAX9376 LVDS/Anything-to-LVPECL/LVDS Dual Translator Applications Information VCC LVPECL Output Termination VID VCM (MAX) VID VCM (MIN) Terminate the MAX9376 LVPECL outputs with 50Ω to (VCC - 2V) or use equivalent Thevenin terminations. Terminate OUT1 and OUT1 with identical termination on each for low output distortion. When a single-ended signal is taken from the differential output, terminate both OUT1 and OUT1. Ensure that output currents do not exceed the current limits as specified in the Absolute Maximum Ratings. Under all operating conditions, the device’s total thermal limits should be observed. GND Figure 1. Input Definition LVDS Output Termination RL / 2 OUT2 DRV VOD OUT2 VOS RL / 2 CL CL GND VOD(+) 80% 80% 0V VOD(-) 20% 20% OUT2 - OUT2 tR tF The MAX9376 LVDS outputs are current-steering devices; no output voltage is generated without a termination resistor. The termination resistors should match the differential impedance of the transmission line. Output voltage levels are dependent upon the value of the termination resistor. The MAX9376 is optimized for point-to-point interface with 100Ω termination resistors at the receiver inputs. Termination resistance values may range between 90Ω and132Ω, depending on the characteristic impedance of the transmission medium. Supply Bypassing Bypass VCC to ground with high-frequency surfacemount ceramic 0.1µF and 0.01µF capacitors. Place the capacitors as close to the device as possible with the 0.01µF capacitor closest to the device pins. Traces Figure 2. LVDS Output Load and Transition Times IN VID OR (VIH - VIL) 0V DIFFERENTIAL IN tPHL tPLH VOH OUT VOD OR (VOH - VOL) VOL OUT 80% 80% Circuit board trace layout is very important to maintain the signal integrity of high-speed differential signals. Maintaining integrity is accomplished in part by reducing signal reflections and skew, and increasing common-mode noise immunity. Signal reflections are caused by discontinuities in the 50Ω characteristic impedance of the traces. Avoid discontinuities by maintaining the distance between differential traces, not using sharp corners or using vias. Maintaining distance between the traces also increases common-mode noise immunity. Reducing signal skew is accomplished by matching the electrical length of the differential traces. +VOD OR +(VOH - VOL) DIFFERENTIAL OUTPUT WAVEFORM OUT - OUT 0V DIFFERENTIAL Chip Information -VOD OR -(VOH - VOL) 20% tR 20% tF TRANSISTOR COUNT: 614 PROCESS: Bipolar Figure 3. Differential Input-to-Output Propagation Delay Timing Diagram 6 _______________________________________________________________________________________ LVDS/Anything-to-LVPECL/LVDS Dual Translator 10LUMAX.EPS e 4X S 10 10 INCHES H ÿ 0.50±0.1 0.6±0.1 1 1 0.6±0.1 BOTTOM VIEW TOP VIEW D2 MILLIMETERS MAX DIM MIN 0.043 A 0.006 A1 0.002 A2 0.030 0.037 0.120 D1 0.116 0.118 0.114 D2 0.116 0.120 E1 E2 0.114 0.118 H 0.187 0.199 L 0.0157 0.0275 L1 0.037 REF b 0.007 0.0106 e 0.0197 BSC c 0.0035 0.0078 0.0196 REF S α 0∞ 6∞ MAX MIN 1.10 0.15 0.05 0.75 0.95 3.05 2.95 3.00 2.89 3.05 2.95 2.89 3.00 4.75 5.05 0.40 0.70 0.940 REF 0.177 0.270 0.500 BSC 0.090 0.200 0.498 REF 0∞ 6∞ E2 GAGE PLANE A2 c A b A1 α E1 D1 L L1 FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 10L uMAX/uSOP APPROVAL DOCUMENT CONTROL NO. 21-0061 REV. I 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX9376 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)