J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
``````````````````````````````````` ᄂቶ
3ሣࠈాᅪNBY8436ᎌ27ৈJ0PాLjᒦ۞౪9വᅎᅴ
ါၒ߲ਜ਼ 9 വ J0PLjඛവ J0P భኡᐋดݝ౯ਜ਼ၾܤଶހă
9ৈ࣡ాᆐᅎᅴါၒ߲Lj9ৈJ0Pాభᔫ൝ၒྜྷധ
ఎവၒ߲Lj࣡ాᎌ,7Wਭኹۣઐă
♦ 511lI{ĂJ3Dࠈቲా
ୈೌኚପ၁Ⴥᎌၒྜྷ࣡ాࡼᓨზܤછ)ၾზଶ*ހLjINT
ၒ߲ᒎာᓨზࡼܤછăჄࡀᒦࣥถ৫ဣሚ࣪ၾზܤછࡼଶ
ހăࡩႲઁᄰਭࠈቲాषᆰNBY8436ဟLjྀੜࡗࠀಯᒦ
ࣥ߹༹ۻăᅎᅴါၒ߲ऄࢾᇢ၃࢟ഗᆐ 31nBLjభདࣅ
MFEăRSTၒྜྷభࠈቲా༹ഃLjᒫᒏྀੜᎧNBY8436
ࡼJ3Dᄰቧă
NBY8436ᎌೝৈ5࢟ຳ൝ၒྜྷ࣡Ljᑽߒ27ৈJ3D࠭
ᒍă࠭ᒍથถᒙ J0P ాࡼ࢟ᓨზLj݀ጲ 5 ৈ࣡ాᆐ
ጙᔝဧถணᒏ51lΩดݝ౯࢟ᔜă
NBY8436 ဵ୭ରྏࡼ࣡ా౫ᐱᇹޘອᒄጙLjকᇹ
ޘອᄋభኡࡼၒྜྷ࣡ాĂఎധJ0Pਜ਼ᅎᅴါၒ߲࣡ా
)ݬܭ2*ă
♦ ,2/82Wᒗ,6/6Wᔫ࢟ኹ
♦ 9വᅎᅴါၒ߲
♦ 9ৈധఎവJ0PLjऄࢾᇢྜྷ࢟ഗᆐ31nB
♦ J0Pాᎌ,7Wਭኹۣઐ
♦ భኡᐋJ0Pాࡼ࢟෦ཱྀᓨზ
♦ ჄࡀၾზܤછLjᏤᏴࣗݷᔫᒄମቲଶހ
♦ ၒྜྷखညܤછဟޘညINTᒦࣥ
♦ ᄰਭBE1ਜ਼BE3ၒྜྷኡᐋ27ৈ࠭ᒍ
♦ ࢅࡗ૦࢟ഗǖ1/7μB! )࢜ቯᒋ*
♦ .51°Dᒗ,236°Dᔫᆨࣞपᆍ
``````````````````````````````` ࢾ৪ቧᇦ
NBY8436ᄋ35୭RTPQਜ਼URGOॖᓤLjᔫ᎖.51°Dᒗ
,236°Dޱᆨࣞपᆍă
PART
``````````````````````````````````` ።
MAX7325AEG+
-40°C to +125°C 24 QSOP
MAX7325ATG+
-40°C to +125°C
क़ᆷ࢟જ
܊࢟۾ฎ
TBO0OBT
ᆦቩ၃૦
ॲᇗ
࢟ޱᔇ
TEMP RANGE
PIN-PACKAGE
24 TQFN-EP*
(4mm x 4mm)
PKG
CODE
E24-1
T2444-3
, ܭာᇄॖᓤă
*FQ! >! ൡă
``````````````````````````````` ኡቯᒎฉ
O15
O14
O13
O12
O11
TOP VIEW
AD0
``````````````````````````````` ୭ᒙ
18
17
16
15
14
13
SCL 19
12 O10
SDA 20
11 O9
V+ 21
OPENPUSH-PULL
DRAIN
OUTPUTS
OUTPUTS
INPUTS
INTERRUPT
MASK
MAX7324
8
Yes
—
MAX7325
Up to 8
—
Up to 8
8
MAX7326
4
Yes
—
12
MAX7327
Up to 4
—
Up to 4
12
PART
8
10 O8
MAX7325
INT 22
RST 23
1
2
3
4
5
6
P1
P2
P3
P4
P5
EXPOSED PADDLE
P0
AD2 24 +
9
GND
8
P7
7
P6
࢜ቯ።࢟വૺถౖᅄᏴၫᓾ೯ࡼᔢઁ߲ă
TQFN (4mm x 4mm)
୭ᒙ)ኚ*Ᏼၫᓾ೯ࡼᔢઁ߲ă
________________________________________________________________ Maxim Integrated Products
1
NBY8436
``````````````````````````````````` গၤ
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
Supply Voltage V+....................................................-0.3V to +6V
SCL, SDA, AD0, AD2, RST, INT, P0–P7 ...................-0.3V to +6V
O8–O15 ........................................................-0.3V to (V+ + 0.3V)
O8–O15 Output Current ...................................................±25mA
P0–P7 Sink Current ......................................................................25mA
SDA Sink Current ........................................................................ 10mA
INT Sink Current..................................................................10mA
Total V+ Current..................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation (TA = +70°C)
24-Pin QSOP (derate 9.5mW/°C over +70°C)...........761.9mW
24-Pin TQFN (derate 20.8mW/°C over+70°C) ........1666.7mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
TYP
UNITS
5.50
V
1.6
V
V+
Power-On-Reset Voltage
VPOR
V+ falling
Standby Current
(Interface Idle)
ISTB
SCL and SDA and other TA = -40°C to
digital inputs at V+
+125°C
0.6
1.9
μA
fSCL = 400kHz; other
digital inputs at V+
23
55
μA
I+
Input High-Voltage
SDA, SCL, AD0, AD2, RST, P0–P7
VIH
Input Low-Voltage
SDA, SCL, AD0, AD2, RST, P0–P7
VIL
Input Leakage Current
SDA, SCL, AD0, AD2, RST, P0–P7
IIH, IIL
1.71
MAX
Operating Supply Voltage
Supply Current
(Interface Running)
TA = -40°C to +125°C
MIN
TA = -40°C to
+125°C
V+ < 1.8V
0.8 x V+
V+ ≥ 1.8V
0.7 x V+
V+ < 1.8V
0.2 x V+
V+ ≥ 1.8V
0.3 x V+
SDA, SCL, AD0, AD2, RST, P0–P7 at V+ or
GND, internal pullup disabled
-0.2
Input Capacitance
SDA, SCL, AD0, AD2, RST, P0–P7
VOL
180
V+ = +1.71V, ISINK = 5mA (TQFN)
90
230
V+ = +2.5V, ISINK = 10mA (QSOP)
110
210
V+ = +2.5V, ISINK = 10mA (TQFN)
110
260
V+ = +3.3V, ISINK = 15mA (QSOP)
130
230
V+ = +3.3V, ISINK = 15mA (TQFN)
130
280
V+ = +5V, ISINK = 20mA (QSOP)
140
250
140
300
VOH
V+ = +1.71V, ISOURCE = 2mA
V+ - 250 V+ - 30
V+ = +2.5V, ISOURCE = 5mA
V+ - 360 V+ - 70
V+ = +3.3V, ISOURCE = 5mA
V+ - 260 V+ - 100
V+ = +5V, ISOURCE = 10mA
V+ - 360 V+ - 120
Output Low-Voltage SDA
VOLSDA
ISINK = 6mA
Output Low-Voltage INT
VOLINT
ISINK = 5mA
Port Input Pullup Resistor
RPU
2
25
V
μA
pF
90
V+ = +5V, ISINK = 20mA (TQFN)
Output High Voltage
O8–O15
+0.2
10
V+ = +1.71V, ISINK = 5mA (QSOP)
Output Low Voltage
O8–O15, P0–P7
V
mV
mV
250
mV
130
250
mV
40
55
kΩ
_______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4
μs
Port Output Data Valid
tPPV
CL ≤ 100pF
Port Input Setup Time
tPSU
CL ≤ 100pF
0
Port Input Hold Time
tPH
CL ≤ 100pF
4
INT Input Data Valid Time
tIV
CL ≤ 100pF
4
μs
INT Reset Delay Time from STOP
tIP
CL ≤ 100pF
4
μs
INT Reset Delay Time from
Acknowledge
tIR
CL ≤ 100pF
4
μs
μs
μs
TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
kHz
Serial-Clock Frequency
fSCL
Bus Free Time Between a STOP
and a START Condition
tBUF
1.3
μs
Hold Time (Repeated) START
Condition
tHD, STA
0.6
μs
Repeated START Condition
Setup Time
tSU, STA
0.6
μs
STOP Condition Setup Time
tSU, STO
Data Hold Time
tHD, DAT
Data Setup Time
tSU, DAT
100
ns
tLOW
tHIGH
1.3
0.7
μs
μs
SCL Clock Low Period
SCL Clock High Period
0.6
μs
(Note 2)
0.9
μs
Rise Time of Both SDA and SCL
Signals, Receiving
tR
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of Both SDA and SCL
Signals, Receiving
tF
(Notes 3, 4)
20 +
0.1Cb
300
ns
tF,TX
(Notes 3, 4)
20 +
0.1Cb
250
ns
Fall Time of SDA Transmitting
Pulse Width of Spike Suppressed
tSP
(Note 5)
Capacitive Load for Each Bus
Line
Cb
(Note 3)
RST Pulse Width
tW
500
ns
tRST
1
μs
RST Rising to START Condition
Setup Time
50
ns
400
pF
Note 1: All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: Cb = total capacitance of one bus line in pF. ISINK ≤ 6mA. tR and tF measured between 0.3 x V+ and 0.7 x V+.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
_______________________________________________________________________________________
3
NBY8436
PORT AND INTERRUPT INT TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1)
```````````````````````````````````````````````````````````````````````࢜ቯᔫᄂቶ
(TA = +25°C, unless otherwise noted.)
STANDBY CURRENT
vs. TEMPERATURE
1.4
1.2
V+ = +5.0V
1.0
V+ = +3.3V
V+ = +2.5V
0.8
0.6
0.4
40
30
V+ = +3.3V
20
V+ = +2.5V
V+ = +1.71V
10
V+ = +1.71V
0.2
V+ = +5.0V
0
MAX7325 toc02
fSCL = 400kHz
50
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
OUTPUT VOLTAGE LOW
vs. TEMPERATURE
OUTPUT VOLTAGE HIGH
vs. TEMPERATURE
0.20
V+ = +3.3V
ISINK = 15mA
0.15
0.10
V+ = +2.5V
ISINK = 10mA
0.05
6
V+ = +1.71V
ISINK = 5mA
V+ = +5.0V
ISOURCE = 10mA
5
OUTPUT VOLTAGE HIGH (V)
V+ = +5.0V
ISINK = 20mA
MAX7325 toc03
0.25
4
MAX7325 toc04
STANDBY CURRENT (μA)
1.6
60
SUPPLY CURRENT (μA)
fSCL = 0kHz
1.8
SUPPLY CURRENT
vs. TEMPERATURE
MAX7325 toc01
2.0
OUTPUT VOLTAGE LOW (V)
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
V+ = +3.3V
ISOURCE = 5mA
3
V+ = +2.5V ISOURCE = 5mA
V+ = +1.71V ISOURCE = 2mA
2
1
0
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
````````````````````````````````````````````````````````````````````````````` ୭ႁී
୭
4
߂
ถ
QSOP
TQFN
1
22
INT
ᒦࣥၒ߲LjINTဵധఎവၒ߲ă
2
23
RST
আᆡၒྜྷLjࢅ࢟ຳᎌăདࣅRSTᆐࢅဟ༹߹3ሣాă
3, 21
24, 18
AD2, AD0
4–11
1–8
P0–P7
12
9
GND
13–20
10–17
O8–O15
22
19
SCL
J3Dରྏࡼࠈቲဟᒩၒྜྷă
23
20
SDA
J3DରྏࡼࠈቲၫJ0Pă
24
21
V+
ᑵ࢟ᏎLjᒗ1/158μGࡼჿࠣ࢟ྏW,വࡵHOEă
—
EP
EP
ൡLjൡഴHOEă
ᒍၒྜྷ࣡ăᄰਭBE1ਜ਼BE3ኡᐋୈࡼ࠭ᒍLjBE1ਜ਼BE3భጲೌࡵHOEĂW,ĂTDM
TEBLjᄋ႐ᒬ൝ᔝ)ܭ3Ăܭ4*ă
ധఎവJ0P࣡ాă
ă
ၒ߲࣡ాLjP9–P26ᆐᅎᅴါၒ߲࣡ాLjऄࢾ࢟ഗᆐ31nBă
_______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ఎവၒ߲భऄࢾᇢྜྷ31nB࢟ഗLjᑳৈୈభऄࢾᇢྜྷ
211nB࢟ഗLjၒ߲དࣅঌᏲభೌࡵࡉ,6/6Wࡼ࢟Ꮞă
NBY842:–843:ᇹୈ୷܈
ᄰਭᒍኡᐋၒྜྷ࣡ BE3 ਜ਼ BE1Ljభ NBY8436 ࢾᏴ
43ৈJ3D࠭ᒍ)ݬܭ3Ăܭ4*ᒦࡼೝৈLj݀భᄰਭࡉ
511lI{ࡼJ 3Dࠈቲాषᆰă9വၒ߲ਜ਼9ৈJ0Pాᎌݙ
ᄴࡼ࠭ᒍă9വᅎᅴါၒ߲ࡼᒍᆐ212yyyyLj9ৈJ0Pా
ࡼᒍᆐ221yyyyăᔐሣܕჄဟLjRSTၒྜྷభ༹߹ࠈቲ
ాLjᒫᒏᎧNBY8436ࡼྀੜࠈቲᄰቧă
NBY8436–NBY8438ᇹ۞౪5ᒬ୭ରྏࡼ27࣡ా౫ᐱ
Ljૹ߅೫NBY8431ࡼถ࢟വਜ਼NBY842:ĂNBY8432Ă
NBY8433ĂNBY8434ࡼถᒄጙă
ถႁී
NBY8436ဵᄰ࣡ా౫ᐱLjᔫᏴ,2/82Wᒗ,6/6W࢟ᏎLj
ᄋ9ৈᅎᅴါၒ߲࣡ాਜ਼9ৈധఎവJ0P࣡ాLjඛৈധ
ᒙ࣡ాၒ߲ᆐ࢟ຳ)࣪᎖ധఎവၒ߲ႁLj൝
૾ᆐᔜზ*భጲྀጙ࣡ాᒙᆐ൝ၒྜྷ࣡ăᄰਭࠈ
ాࣗནNBY8436ဟLjऩૄ࣡ాࡼဣଔ൝࢟ຳă
ܭ2/! NBY842:–NBY843:ᇹୈ୷܈
PART
INPUT
I2C
SLAVE
INPUTS INTERRUPT
ADDRESS
MASK
OPENDRAIN
OUTPUTS
PUSHPULL
OUTPUTS
CONFIGURATION
16-PORT EXPANDERS
8 input and 8 push-pull output versions:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
8
MAX7324
Yes
—
8
8 push-pull outputs with selectable default logic
levels.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even if only
for a transient) since the ports were last read.
8 I/O and 8 push-pull output versions:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
101xxxx
and
110xxxx
8 push-pull outputs with selectable default logic
levels.
MAX7325
Up to 8
—
Up to 8
8
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors, but pullups draw current
when output is low. Any open-drain port can be used
as an input by setting the open-drain output to logichigh. Transition flags identify which open-drain port
inputs have changed (even if only for a transient)
since the ports were last read.
_______________________________________________________________________________________
5
NBY8436
``````````````````````````````` ሮᇼႁී
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ܭ2/! NBY842:–NBY843:ᇹୈ)୷܈ኚ*
PART
INPUT
I2C
SLAVE
INPUTS INTERRUPT
ADDRESS
MASK
OPENDRAIN
OUTPUTS
PUSHPULL
OUTPUTS
CONFIGURATION
4 input-only, 12 push-pull output versions:
4 input ports with programmable latching transition
detection interrupt and selectable pullups.
4
MAX7326
Yes
—
12
12 push-pull outputs with selectable default logic
levels.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even if only
for a transient) since the ports were last read.
4 I/O, 12 push-pull output versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
101xxxx
and
110xxxx
12 push-pull outputs with selectable default logic
levels.
MAX7327
Up to 4
—
Up to 4
12
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors, but pullups draw current
when output is low. Any open-drain port can be used
as an input by setting the open-drain output to logichigh. Transition flags identify which open-drain port
inputs have changed (even if only for a transient)
since the ports were last read.
8-PORT EXPANDERS
MAX7319
110xxxx
8
Yes
—
—
Input-only versions:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
MAX7320
101xxxx
—
—
—
8
Output-only versions:
8 push-pull outputs with selectable power-up default
levels.
MAX7321
110xxxx
Up to 8
—
Up to 8
—
I/O versions:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4
4 input-only, 4 output-only versions:
4 input ports with programmable latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7322
6
110xxxx
4
Yes
—
_______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
NBY8436
ܭ2/! NBY842:–NBY843:ᇹୈ)୷܈ኚ*
PART
INPUT
I2C
SLAVE
INPUTS INTERRUPT
ADDRESS
MASK
OPENDRAIN
OUTPUTS
PUSHPULL
OUTPUTS
CONFIGURATION
MAX7323
110xxxx
Up to 4
—
Up to 4
4
4 I/O, 4 output-only versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7328
MAX7329
0100xxx
0111xxx
Up to 8
—
Up to 8
—
8 open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
ധఎവ࣡ాᔫၒྜྷဟᄋࡒჄࡀࡼၾზଶހถLj
ୈೌኚପހჅᎌၒྜྷ࣡ాࡼᓨზܤછăၒྜྷ࣡ాࡼܤ
છ 9 ৈܪᒔᆡᒦࡼጙৈᒙᆡLjጲܣཌॊखညܤછࡼၒ
ྜྷ࣡ాăႲઁࡼNBY8436ࣗݷᔫቖݷᔫ༹߹Ⴥᎌܪ
ᒔᆡă
࣪Ⴤࡀᒦࣥၒ߲ INTቲ߈ܠ-భܪᔫၒྜྷ࣡ా
ࡼ൝ܤછăඛৈၒྜྷ࣡ాࡼၫܤછ્࣒INTᒙᆐ൝
ࢅ࢟ຳăᄰਭࠈాখܤJ0Pా߿્ݙखᒦࣥLjᏴሆጙࠨ
ᄰਭࠈቲాषᆰNBY8436ဟஊ߹ᒦࣥၒ߲INTă
ᄰਭᒍᒙၒྜྷBE1ਜ਼BE3భኡᐋೌᒗW,ࡼดݝ౯
࢟ᔜăၒྜྷ࣡ాࡼ౯ጲ5ৈᆐጙᔝቲဧถ఼ᒜ)ܭ3*ă
ಽ࠭ᒍኡᐋཀྵۣᔫᆐၒྜྷࡼJ0PᏴ࢟ဟᆐ൝࢟
ຳLjดݝ౯ဧถࡼ J0P ా෦ཱྀᓨზᆐ൝࢟ຳၒ
߲Ǘดݝ౯ணᒏࡼJ0Pా෦ཱྀᓨზᆐ൝ࢅ࢟ຳၒ߲ă
ၒ߲࣡ాࡼ࢟൝࢟ຳᎅᒍኡᐋၒྜྷBE1ĂBE3ᒙă
࢟ဟLj࣡ాጲೝৈᆐጙᔝᒙᏴ෦ཱྀࡼ൝࢟ຳ
൝ࢅ࢟ຳ)ܭ3Ăܭ4*ă
߱ဪ࢟
࢟ဟLjၾܤଶހ൝আᆡLj݀ஊ߹INTăၾზܪ༹ഃ
ܭာᎌखညၫܤછăభᄰਭ J 3 D ࠭ᒍኡᐋၒྜྷ࣡
BE1 ਜ਼ BE3 ᒙ 27 ৈ J0P ాࡼ࢟෦ཱྀᓨზ) ܭ3Ă ܭ4*ă
࣪᎖ᔫၒྜྷࡼJ0PాLjኍཀྵۣ෦ཱྀᓨზᆐ൝࢟ຳLj
ဧJ0Pాࡼ࢟ᓨზᆐᔜზăᒙჅᎌJ0Pࡼ౯ဧถLj
݀ᎌ࢟ຳࡼ࢟ᓨზă
࢟আᆡ
NBY8436ૹ߅೫࢟আᆡ)QPS*࢟വLj࢟ဟభཀྵۣჅᎌ
ࡀআᆡࡵጯᒀᓨზăࡩ W, ဍࡵ WQPS )2/7WLjᔢࡍ
ᒋ*ጲဟLjQPS࢟വျहࡀਜ਼3ሣాLjఎဪᑵޟ
ᔫăࡩW,ࢰൢࡵWQPS ጲሆဟLjNBY8436Ⴥᎌࡀด
ྏআᆡࡵQPS෦ཱྀᒋ)ܭ3Ăܭ4*ă
RSTၒྜྷ
RST ၒྜྷభணᒏྀੜᎧ NBY8436 ሤਈࡼ J 3 D ᄰቧLj༓ᒜ
NBY8436 ྜྷJ3D! TUPQᓨზăআᆡݷᔫ્ݙ፬ሰᒦࣥၒ
߲)INT*ă
ࡗ૦ෝါ
ࡩࠈቲాహሔဟLjNBY8436 ᔈࣅྜྷࡗ૦ෝါLjሿ
ᔢቃࡼ࢟Ꮞ࢟ഗă
࠭ᒍĂ࢟෦ཱྀ൝ᓨზਜ਼ၒྜྷ౯ኡᐋ
ᒍၒྜྷ BE1ĂBE3 ཀྵࢾ NBY8436 ࡼ࠭ᒍLjᒙ࣡ా
࢟ઁࡼJ0PᓨზLjኡᐋࡒ౯࢟ᔜࡼၒྜྷăดݝ౯ਜ਼
࢟෦ཱྀᓨზጲ5ৈ࣡ాᆐጙᔝቲᒙ)ܭ3*ă
NBY8436ࡼ࠭ᒍᎅඛࠨJ3DࠅၒࢾLjᇄ൙কࠅၒဵ॥
ဵᑞᑵኰᒍNBY8436ăNBY8436ถᏴࠅၒ໐ମ߲ܰܦ
ᒍၒྜྷBE1ਜ਼BE3ဵ॥ೌࡵTEBTDMLjऎဵݙ൝࢟
ຳৼࢾᏴ W, HOEăᑚፀᆜᓹᏴ።ᒦభࣅზᒙ
NBY8436ࡼ࠭ᒍLjᇄኊୈᒮቤ࢟ă
_______________________________________________________________________________________
7
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ᎌቋ༽ౚሆLj࢟ဟݙถ൸ᔗTEB > TDM > W,ࡼଣǗಿ
ྙLj࢟໐ମLjဣଔࡼེڰރ።ࡀᏴጙৈजࡼᔐሣࣅ
ᔫăᅪLjྙਫTEBਜ਼TDMۻ౯ࡵጙৈᎧNBY8436࢟Ꮞ
࢟ኹݙᄴࡼ࢟ኹLj౯࢟ᏎࡼဍႥࣞߕ᎖ NBY8436
ࡼ࢟࢟ᏎLjกඐLjTEBTDMᏴ࢟ဟཱྀۻᆐೌࡵ
HOEăᑚᒬ༽ౚሆLjࡀᏴ႐ᒬᒍᔝࡼభถLjকᔝ
ᄰਭᒍၒྜྷ࣡BE1ਜ਼BE3ೌࡵW,HOEቲኡᐋ
)ྙܭ3Ăܭ4ᒦࡼ࠰ᄏᔊჅာ*ă࢟ဟ።ۣᑺᑚቋኡᐋࡼ
ᑵཀྵቶLjऎ༦ݙ၊TEBĂTDMᔐሣᓨზࡼ፬ሰăྙਫኡ
೫ 23 ᒬᒍᔝࡼጙᒬLjኍᓖፀǖᏴᔐሣ߲ሚ
ጙࠨ J 3 D ࠅၒᒄ༄)ᑣྀ࣪ੜୈLjဵݙஞ࣪ NBY8436*Lj
భถ߲ሚݙᇧᆃࡼ౯ᔝLjᇄࡼ࣡ాᔝభጲ߱ဪ
છᆐ൝ࢅ࢟ຳၒ߲Ljऎऻၒྜྷ൝࢟ຳၒ߲ă
߱ဪ࢟ਭ߈ᒦLjᏴጙࠨJ3Dࠅၒஉၦᒄ༄NBY8436ᇄ
जᅲཝ࣪ᒍၒྜྷBE1ਜ਼BE3ቲஊ൩LjBE1ਜ਼BE3ᔢ߱
ೌᏴW,HOEăᑚጙ࢛လॊᒮገLjፐᆐᒍኡᐋࢾ
࢟൝ᓨზਜ਼ဵ॥ဧถ౯ă࢟ဟLjਂᏴᔐሣ
ඛৈୈ)ᓍ૦ୈ࠭૦ୈ*ࡼJ3D! TEBਜ਼TDMᔐሣ
ాᆐᔜზLj۞౪NBY8436ăᔫᆐJ3Dܪᓰాୈܘ
ኍ൸ᔗᑚጙገཇăፐࠥLjೌᏴTEBTDMࡼᒍၒྜྷ࣡
BE1ਜ਼BE3LjᏴ࢟ဟᄰࡵޟW,ă
౯ኡᐋ൝ᄰਭBE1ኡᐋဵ॥ဧถ࣡ాQ1–Q4ࡼ౯Ǘᄰ
ਭBE3ኡᐋဵ॥ဧถ࣡ాQ5–Q8ࡼ౯ăᒙᏇᐌဵǖTEB
TDM ࡼ൝࢟ຳኡᐋ౯Lj൝ࢅ࢟ຳᐌནሿ౯
)ܭ3*ăࡩTEBTDMᄰਭᅪݝJ3Dᔐሣ౯࢟ᔜ౯ࡵ
W,ဟLj࣡ాᒙᏴܪᓰJ3Dஉ৩ࡼ࢟ᓨზă
ܭ3/! NBY8436ᒍ.࣡ాQ1–Q8࣪።ਈᇹ
PIN
CONNECTION
8
DEVICE ADDRESS
PORT POWER-UP DEFAULT
A6 A5 A4 A3 A2 A1 A0
40kΩ INPUT PULLUPS ENABLED
AD2
AD0
P7
P6
P5
P4
P3
P2
P1
P0
P4 P3 P2 P1
P0
SCL
GND
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
P7 P6 P5
Y
Y
Y
Y
—
—
—
—
SCL
V+
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
Y
SCL
SCL
1
1
0
0
0
1
0
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
SCL
SDA
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
SDA
GND
1
1
0
0
1
0
0
1
1
1
1
0
0
0
0
Y
Y
Y
Y
—
—
—
—
SDA
V+
1
1
0
0
1
0
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
Y
SDA
SCL
1
1
0
0
1
1
0
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
SDA
SDA
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
GND
GND
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
—
—
—
—
—
—
—
—
GND
V+
1
1
0
1
0
0
1
0
0
0
0
1
1
1
1
—
—
—
—
Y
Y
Y
Y
GND
SCL
1
1
0
1
0
1
0
0
0
0
0
1
1
1
1
—
—
—
—
Y
Y
Y
Y
GND
SDA
1
1
0
1
0
1
1
0
0
0
0
1
1
1
1
—
—
—
—
Y
Y
Y
Y
V+
GND
1
1
0
1
1
0
0
1
1
1
1
0
0
0
0
Y
Y
Y
Y
—
—
—
—
V+
V+
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
V+
SCL
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
V+
SDA
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
Y
Y
Y
Y
Y
Y
Y
Y
_______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
NBY8436
ܭ4/! NBY8436ᒍ.ၒ߲P9–P26࣪።ਈᇹ
PIN
CONNECTION
DEVICE ADDRESS
A6
A5
A4
A3
A2
OUTPUTS POWER-UP DEFAULT
AD2
AD0
A1
A0
O15
O14
O13
O12
O11
O10
O9
O8
SCL
GND
1
0
1
0
0
0
0
1
1
1
1
0
0
0
0
SCL
V+
1
0
1
0
0
0
1
1
1
1
1
1
1
1
1
SCL
SCL
1
0
1
0
0
1
0
1
1
1
1
1
1
1
1
SCL
SDA
1
0
1
0
0
1
1
1
1
1
1
1
1
1
1
SDA
GND
1
0
1
0
1
0
0
1
1
1
1
0
0
0
0
SDA
V+
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
SDA
SCL
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
SDA
SDA
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
GND
GND
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
GND
V+
1
0
1
1
0
0
1
0
0
0
0
1
1
1
1
GND
SCL
1
0
1
1
0
1
0
0
0
0
0
1
1
1
1
GND
SDA
1
0
1
1
0
1
1
0
0
0
0
1
1
1
1
V+
GND
1
0
1
1
1
0
0
1
1
1
1
0
0
0
0
V+
V+
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
V+
SCL
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
V+
SDA
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
࣡ాၒྜྷ
J0P ࣡ాၒྜྷږᑍ DNPT ൝࢟ຳᓞધLjক൝࢟ຳᎅ౫
ᐱࡼ࢟Ꮞ࢟ኹࢾLj༦ᎌ,7WࡼਭኹྏሢLjᎧୈࡼ
࢟Ꮞ࢟ኹᇄਈă
J0P࣡ాၒྜྷၾܤଶހ
ୈᏴᔢઁጙࠨᄰਭࠈాषᆰ౫ᐱࡼݷᔫઁLjೌኚ
ପހჅᎌᒙ߅ၒྜྷࡼJ0P࣡ాࡼܤછă࣡ాᓨზࡀۻ
ᏴĐၾስđࡀᒦLj᎖ၾზପހăĐၾስđࡀᒋᎧဣ
ଔၒྜྷೌኚቲ୷܈Ljྦଶྀࡵހੜ࣡ాखညܤછLj
߿खINTᒎာ࣡ాᓨზखညܤછăᏴඛৈNBY8436ࡼJ3D
ࣗĂቖݷᔫࡼ።ࡊ໐ମLj࣪ၒྜྷ࣡ాቲݧዹ)ᎅดڳݝ
ၫჄࡀࡵĐၾስđࡀ*Ljᄴဟ༹߹Ꮗሌࡼၾܪܤᒔᆡă
ᄰਭࠈቲాభࣗནᒄ༄ࡼ࣡ాၾܪܤᒔᆡLj۞Ᏼ3ᔊ
ஂࣗኔࡼ3ᔊஂă
_______________________________________________________________________________________
9
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ࠈቲా
ࠈాᒍ
NBY8436ᔫᆐ࠭૦ᄰਭJ3Dాख႙ਜ਼၃ၫLjಽࠈቲ
ၫሣ)TEB*ਜ਼ࠈቲဟᒩሣ)TDM*ဣሚᓍ૦Ꭷ࠭૦ᒄମࡼၷ
ሶᄰቧăᓍ૦ࣅჅᎌሶNBY8436ख႙ၫ࠭NBY8436
၃ၫࡼࠅၒLj݀ည߅ᄴݛၫࠅၒࡼTDMဟᒩ)ᅄ2*ă
TEBభᔫᆐၒྜྷLjጐభᔫᆐധఎവၒ߲ᔫăTEBኊ
ገጙৈ࢜ቯᒋᆐ5/8lΩࡼ౯࢟ᔜLjTDMஞᔫᆐၒྜྷᔫă
ྙਫ3ሣాਂ೫ࣶৈᓍ૦Ljᓍ૦ᇹᄻᒦࡼᓍ఼
ᒜᎌധఎവTDMၒ߲LjกඐLjTDMጐኊገጙৈ࢜ቯ
ᒋᆐ5/8lΩࡼ౯࢟ᔜă
ඛࠨࠅၒਭ߈۞౪ǖᓍ૦ख႙ጙৈఎဪ)TUBSU*ᄟୈLj
ሆख႙NBY8436ࡼ8ᆡ࠭ᒍਜ਼S0WᆡLjࣶৈၫᔊ
ஂLjᔢઁख႙ᄫᒏ)TUPQ*ᄟୈᒫᒏࠅၒ)ᅄ3*ă
TUBSUਜ਼TUPQᄟୈ
ࠈቲాహሔဟLjTDMਜ਼TEBۣߒ࢟ຳăᓍ૦ᄰਭख
߲ TUBSU! )T*ᄟୈࠅීܭၒఎဪLjTUBSUᄟୈဵᏴTDMᆐ
ဟĂTEB ᎅᒗࢅࡼᄢޘܤညࡼăᓍ૦ᅲ߅Ꭷ࠭૦ࡼ
ᄰቧဟLjᓍ૦ख߲TUPQ! )Q*ᄟୈLjTUPQᄟୈဵᏴTDMᆐ
ဟĂTEB ᎅࢅᒗࡼᄢޘܤညࡼăᒄઁLjျहᔐሣLj
ጲቲሆጙࠨࠅၒ)ᅄ3*ă
ᆡࠅၒ
ඛৈဟᒩ൴ߡࠅၒጙৈၫᆡăᏴ TDM ᆐ࢟ຳ໐ମLj
TEBࡼၫܘኍۣߒᆮࢾ)ᅄ4*ă
SDA
tBUF
tSU,STA
tSU,DAT
tLOW
tHD,STA
tSU,STO
tHD,DAT
tHIGH
SCL
tHD,STA
tR
tF
START CONDITION
REPEATED START CONDITION
STOP
CONDITION
ᅄ2/! 3ሣࠈాဟኔ
SDA
SDA
SCL
S
P
START
CONDITION
STOP
CONDITION
ᅄ3/! TUBSUਜ਼TUPQᄟୈ
10
SCL
DATA LINE STABLE; CHANGE OF DATA
DATA VALID
ALLOWED
ᅄ4/! ᆡࠅၒ
______________________________________________________________________________________
START
CONDITION
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ᒍࡼ 2 ᆡ)B7*Ă 3 ᆡ)B6*Ă 4 ᆡ)B5*ဪᒫᆐ 2Ă2Ă1
)Q1–Q8* 2Ă1Ă2! )P9–P26*ăڳBE1ਜ਼BE3ೌࡵHOEĂ
W,ĂTEB TDMLjጲኡᐋ࠭ᒍᆡ B4ĂB3ĂB2 ਜ਼ B1ă
NBY8436ᎌ27ᒬభถࡼ࠭ᒍ)ܭ3Ăܭ4*LjᏤᏴጙᄟ
J3Dᔐሣᔢࣶਂ27ৈNBY8436ୈă
षᆰNBY8436
ᄰਭJ3DాषᆰNBY8436LjNBY8436ᆐ9വധఎവJ0P
ా)Q1–Q8*ਜ਼9വᅎᅴါ࣡ా)P9–P26*ᄋೝৈݙᄴࡼ8ᆡ
࠭ᒍLjݬܭ3Ăܭ4ă
࠭ᒍ
NBY8436ᎌ3ৈ8ᆡ࠭ࡼޠᒍ)ܭ3Ăܭ4*ăᎧ9വᅎᅴ
ါJ0Pቲᄰቧࡼᒍݙᄴ᎖Ꭷ9വJ0Pቲᄰቧࡼᒍă
NBY8436! J0P࣡ా)Q1–Q8*ࡼᔊஂࣗݷᔫऩૄ9ৈJ0P࣡ా
ᓨზLj݀ᏴNBY8436።ࡊ࠭ᒍᔊஂဟ༹߹ดݝၾܪܤ
ᒔਜ਼INTၒ߲ă9ৈᅎᅴါ࣡ా)P9–P26*ࡼᔊஂࣗݷᔫ
ऩૄ9ৈၒ߲࣡ాࡼᓨზLjᔫᆐၒྜྷࣗૄၫă
ஜৌᏴ8ᆡ࠭ᒍᒄઁࡼ9ᆡᆐࣗቖS0W ᆡăᏴቖෘ
എဟᆐࢅ࢟ຳǗࣗෘഎဟᆐ࢟ຳ)ᅄ6*ăNBY8436࠭
CLOCK PULSE
FOR ACKNOWLEDGEMENT
START
CONDITION
SCL
NBY8436! J0P࣡ా)Q1–Q8*ࡼ3ᔊஂࣗݷᔫऩૄ9ৈJ0Pాࡼ
ᓨზ)ᔫᆐጙৈᔊஂࣗݷᔫ*LjႲઁဵၾܪܤᒔᆡăࡩ
NBY8436።ࡊ࠭૦ᒍᔊஂဟ༹߹ดݝၾܪܤᒔᆡਜ਼INT
ၒ߲Ljࡣ༄໐ࡼၾܪܤᒔၫᔫᆐ 3 ᔊஂख႙ă
NBY8436ᅎᅴါ࣡ాࡼ3ᔊஂࣗݷᔫᒮআऩૄ9ৈၒ߲
࣡ాᓨზLjᔫᆐၒྜྷࣗૄၫă
1
2
8
9
NBY8436! J0P࣡ా)Q1–Q8*ࡼࣶᔊஂࣗݷᔫ)J3D! TUPQᆡᒄ
༄ᎌ3ৈጲࡼᔊஂ*ᒮআऩૄ࣡ాၫਜ਼ઁࡼၾܪܤᒔ
ᆡăᎅ᎖ඛࠨࠅၒ࣒ᒮቤݧዹ࣡ాၫLj༦ඛࠨআᆡ
ၾܪܤᒔᆡLjፐࠥLjࣶᔊஂࣗݷᔫࣥݙऩૄ࣡ాࡼࡩ
༄ၫ݀ဤܰၒྜྷ࣡ాࡼྀੜܤછă
SDA BY
TRANSMITTER
SDA BY
RECEIVER
S
ᅄ5/! ።ࡊ
SDA
A5
MSB
A4
A3
A2
A1
A0
R/W
ACK
LSB
SCL
ᅄ6/! ࠭ᒍ
______________________________________________________________________________________
11
NBY8436
።ࡊ
።ࡊᆡဵ:ᆡLj၃ୈಽᑚጙᆡᔫᆐ၃ࡵඛጙၫ
ᔊஂࡼ።ࡊቧ)ᅄ5*ăᎌࠅၒඛৈᔊஂኊገ:ᆡăᓍ૦
ޘည:ᆡဟᒩቧLj၃ୈᏴ።ࡊ൴ߡ໐ମ౯ࢅTEBLj
ᑚዹဟᒩ൴ߡᆐ࢟ຳ໐ମ TEB ᆐᆮࢾࡼࢅ࢟ຳăࡩᓍ
૦ሶNBY8436ख႙ၫဟLjNBY8436ޘည።ࡊቧLjፐ
ᆐNBY8436ဵ၃ୈăࡩNBY8436ሶᓍ૦ख႙ၫဟLj
ᓍ૦ޘည።ࡊቧLjፐᆐᓍ૦ဵ၃۸ă
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ᏴJ3D።ࡊ໐ମ)ᔊஂࣗݷᔫ3ᔊஂࣗݷᔫဟLj࣪J3D࠭
ᒍࡼ።ࡊ*࣪ၒྜྷ࣡ాၫݧዹă
࠭NBY8436ࣗནၫ
NBY8436 ധఎവ࣡ాࡼࣗݷᔫఎဪ᎖ᓍ૦ख႙࣡ాᔝ
ࡼ࠭ᒍLj༦S0Wᆡᒙᆐ࢟ຳăNBY8436።ࡊ࠭ᒍLj
݀Ᏼ።ࡊ໐ମݧዹၒྜྷ࣡ా)Đ ၾስđࡀ*ăᏴ࠭ᒍ።
ࡊ໐ମLj༹߹INTă
NBY8436ᅎᅴါ࣡ాࡼࣶᔊஂࣗݷᔫᒮআऩૄ9ৈၒ߲
࣡ాࡼᓨზLjᔫᆐၒྜྷࣗૄၫă
࢜ቯ༽ౚሆLjᓍ૦࠭NBY8436ࣗན23ৈᔊஂLj၃ၫ
ဟᓍ૦።ࡊ߹ᔢઁጙৈᔊஂጲᅪࡼඛৈᔊஂă
NBY8436ඛᔝ࣡ాࡼᔊஂቖݷᔫ᎖ᒙჅᎌ9ৈ࣡ా
ࡼᓨზă
ᓍ૦࠭NBY8436ࡼധఎവ࣡ాࣗན2ৈᔊஂ݀ख߲ጙৈ
TUPQᄟୈဟ)ᅄ7*LjNBY8436ख႙ࡩ༄ࡼ࣡ాၫĂ༹߹
ၾზܤછܪᒔᆡLjআᆡၾზଶހă࠭ᒍ።ࡊ໐ମLjINT
ܤᆐ࢟ຳ)ྙਫᅪݝ౯࢟ᔜݙးLjINT ᆐᔜზ*ă
ቤࡼĐၾስđࡀၫᆐख႙ࡵᓍ૦ࡼࡩ༄࣡ాၫǗ
ፐࠥLjభყࠅࡵހၒ໐ମࡼ࣡ాܤછ༽ౚă߲ሚTUPQᄟ
ୈᒄ༄LjINTဪᒫۣߒ࢟ຳă
ྙਫᏴࣗኔ໐ମ࣡ాၒྜྷ߲ሚၫܤછLjกඐLjINTᏴ
J 3D! TUPQ ᆡᒄઁۻᒮቤᒙᆡăᏴᔊஂࣗݷᔫࣶᔊஂ
ࣗݷᔫ໐ମLjNBY8436ޘ્ݙညᅪጙࠨᒦࣥă
NBY8436ඛᔝ࣡ాࡼࣶᔊஂቖݷᔫᒮআᒙჅᎌ9ৈ࣡ా
ࡼ൝ᓨზă
PORT I/O
ACKNOWLEDGE
FROM MAX7325
S
1
1
0
MAX7325 SLAVE ADDRESS
R/W
1
P7
A
D7
P6
P5
D6
P4
D5
D4
P3
P2
D3
PORT SNAPSHOT
D2
P1
ACKNOWLEDGE
FROM MASTER
P0
D1
D0
N
P
PORT SNAPSHOT
SCL
tPH
PORT
tIV
tPSU
tIR
INT OUTPUT
INT REMAINS HIGH UNTIL STOP CONDITION
S = START CONDITION
P = STOP CONDITION
SHADED = SLAVE TRANSMISSION
N = NOT ACKNOWLEDGE
ᅄ7/! ࣗNBY8436ࡼധఎവ࣡ా)2ৈၫᔊஂ*
12
tIP
______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
NBY8436 ധఎവ࣡ాࡼࣗݷᔫᎅᓍ૦ख႙࣡ా࠭ᒍ
ਜ਼Ⴒઁᒙᆐ࢟ຳࡼ S0W ᆡఎဪLjNBY8436 ።ࡊ࠭ᒍ
݀Ᏼ።ࡊᆡ໐ମ࣪ၒ߲࣡ాࡼ൝ᓨზቲݧዹăᓍ૦
భጲ࠭ NBY8436 ࡼၒ߲࣡ాࣗན 2 ৈࣶৈᔊஂ)ᅄ 9*ă
NBY8436 ख႙ࡩ༄ࡼ࣡ాၫLj݀Ᏼ።ࡊ໐ମࣗૄဣଔ
ࡼ࣡ాၒ߲)ऎဵݙჄࡀࡼ࣡ాၒ߲ᓨზ*ăྙਫ࣡ాۻ༓
ቲᒙᆐ෭ৈᓨზLjऎऻᒙࡼᓨზLjࣗૄݷᔫభጲन፯
߲ᑚᒬ༽ౚăདࣅྏቶঌᏲဟLjࣗૄ࣡ా࢟ຳࡼዩᑺኊ
ገఠSDࡼဍ0ሆଢ଼ဟମă
PORT INPUTS
ACKNOWLEDGE
FROM MAX7325
S
1
1
0 MAX7325 SLAVE ADDRESS 1
I6
I7
A
D7
R/W
D6
I5
D5
I4
I3
D4
INTERRUPT FLAGS
I1
I2
D3
D2
I0
D1
D0
F7
A
D7
F6
F5
D6
F4
D5
D4
F3
D3
D2
D1
F0
D0
ACKNOWLEDGE
FROM MASTER
N
P
PORT SNAPSHOT
PORT SNAPSHOT
PORT SNAPSHOT
F1
F2
SCL
tPH
PORTS
tPSU
tIV
tIR
INT OUTPUT
tIP
INT REMAINS HIGH UNTIL STOP CONDITION
S = START CONDITION
P = STOP CONDITION
SHADED = SLAVE TRANSMISSION
N = NOT ACKNOWLEDGE
ᅄ8/! ࣗNBY8436ࡼധఎവ࣡ా)3ৈၫᔊஂ*
P7
PORT SNAPSHOT DATA
P6
P5
P4
P3
DATA 1
P2
P1
P0
ACKNOWLEDGE FROM MAX7325
S
MAX7325 SLAVE ADDRESS
1
R/W
A
D7
D6
D5
D4
PORT SNAPSHOT TAKEN
D3
D2
D1
D0
PORT SNAPSHOT TAKEN
A
P
ACKNOWLEDGE
FROM MASTER
SCL
ᅄ9/! ࣗNBY8436ࡼᅎᅴါ࣡ా
______________________________________________________________________________________
13
NBY8436
ᓍ૦࠭NBY8436ധఎവ࣡ాࣗན3ৈᔊஂ݀ख߲TUPQ
ᄟୈဟ)ᅄ8*LjNBY8436ख႙ࡼဵࡩ༄࣡ాၫਜ਼ܤછܪ
ᒔᆡăႲઁLj༹߹ܤછܪᒔᆡLjআᆡၾܤଶހă࠭ᒍ
።ࡊ໐ମLjஊ߹ INTăቤࡼĐၾስđࡀၫᆐख႙ࡵ
ᓍ૦ࡼࡩ༄࣡ాၫăፐࠥLjభଶࠅࡵހၒ໐ମࡼྀੜ
࣡ాܤછ༽ౚă߲ሚTUPQᄟୈᒄ༄LjINT ဪᒫۣߒ
࢟ຳă
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ᄰޟLjᓍ૦࠭NBY8436ᅎᅴါ࣡ాࣗནጙৈᔊஂLjઁ
ख႙ጙৈTUPQᄟୈ)ᅄ9*ăࡩLjᓍ૦భጲ࠭NBY8436ࡼ
Cᔝ࣡ాࣗན3ৈࣶৈᔊஂLjઁख߲TUPQᄟୈăᑚᒬ
༽ౚሆLjNBY8436 Ᏼඛৈ።ࡊᆡ໐ମᒮቤૹݧၒ߲࣡ా
ࡼၫLjඛࠨख႙ᔢቤၫă
ሶNBY8436ቖၫ
NBY8436ඛᔝ࣡ాࡼቖݷᔫఎဪ᎖ᓍ૦ख႙ࡼ࠭ᒍLj༦
S0WᆡᒙࢅăNBY8436።ࡊ࠭ᒍLj݀Ᏼ።ࡊ໐ମݧዹ࣡
ాၫă࣪ധఎവ࣡ాቲቖݷᔫဟLjᏴ።ࡊ࠭ᒍ໐
ମ INTᒙᆐ࢟ຳ)౯࢟ᔜݙးဟሤࡩ᎖ᔜზ*ă
ᄰޟᓍ૦્ଖኚख႙2ৈࣶৈၫᔊஂăNBY8436።ࡊ
ᑚቋઁኚࡼၫᔊஂLj݀ඛৈቤᔊஂৎቤ࣪።ࡼ࣡ాၫ
Ljᒇࡵᓍ૦ख߲TUPQᄟୈ)ᅄ:*ă
``````````````````````````````` ።ቧᇦ
࣡ాၒྜྷਜ਼J3DాᏴ୷
୷ࢅ൝࢟ຳମࡼᓞધ
NBY8436ࡼTEBĂTDMĂBE1ĂBE3ਜ਼RSTĂINTጲૺP9–
P26ĂQ1–Q8ᎌ,7WਭኹۣઐăᑚዹLjᏤNBY8436
ᔫᏴጙৈ୷ࢅࡼ࢟Ꮞ࢟ኹሆLjಿྙ,4/4WLjऎJ3Dాਜ਼0
9ৈᔫᆐၒྜྷဟࡼJ0P࣡ాభᎅ୷ࡼ൝࢟ຳདࣅLjಿྙǖ
,6Wă
NBY8436ጐభጲᔫᏴ୷ࡼ࢟Ꮞ࢟ኹሆLjಿྙ,4WLjऎ
J3Dాਜ਼0J0P࣡ాQ1–Q8ᒦࡼྀੜጙৈభᎅ୷ࢅࡼ൝
1
SCL
2
3
4
5
6
7
S
START CONDITION
ၒ߲࣡ా࢟ຳᓞધ
ധఎവၒ߲ଦ৩Ꮴ࢟ຳᓞધࡵ᎖ࢅ᎖ NBY8436
ࡼ࢟ຳLjᄰਭၒ߲࣡ాࡼᅪݝ౯࢟ᔜᔜზᓞધࡵ
ᑵ࢟Ꮞ࢟ኹă౯࢟ᔜభጲೌࡵᔢ,7Wࡼྀੜ࢟ኹLj
ኡᐋးࡩࡼ࢟ᔜཀྵۣ൝ࢅ࢟ຳᄟୈሆࡼᇢ࢟ഗ્ݙ
᎖ 31nBăᎧ DNPT ၒྜྷాဟLjኡᐋ 331lΩ ౯࢟ᔜ
ဵጙৈੑࡼ࢛ăኡ୷ࢅࡼ࢟ᔜభጲᄋᐅဉጴᒜถ
ೆLjᑚᒬ༽ౚး᎖࣪ገཇݙვዏৃᑗဵኊገ
ႥဍဟମጲདࣅྏቶঌᏲࡼ።ă
ඛৈᅎᅴါၒ߲࣡ాᎧW,ਜ਼HOEᒄମೌ೫ጙৈۣઐ
औăࡩ࣡ాདࣅ࢟ኹ᎖W,ࢅ᎖HOEဟLjۣઐऔ
ၒ߲༃ᆡࡵ᎖W,ࢅ᎖HOEጙৈऔࡴᄰኹ
ଢ଼ăNBY8436ࣥ࢟ဟ)W, > 1W*LjೌࡵW,ਜ਼HOEࡼۣ
ઐऔྙᄴጙৈ໋ᄰऔLjඛৈၒ߲࣡ా༃ᆡࡵ
HOE )ᅄ21*ă
8
DATA TO INTERRUPT MASK
SLAVE ADDRESS
SDA
࢟ຳདࣅLjಿྙǖ,3/6WăW, = 2/9WဟLjᔢቃᒋᆐ1/9 y W,
ࡼ࢟ኹభጲᏴྀፀၒྜྷ࣡ా߿खጙৈ൝࢟ຳǗ W, ≥
2/9W ဟLjᔢቃᒋᆐ 1/8 y W, ࡼ࢟ኹ૾భ߿ख൝࢟ຳă
ಿྙLjᔫᏴ ,6W ࢟Ꮞ࢟ኹࡼ NBY8436 భถဤ߲ܰݙ
,4/4Wࡼ߂ܪ൝࢟ຳă࣪ၒྜྷ࢟ຳቲᓞધࡼஊऱ
ښᒄጙဵǖᎅധఎവၒ߲དࣅNBY8436ࡼJ0Păဧೌ
ࡵW,ৎ࢟ኹࡼ౯࢟ᔜLjጲཀྵۣࡍ᎖1/8 y W,ࡼ൝
࢟ຳ࢟ኹă
0
A
DATA TO INTERRUPT MASK
A
DATA 1
R/W ACKNOWLEDGE
FROM SLAVE
A
DATA 2
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
INTERNAL WRITE
TO PORT
DATA OUT
FROM PORT
DATA 1 VALID
tPV
DATA 2 VALID
tPV
ᅄ:/! ቖNBY8436
14
______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
ඛৈJ0P࣡ాQ1–Q8࣒ᎌጙৈభۻဧถணᒏࡼ51lΩ )࢜ቯ
ᒋ*౯࢟ᔜăࡩ࣡ా࢟ኹۻདࣅࡵW,ጲဟLj౯ဧถ
ఎਈࡼᄏऔࡴᄰLj51lΩ౯࢟ᔜဧถăࡩNBY8436
ࣥ࢟)W, > 1W*ဟLjඛৈၒྜྷ࣡ాྙᄴጙৈ51lΩ ࢟ᔜᎧऔ
ࠈೊLjೌࡵഃ࢟ᆡăၒྜྷ࣡ాᏴྀੜ༽ౚሆ
ᎌ,7Wۣઐ)ᅄ22*ă
དࣅMFEঌᏲ
ಽၒ߲࣡ాདࣅMFEဟLjܘኍଝးࡼ࢟ᔜᎧMFEࠈೊLj
ጲ MFE ࢟ഗሢᒜᏴ 31nB ጲดă ڳMFE ࡼፓೌࡵ
NBY8436࣡ాLjMFEࡼዴᄰਭࠈೊሢഗ࢟ᔜSMFE ೌ
ࡵ W,ăᒙ࣡ాၒ߲ࢅ࢟ຳ࢛ೡ MFEăభጲጞᑍሆ
ါኡᐋ࢟ᔜǖ
SMFE >! )WTVQQMZ .! WMFE .! WPM*! 0! JMFE
JMFE ဵჅገཇࡼMFEᔫ࢟ഗ)B*ă
ಿྙLj,6W࢟Ꮞ࢟Ăጲ21nB࢟ഗདࣅጙৈ3/3WMFE
ဟǖ
SMFE >! )6! .! 3/3! .! 1/2*! 0! 1/12! >! 381Ω
དࣅ࢟ഗࡍ᎖31nBࡼঌᏲ
NBY8436 ᄰਭ݀ೊၒ߲భ᎖དࣅଖ࢟ࢀᇢ၃࢟ഗࡍ
᎖ 31nB ࡼঌᏲăඛ 31nB ঌᏲᒗኊገጙৈၒ߲࣡ాLj
ಿྙLjጙৈ6WĂ441nXࡼଖ࢟ᇢ၃࢟ഗᆐ77nBLjፐࠥ
ኊገ5ৈ݀ೊၒ߲ăྀੜၒ߲ᔝభᔫঌᏲৢሱଐ
࣡ాLjፐᆐ࣡ాࡼྀੜᔝభᏴᄴጙဟମᄰਭቖྜྷ
NBY8436 ቲᒙᆡ༹ഃăୈᔐᇢ၃࢟ഗݙገި߲
211nBă
ਈܕঢቶঌᏲဟ)ྙଖ࢟*્ޘညၾზঌኹLjᄰਭᏴঢቶ
ঌᏲోጙৈनມऔဣሚ࣪NBY8436ࡼۣઐăኡ
ᐋऔဟLjख़ᒋ࢟ഗገࡍ᎖ঢቶঌᏲࡼᔫ࢟ഗă
࢟Ꮞఠ
ᒦǖ
NBY8436 ᔫᏴ ,2/82W ᒗ ,6/6W ࢟Ꮞ࢟ኹăጙৈభ
ถణதୈࡼ1/158μGჿࠣ࢟ྏ࢟ᏎവᒗHOEă࣪᎖
URGOॖᓤLjൡHOEă
SMFE ဵᎧMFEࠈೊࡼ࢟ᔜ)Ω*ă
WTVQQMZ ဵ᎖དࣅMFEࡼ࢟Ꮞ࢟ኹ)W*ă
WMFE ဵMFEࡼᑵሶ࢟ኹ)W*ă
WPM ဵࡩᇢ၃JMFE ࢟ഗဟLjNBY8436ࡼࢅ࢟ຳၒ߲࢟ኹ)W*ă
V+
V+
V+
MAX7325
PULLUP
ENABLE
V+
MAX7325
40kΩ
O8–O15
P0–P7
INPUT
OUTPUT
OUTPUT
GND
ᅄ21/! NBY8436ᅎᅴါၒ߲࣡ాஉ৩
GND
ᅄ22/! NBY8436ധఎവJ0P࣡ాஉ৩
______________________________________________________________________________________
15
NBY8436
ඛৈ J0P ా Q1–Q8 ᎌጙৈᒗ HOE ࡼۣઐऔ)ᅄ
22*Ljࡩၒྜྷ࣡ాۻདࣅࡵࢅ᎖HOE࢟ኹဟLjۣઐऔ
ၒྜྷ༃ᆡࡵࢅ᎖HOEጙৈऔࡴᄰኹଢ଼ă
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
``````````````````````````````` ถౖᅄ
``````````````````````````` ࢜ቯ።࢟വ
3.3V
V+
μC
AD0
AD2
SCL
INPUT
SDA
FILTER
I2C
CONTROL
I/O
PORTS
SCL
SCL
SDA
RST
SDA
RST
INT
INT
MAX7325
O15
O14
O13
O12
O11
O10
O9
O8
INT
POWERON RESET
RST
O15
O14
O13
O12
O11
O10
O9
O8
P7
P6
P5
P4
P3
P2
P1
P0
AD0
AD2
MAX7325
GND
```````````````````````````` ୭ᒙ)ኚ*
P7
P6
P5
P4
P3
P2
P1
P0
``````````````````````````````` በຢቧᇦ
PROCESS: BiCMOS
TOP VIEW
INT 1
+
24 V+
RST 2
23 SDA
AD2 3
22 SCL
P0 4
MAX7325
21 AD0
P1 5
20 O15
P2 6
19 O14
P3 7
18 O13
P4 8
17 O12
P5 9
16 O11
P6 10
15 O10
P7 11
14 O9
GND 12
13 O8
QSOP
16
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
______________________________________________________________________________________
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
24L QFN THIN.EPS
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
E
1
2
______________________________________________________________________________________
17
NBY8436
````````````````````````````````````````````````````````````````````````````` ॖᓤቧᇦ
(۾ၫᓾ೯ᄋࡼॖᓤᅄభถဵݙᔢதࡼਖৃLjྙኊᔢதࡼॖᓤᅪተቧᇦLj༿އኯ www.maxim-ic.com.cn/packagesă)
NBY8436
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
```````````````````````````````````````````````````````````````````````````ॖᓤቧᇦ)ኚ *
(
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
18
______________________________________________________________________________________
E
2
2
J3D࣡ా౫ᐱLj
ᄋ9വᅎᅴਜ਼9വఎധJ0P
QSOP.EPS
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
21-0055
F
1
1
19
NBY8436
```````````````````````````````````````````````````````````````````````````ॖᓤቧᇦ)ኚ *
(