White Electronic Designs WED7PxxxCFA80xxC25 CompactFlashTM Card FEATURES DESCRIPTION Fully compatible with PC Card Standard & CFA(Compact Flash Association) Standard. Support 3 variations of mode access The WEDC CompactFlash™ Card consists of a CompactFlash™ Controller, which supports Toshiba/ Samsung NAND type flash. The CompactFlash™ Card meets CFA specification V1.4, and provides error correcting code (ECC) reliability to detect and correct errors automatically. • I/O Card Mode • Memory Card Mode • True- IDE Mode +5.5V / +3.0V single power supply. Internal Error Correction Logic * This product is subject to change without notice. Notes: CompactFlash™ is a trademark of SanDisk Corporation and is licensed royaltyfree to the CFA, which in turn will license it royalty-free to CFA members. CFA: CompactFlash™ Association. • Data Interleave to 2 for each 256 Bytes. • Error Correction of 1 Byte random error per 128 Bytes of data. • Automatic on-the-fly, in-buffer error correction. Compatible with all PC Card Service and Socket Service. Integrated PC Card attribute memory of 256 Bytes(CIS). 4 PC Card function register support. Support Host-side Write Protect. Automatic wake up from power-down on host reset or command write. Sector data transfers without microprocessor intervention. Operation Environment • Temperature — 0°C ~ 65°C • Humidity — 8% ~ 95% PRODUCT TYPES Card Density 32MB 64MB 128MB 256MB 512MB 1024MB 2048MB 4096MB Model No. 7P032CFA80xxC25 7P064CFA80xxC25 7P128CFA80xxC25 7P256CFA80xxC25 7P512CFA80xxC25 7P1024CFA80xxC25 7P2048CFA80xxC25 7P4G0CFA80xxC25 xx = Housing 00 = WEDC logo 01 = No logo White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 BLOCK DIAGRAM HOST INTERFACE D0 to D15 BVD2/1SPKR/DASP# A0 to A10 CE1#, CE2# OE#, ATASEL# WE# IORD# IOWR# REG# RESET/RESET# Data Bus FAD [7:0]/FBD[7:0] Control Signal FCE/7..01 Flash Memory Controller CSEL# RDY/BSY#/IREQ#/INTRQ WP/IOIS16# INPACK# BVD1/STSCHG#/PDIAG# WAIT#/IORDY White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 PIN ASSIGNMENTS AND PIN TYPE PC Card Memory Mode Pin Num 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Signal Name GND D03 D04 D05 D06 D07 CE1# A10 OE# A09 A08 A07 VCC A06 A05 A04 A03 A02 A01 A00 D00 D01 D02 WP CD2# CD1# D111 D121 D131 D141 D151 CE21# VS1# IORD# IOWR# WE# RDY/BSY VCC CSEL# VS2# RESET WAIT# INPACK# REG# BVD2 Pin Type I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I O O I I/O True IDE Mode4 PC Card I/O Mode In ,Out Type Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I3U I1Z I3U I1Z I1Z I1Z Power I1Z I1Z I1Z I1Z I1Z I1Z I1Z I1Z, OZ3 I1Z, OZ3 I1Z, OZ3 OT3 Ground Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I3U Ground I3U I3U I3U OT1 Power I2Z OPEN I2Z OT1 OT1 I3U I1U, OT1 Pin Num 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Signal Name GND D03 D04 D05 D06 D07 CE1# A10 OE# A09 A08 A07 VCC A06 A05 A04 A03 A02 A01 A00 D00 D01 D02 IOIS16# CD2# CD1# D111 D121 D131 D141 D151 CE21# VS1# IORD# IOWR# WE# IREQ VCC CSEL# VS2# RESET WAIT# INPACK# REG# SPKR# Pin Type I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I O O I I/O In ,Out Type Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I3U I1Z I3U I1Z I1Z I1Z Power I1Z I1Z I1Z I1Z I1Z I1Z I1Z I1Z, OZ3 I1Z, OZ3 I1Z, OZ3 OT3 Ground Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I3U Ground I3U I3U I3U OT1 Power I2Z OPEN I2Z OT1 OT1 I3U I1U, OT1 Pin Num 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Signal Name GND D03 D04 D05 D06 D07 CSO# A102 ATA# SEL A092 A082 A072 VCC A062 A052 A042 A032 A02 A01 A00 D00 D01 D02 IOIS16# CD2# CD1# D111 D121 D131 D141 D151 CS11# VS1# IORD# IOWR# WE3# INTRQ VCC CSEL# VS2# RESET# IORDY INPACK# REG3# DASP# Pin Type I/O I/O I/O I/O I/O I I I I I I I I I 1 I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I O O I I/O In ,Out Type Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I3Z I1Z I3U I1Z I1Z I1Z Power I1Z I1Z I1Z I1Z I1Z I1Z I1Z I1Z, OZ3 I1Z, OZ3 I1Z, OZ3 ON3 Ground Ground I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z,OZ3 I1Z Ground I3Z I3Z I3U OZ1 Power I2U OPEN I2Z ON1 OZ1 I3U I1U, ON1 White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 PIN ASSIGNMENTS AND PIN TYPE (cont'd) PC Card Memory Mode Pin Num 46 47 48 49 50 Signal Name BVD1 D081 D091 D101 GND Pin Type I/O I/O I/O I/O True IDE Mode4 PC Card I/O Mode In ,Out Type I1U, OT1 11Z, OZ3 11Z, OZ3 11Z, OZ3 Ground Pin Num 46 47 48 49 50 Signal Name STSCHG# D081 D091 D101 GND Pin Type I/O I/O I/O I/O In ,Out Type I1U, OT1 I1Z, OZ3 I1Z, OZ3 11Z, OZ3 Ground Pin Num 46 47 48 49 50 Signal Name PDIAG# D081 D091 D101 GND Pin Type I/O I/O I/O I/O In ,Out Type I1U, ON1 I1Z, OZ3 I1Z, OZ3 I1Z, OZ3 Ground Notes : 1. These signals are required only for 16 bit access and not required when installed in 8 bit systems. Devices should allow for 3-state signals not to consume current. 2. Should be grounded by the host. 3. Should be tied to VCC by the host. 4. Optional for CE + Cards, Required for CompactFlash Storage Cards. White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATING Symbol VCC VIN VOUT TSTG Parameter Power supply Input voltage Output voltage Storage temperature Rating -0.3 to 6.0 -0.3 to VCC+0.3 -0.3 to VCC+0.3 -40 to 125 Units V V V °C DC CHARACTERISTICS: I) Recommended Operating Conditions: Symbol VCC VIN TOPR Parameter Power supply Input voltage Operating temperature Min. 3.0 0 -20 Max. 5.5 VCC 65 Units V V °C II) General DC Characteristics: Symbol IIL IIH IOZ CIN COUT CBID Parameter Input low current Input high current Tri-state leakage current Input capacitance Output capacitance Bi-direction capacitance Symbol VIL VIH VIL VIH VOL VOH RI Parameter Input low voltage Input high voltage Schmitt input low voltage Schmitt input high voltage Output low voltage Output high voltage Input pull up/down resistance Conditions no pull up/down no pull up/down Min -1 -1 -10 4 4 4 Typ Max 1 1 10 pF pF pF Units µA µA µA Typ Max 0.3VCC Units V V V V V V kΩ III) DC Electrical Characteristics: Min 0.7VCC 1.22 2.08 0.4 1 2.3 75 White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 AC CHARACTERISTICS: Attribute Memory Read Timing Specification Attribute Memory access time is defined as 300ns. Detailed timing specs are shown in Table below. Speed Version 300 ns Item Read Cycle Time Address Access Time Card Enable Access Time Output Enable Access Time Output Disable Time from CE Output Disable Time from OE Address Setup Time Output Enable Time from CE Output Enable Time from OE Data Valid from Address Change Symbol tc(R) ta(A) ta(CE) ta(OE) tdis(CE) tdis(OE) tsu(A) ten(CE) ten(OE) tv(A) IEEE Symbol tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAVGL tELQNZ tGLQNZ tAXQX Min ns. 300 Max ns. 300 300 150 100 100 30 5 5 0 Note: All times are in nanoseconds. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system. The CE# signal or both the OE# signal and the WE# signal must be de-asserted between consecutive cycle operations. Configuration Register (Attribute Memory) Write Timing Specification The Card Configuration write access time is defined as 250ns. Detailed timing specifications are shown in Table below. Speed Version Item Write Cycle Time Write Pulse Width Address Setup Time Write Recovery Time Data Setup Time for WE Data Hold Time 250 ns Symbol tc(W) tw(WE) tsu(A) trec(WE) tsu(D-WEH) th(D) IEEE Symbol tAVAV tWLWH tAVWL tWMAX tDVWH tWMDX Min ns 250 150 30 30 80 30 Max ns Note: All times are in nanoseconds. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card. Common Memory Read Timing Specification Item Output Enable Access Time Output Disable Time from OE Address Setup Time Address Hold Time CE Setup before OE CE Hold following OE Wait Delay Falling from OE Data Setup for Wait Release Wait Width Time Symbol ta(OE) tdis(OE) tsu(A) th(A) tsu(CE) th(CE) tv(WT-OE) tv(WT) tw(WT) IEEE Symbol tGLQV tGHQZ tAVGL tGHAX tELGL tGHEH tGLWTV tQVWTH tWTLWTH Min ns. Max ns. 125 100 30 20 0 20 35 0 350 (3000 for CF+) Note: The maximum load on -WAIT# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system. The WAIT# signal may be ignored if the OE# cycle to cycle time is greater than the Wait Width time. The Max Wait Width time can be determined from the Card Information Structure. The Wait Width time meets the PCMCIA specification of 12ps but is intentionally less in this specification. White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 AC CHARACTERISTICS (cont'd): I/O Input (Read) Timing Specification Item Data Delay after IORD Data Hold following IORD IORD Width Time Address Setup before IORD Address Hold following IORD CE Setup before IORD CE Hold following IORD REG Setup before IORD REG Hold following IORD INPACK Delay Falling from IORD INPACK Delay Rising from IORD IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address Wait Delay Falling from IORD Data Delay from Wait Rising Wait Width Time Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tsuREG(IORD) thREG(IORD) tdfINPACK(IORD) tdrINPACK(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR) tdWT(IORD) td(WT) tw(WT) IEEE Symbol tIGLQV tIGHQX tIGLIGH tAVIGL tIGHAX tELIGL tIGHEH tRGLIGL tIGHRGH tIGLIAL tIGHIAH tAVISL tAVISH tIGLWTL tWTHQV tWTLWTH Min ns. 0 165 70 20 5 20 5 0 0 Max ns. 100 45 45 35 35 35 0 350 (3000 for CF+) Note: Maximum load on WAIT#, INPACK# and I0IS16# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IORD# high is Onsec, but minimum IORD# width must still be met. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system. Wait Width time meets PCMCIA specification of 12ps but is intentionally less in this spec. I/O Output (Write) Timing Specification Item Data Setup before IOWR Data Hold following IOWR IOWR Width Time Address Setup before IOWR Address Hold following IOWR CE Setup before IOWR CE Hold following IOWR REG Setup before IOWR REG Hold following IOWR IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address Wait Delay Falling from IOWR IOWR high from Wait high Wait Width Time Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tsuREG(IOWR) thREG(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) tdWT(IOWR) tdrIOWR(WT) tw(WT) IEEE Symbol tDVIWH tIWHDX tIWLIWH tAVIWL tIWHAX tELIWL tIWHEH tRGLIWL tIWHRGH tAVISL tAVISH tIWLWTL tWTJIWH tWTLWTH Min ns. 60 30 165 70 20 5 20 5 0 Max ns. 35 35 35 0 350 (3000for CF+) Note: The maximum load on WAIT#, INPACK#, and I0IS16# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IOWR# high is Onsec, but minimum IOWR# width must still be met. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card. The Wait Width time meets the PCMCIA specification of 12ps but is intentionally less in this specification. White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 AC CHARACTERISTICS (cont'd): True IDE Mode I/O Input (Read) Timing Specification Item Data Delay after IORD Data Hold following IORD IORD Width Time Address Setup before IORD Address Hold following IORD CE Setup before IORD CE Hold following IORD I0IS16 Delay Falling from Address I0IS16 Delay Rising from Address Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tIGLQV tIGHQX tIGLIGH tAVIGL tIGHAX tELIGL tIGHEH tAVISL tAVISH Min ns. Max ns. 100 0 165 70 20 5 20 35 35 Note: The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IORD# high is 0 nsec, but minimum IORD# width must still be met. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system. True IDE Mode I/O Output (Write) Timing Specification Item Data Setup before IOWR Data Hold following IOWR IOWR Width Time Address Setup before IOWR Address Hold following IOWR CE Setup before IOWR CE Hold following IOWR I0IS16 Delay Falling from Address I0IS16 Delay Rising from Address Note: Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tDVIWH tIWHDX tIWLIWH tAVIWL tIWHAX tELIWL tIWHEH tAVISL tAVISH Min ns. 60 30 165 70 20 5 20 Max ns. 35 35 The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IOWR# high is 0 nsec, but minimum IOWR# width must still be met. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card. White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 PHYSICAL SPECIFICATIONS Length: 36.40 ± 0.15mm (1.433 ± .006in.) Width: 42.80 ± 0.10mm (1.685 ± .004in.) Thickness (Including Label Area) 3.3mm ± 0.10mm (.130 ± .004in) PACKAGE DIMENSIONS Top View 1.60mm ± .05 (.063 in ± .002) 50 1 25 .99mm ± .05 (.039 in ± .002) 2.44mm ± .07 (.096 in ± .003) 2 x 25.78mm ± .07(2 x 1.015 ± . 003) .01mm ± .07(.039 in ± .003) .01mm ± .07(.039 in ± .003) Optional Configuration (See Note) 2.15mm ± .07 (.085 in x .003) 2 x 3.00mm ± .07 (2 x .118 in ± . 003) 36.40mm ± .15(1.433 in ± . 006) 2 x 12.00mm ± .10 (2 x 472 in ± .004) 3.30mm ± .10 (.130 in ± .004) 26 0.76mm ± .07(0.30 in ± .003) 4xR 0.5mm ± .1 (4xR.020 in ± .004) 41.66mm ± .13(1.640 in ±. 005) 42.80mm ± .10(1.685 in ± .004) 0.63mm ± .07(.025 in ± .003) Note: The optional notched configuration was shown in the CF Specification Rev. 1.0. In specification Rev. 1.2, the notch was removed for ease of tooling. This optional configuration can be used but it is not recommended. White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 9 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 PART NUMBERING GUIDE WED 7P xxx CFA 80 xx C 25 WEDC Flash Memory Size Compact Flash Commercial Flash Housing: 00 = WEDC Logo 01 = Blank Housing Commercial Temp Speed White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 10 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs WED7PxxxCFA80xxC25 Document Title CompactFlash™ Card Revision History Rev # History Release Date Status Rev 0 Initial Release March 2005 Final Rev 1 1.1 Added "ED" to part marking July 2005 Final White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2005 Rev. 1 11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com