TI TPIC2302D

SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
•
•
•
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Low rDS(on) . . . 0.4 Ω Typ
High-Voltage Outputs . . . 60 V
Pulsed Current . . . 5 A Per Channel
Fast Commutation Speed
D PACKAGE
(TOP VIEW)
DRAIN1
GATE2
DRAIN2
DRAIN3
1
8
2
7
3
6
4
5
GATE1
SOURCE/GND
SOURCE/GND
GATE3
description
The TPIC2302 is a monolithic power DMOS array that consists of three electrically isolated N-channel
enhancement-mode DMOS transistors configured with a common source and open drains. The TPIC2302 is
offered in a standard 8-pin small-outline surface-mount (D) package.
The TPIC2302 is characterized for operation over the case temperature range of − 40°C to 125°C.
schematic
DRAIN1
DRAIN2
1
3
Q1
GATE1
8
DRAIN3
4
Q2
Z1
GATE2
Q3
2
Z2
GATE3
5
Z3
6, 7
SOURCE / GND
absolute maximum ratings over operating case temperature range (unless otherwise noted)†
Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Gate-to-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Continuous drain current, each output, all outputs on, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Pulsed drain current, each output, TC = 25°C (see Note 1 and Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 A
Single-pulse avalanche energy, TC = 25°C, EAS (see Figures 4 and 16) . . . . . . . . . . . . . . . . . . . . . . . . . 9 mJ
Continuous total power dissipation at (or below) TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.95 W
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms, duty cycle = 2%
Copyright  1995, Texas Instruments Incorporated
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SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
V(BR)DSX
VGS(th)
TEST CONDITIONS
Drain-to-source breakdown voltage
Gate-to-source threshold voltage
ID = 250 µA,
ID = 1 mA,
VGS = 0
VDS = VGS
VGS = 10 V,
VDS(on)
Drain-to-source on-state voltage
ID = 1 A,
See Notes 2 and 3
VF(SD)
Forward on-state voltage, source-to-drain
IS = 1 A,
VGS = 0 (Z1, Z2, Z3),
See Notes 2 and 3
IDSS
Zero-gate-voltage drain current
VDS = 48 V,
VGS = 0
TC = 25°C
TC = 125°C
IGSSF
IGSSR
Forward gate current, drain short circuited to source
VGS = 16 V,
VSG = 16 V,
VDS = 0
VDS = 0
Leakage current, drain-to-GND
VR = 48 V
Static drain-to-source on-state resistance
Ilkg
rDS(on)
Reverse gate current, drain short circuited to source
gfs
Forward transconductance
Ciss
Short-circuit input capacitance, common source
Coss
Short-circuit output capacitance, common source
Crss
Short-circuit reverse-transfer capacitance,
common source
MIN
TYP
MAX
1.85
2.2
V
0.4
0.475
V
0.9
1.1
V
60
1.5
UNIT
V
0.05
1
0.5
10
10
100
nA
10
100
nA
TC = 25°C
TC = 125°C
0.05
1
0.5
10
VGS = 10 V,
ID = 1 A,
See Notes 2 and 3
and Figures 6 and 7
TC = 25°C
0.4
0.475
TC = 125°C
0.63
0.7
VDS = 10 V,
See Notes 2 and 3
ID = 0.5 A,
VDS = 25 V,
f = 1 MHz
VGS = 0,
µA
A
µA
A
Ω
0.85
1.02
S
115
145
60
75
30
40
pF
NOTES: 2. Technique should limit TJ − TC to 10°C maximum, pulse duration ≤ 5 ms.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
source-to-drain diode characteristics, TC = 25°C
PARAMETER
trr(SD)
QRR
2
Reverse-recovery time
Total diode charge
TEST CONDITIONS
IS = 0.5 A, VGS = 0,
di/dt = 100 A/µs,
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VDS = 48 V,
See Figure 1
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MIN
TYP
MAX
UNIT
65
ns
0.03
µC
SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
resistive-load switching characteristics, TC = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
21
42
20
40
5
10
td(on)
td(off)
Turn-on delay time
tr2
tf2
Rise time
Fall time
13
26
Qg
Total gate charge
3.1
3.8
Qgs(th)
Threshold gate-to-source charge
0.4
0.5
Qgd
Gate-to-drain charge
1.3
1.6
LD
Internal drain inductance
5
LS
Internal source inductance
5
Rg
Internal gate resistance
Turn-off delay time
VDD = 25 V,
tf1 = 10 ns,
VDS = 48 V,
See Figure 3
RL = 50 Ω,
See Figure 2
tr1 = 10 ns,
ID = 0.5 A,
VGS = 10 V,
UNIT
ns
nC
nH
Ω
0.25
thermal resistance
PARAMETER
TEST CONDITIONS
RθJA
Junction-to-ambient thermal resistance
RθJP
Junction-to-pin thermal resistance
MIN
All outputs with equal power,
TYP
130
See Note 4
44
MAX
UNIT
°C/ W
NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink
PARAMETER MEASUREMENT INFORMATION
1.5
TJ = 25°C
I S − Source-to-Drain Diode Current − A
1
0.5
Reverse di/dt = 100 A/µs
0
25% of IRM†
− 0.5
−1
− 1.5
−2
IRM†
trr(SD)
− 2.5
0
25
50
75
100 125 150
Time − ns
175
200
225
250
† IRM = maximum recovery current
Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode
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3
SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
RL
Pulse Generator
tr1
VDS
tf1
10 V
VGS
VGS
0V
DUT
Rgen
td(off)
td(on)
50 Ω
CL = 30 pF
(see Note A)
50 Ω
tr2
tf2
VDD
VDS
VDS(on)
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTE A: CL includes probe and jig capacitance.
Figure 2. Resistive-Switching Test Circuit and Voltage Waveforms
Current
Regulator
12-V
Battery
0.2 µF
VDS
Same Type
as DUT
50 kΩ
Qg
10 V
0.3 µF
Qgs(th)
VDD
0
VGS
DUT
IG = 1 µA
Qgd
Gate Voltage
Time
IG CurrentSampling Resistor
ID CurrentSampling Resistor
Qgs = Qg − Qgd
VOLTAGE WAVEFORM
TEST CIRCUIT
Figure 3. Gate-Charge Test Circuit and Voltage Waveform
4
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PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
420 µH
Pulse Generator
(see Note A)
ID
VDS
tav†
tw
15 V
VGS
0V
IAS
(see Note B)
VGS
50 Ω
DUT
ID
0V
Rgen
50 Ω
V(BR)DSX = 60 V Min
VDS
0V
VOLTAGE AND CURRENT WAVEFORMS
TEST CIRCUIT
† Non-JEDEC symbol for avalanche time
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B. Input pulse duration (tw) is increased until peak current IAS = 5 A.
I
V
t av
AS
(BR)DSX
+ 9 mJ, where t av + avalanche time.
Energy test level is defined as E
+
AS
2
Figure 4. Single-Pulse Avalanche-Energy Test Circuit and Waveforms
TYPICAL CHARACTERISTICS
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
2.5
1
ID = 1 A
2
ID = 1 mA
1.5
ID = 100 µA
1
0.5
0
−40 −20
0.8
On-State Resistance − Ω
r DS(on) − Static Drain-to-Source
V GS (th) − Gate-to-Source Threshold Voltage − V
GATE-TO-SOURCE THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
0.6
VGS = 10 V
0.4
VGS = 15 V
0.2
0
−40 −20
0
20 40 60 80 100 120 140 160
TJ − Junction Temperature − °C
Figure 5
0
20 40 60 80 100 120 140 160
TJ − Junction Temperature − °C
Figure 6
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5
SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
TYPICAL CHARACTERISTICS
DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
DRAIN CURRENT
1
5
15 V
10 V
nVGS = 0.2 V
Unless Otherwise
Noted
TJ = 25°C
I D − Drain Current − A
4
On-State Resistance − Ω
r DS(on) − Static Drain-to-Source
TJ = 25°C
VGS = 10 V
VGS = 15 V
VGS = 5 V
3
VGS = 4 V
2
1
VGS = 3 V
0.1
0.01
0
0.1
1
ID − Drain Current − A
0
10
5
6
7
8
2
3
4
VDS − Drain-to-Source Voltage − V
1
Figure 7
DRAIN CURRENT
vs
GATE-TO-SOURCE VOLTAGE
0.5
5
Total Number of Units = 639
TJ = 25°C
TJ = 25°C
4
I D − Drain Current − A
0.35
0.3
0.25
0.2
0.15
TJ = 150°C
2.5
2
1.5
0
1.06
1.05
0
1.04
0
1.03
0.5
1.02
0.05
1
7
8
9
2
3
4
5
6
VGS − Gate-to-Source Voltage − V
gfs − Forward Transconductance − S
Figure 9
Figure 10
•
•
TJ = 125°C
3
1
1.01
TJ = 75°C
3.5
0.1
1
Percentage of Units − %
TJ = − 40°C
4.5
0.4
6
10
Figure 8
DISTRIBUTION OF
FORWARD TRANSCONDUCTANCE
0.45
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SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
TYPICAL CHARACTERISTICS
SOURCE-TO-DRAIN DIODE CURRENT
vs
SOURCE-TO-DRAIN VOLTAGE
CAPACITANCE
vs
DRAIN-TO-SOURCE VOLTAGE
10
400
360
C − Capacitance − pF
320
I SD − Source-to-Drain Diode Current − A
f = 1 MHz
TJ = 25°C
Ciss(0) = 158 pF
Coss(0) = 400 pF
Crss(0) = 78 pF
280
240
200
160
Ciss
120
80
Coss
40
Crss
4
TJ = 125°C
TJ = − 40°C
TJ = 150°C
0.1
TJ = 25°C
ÁÁ
ÁÁ
8
12 16 20 24 28 32 36
VDS − Drain-to-Source Voltage − V
TJ = 75°C
0.01
0.1
0
0
1
40
1
VSD − Source-to-Drain Voltage − V
Figure 11
Figure 12
DRAIN-TO-SOURCE VOLTAGE AND
GATE-TO-SOURCE VOLTAGE
vs
GATE CHARGE
150
12
VDD = 20 V
50
10
VDD = 30 V
8
40
30
6
20
4
VDD = 48 V
10
t rr − Reverse-Recovery Time − ns
ID = 0.5 A
TJ = 25°C
See Figure 3
VGS − Gate-to-Source Voltage − V
VDS − Drain-to-Source Voltage − V
REVERSE-RECOVERY TIME
vs
REVERSE di/dt
14
70
60
2
VDD = 20 V
0
0
0.5
10
1
1.5
2
2.5
Qg − Gate Charge − nC
3
125
100
75
Q1, Q2, and Q3
50
25
0
0
3.5
IS = 0.5 A
TJ = 25°C
See Figure 1
0
100
200
300
400
500
600
Reverse di/dt − A/µs
Figure 13
Figure 14
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7
SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
THERMAL INFORMATION
MAXIMUM PEAK-AVALANCHE CURRENT
vs
TIME DURATION OF AVALANCHE
MAXIMUM DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
10
10
I D − Maximum Drain Current − A
I AS − Maximum Peak-Avalanche Current − A
See Figure 4
TC = 25°C
1 µs†
10 ms†
1 ms†
1
500 µs†
ÁÁ
ÁÁ
0.1
0.1
DC Conditions
10
1
VDS − Drain-to-Source Voltage − V
TC = 25°C
TC = 125°C
1
0.01
100
0.1
Figure 16
† Less than 0.1 duty cycle
Figure 15
8
1
tav − Time Duration of Avalanche − ms
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SLIS028B − APRIL 1994 − REVISED SEPTEMBER 1995
THERMAL INFORMATION
D PACKAGE†
NORMALIZED JUNCTION - TO -AMBIENT THERMAL RESISTANCE
vs
PULSE DURATION
R θJA − Normalized Junction-to-Ambient Thermal Resistance − °C/W
10
1
DC Conditions
d = 0.5
d = 0.2
d = 0.1
0.1
d = 0.05
d = 0.02
d = 0.01
0.01
Single Pulse
0.001
tc
tw
ID
0
0.0001
0.0001
0.001
0.01
0.1
1
10
tw − Pulse Duration − s
† Device mounted on FR4 printed-circuit board with no heat sink
NOTE A: ZθA(t) = r(t) RθJA
tw = pulse duration
tc = cycle time
d = duty cycle = tw/tc
Figure 17
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9
10
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Apr-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPIC2302D
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
TPIC2302DR
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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