TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 D D D D D Three 7.5-A Independent Output Channels, Continuous Current Per Channel Low rDS(on) . . . 0.09 Ω Typical Output Voltage . . . 60 V Pulsed Current . . . 15 A Per Channel Avalanche Energy . . . 120 mJ KV PACKAGE (TOP VIEW) 7 6 5 4 3 2 1 description DRAIN3 GATE3 DRAIN2 SOURCE GATE2 DRAIN1 GATE1 The TPIC2301 is a monolithic power DMOS array that consists of three independent N-channel enhancement-mode DMOS transistors connected in a common-source configuration with open drains. schematic GATE2 DRAIN1 2 GATE1 GATE3 DRAIN2 3 The tab is electrically connected to SOURCE. DRAIN3 5 6 7 1 4 SOURCE absolute maximum ratings over operating case temperature range (unless otherwise noted) Drain-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V Gate-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V Continuous source-drain diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5 A Pulsed drain current, each output, all outputs on, ID (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 A Continuous drain current, each output, all outputs on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5 A Single-pulse avalanche energy, EAS (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mJ Continuous power dissipation at (or below) TA = 25°C (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 W Continuous power dissipation at (or below) TC = 75°C, all outputs on (see Note 2) . . . . . . . . . . . . . . . . 50 W Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C NOTES: 1. Pulse duration = 10 ms, duty cycle = 6% 2. For operation above 25°C free-air temperature, derate linearly at the rate of 16 mW/°C. For operation above 75°C case temperature, and with all outputs conducting, derate linearly at the rate of 0.66 W/°C. To avoid exceeding the design maximum virtual junction temperature, these ratings should not be exceeded. Copyright 1992, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 electrical characteristics, TC = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V(BR)DS Drain-source breakdown voltage VTGS Gate-source threshold voltage ID = 1 µA, ID = 1 mA, VGS = 0 VDS = VGS 1.75 2.4 V VDS(on) Drain-source on-state voltage ID = 7.5 A, VGS = 15 V, See Notes 3 and 4 0.68 0.94 V IDSS Zero gate voltage drain current Zero-gate-voltage VDS = 48 V V, VGS = 0 TC = 25°C TC = 125°C 0.07 1 1.3 10 IGSSF Forward gate current, drain short circuited to source VGS = 20 V, VDS = 0 10 100 nA IGSSR Reverse gate current, drain short circuited to source VGS = – 20 V, VDS = 0 10 100 nA Static drain-source on-state resistance VGS = 15 V, ID = 7.5 A, See Notes 3 and 4 and Figures 5 and 6 TC = 25°C 0.09 0.125 rDS( DS(on)) TC = 125°C 0.15 0.21 gfs Forward transconductance VDS = 15 V, See Notes 3 and 4 Ciss Short-circuit input capacitance, common source Coss Short-circuit output capacitance, common source Crss Short-circuit reverse transfer capacitance, common source ID = 5 A, 60 1.2 3.3 V 4.7 µA Ω S 490 VDS = 25 V, VGS = 0, f = 300 kHz pF 285 90 NOTES: 3. Technique should limit TJ – TC to 10°C maximum. 4. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts. source-drain diode characteristics, TC = 25°C PARAMETER VSD trr Forward on voltage QRR Total source-drain diode charge TEST CONDITIONS IS = 7 7.5 5A A, VDS = 48 V, Reverse recovery time VGS = 0, 0 See Figure 1 MIN di/dt = 100 A/ A/µs, s TYP MAX 0.8 1.3 UNIT V 200 ns 1.5 µC resistive-load switching characteristics, TC = 25°C PARAMETER td(on) td(off) Turn-on delay time tr tf Rise time Qg Total gate charge TEST CONDITIONS MIN TYP MAX UNIT 12 Turn-off delay time VDD = 25 V,, t dis = 10 ns, RL = 6.7 Ω,, See Figure 2 100 ten = 10 ns,, ns 43 Fall time 5 VDS = 48 V, V See Figure 3 ID = 2.5 2 5 A, A VGS = 10 V, V 13.6 18 8.3 11 5.3 7 Qgs Gate-source charge Qgd Gate-drain charge LD LS Internal drain inductance 7 Internal source inductance 7 nC nH thermal resistance PARAMETER TEST CONDITIONS RθJA Junction-to-ambient thermal resistance RθJC Junction to case thermal resistance Junction-to-case 2 POST OFFICE BOX 655303 MAX UNIT All outputs with equal power 62.5 °C/W All outputs with equal power 1.5 °C/W One output dissipating power 3.3 °C/W • DALLAS, TEXAS 75265 MIN TYP TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 PARAMETER MEASUREMENT INFORMATION 7.5 A di/dt = 100 A/µs QRR = Shaded Area IS 0 25% of IRM IRM (see Note A) trr NOTE A: IRM = maximum recovery current Figure 1. Reverse-Recovery-Current Waveforms of Source-Drain Diode 25 V ten VDS Pulse Generator tdis 90% RL VGS 10% 15 V 90% 0 VGS DUT Rgen 50 Ω td(off) td(on) 50 Ω 90% VDS 10% VDD VDS(on) tr tf VOLTAGE WAVEFORMS TEST CIRCUIT Figure 2. Resistive Switching POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 PARAMETER MEASUREMENT INFORMATION Current Regulator 12-V Battery 0.2 µF Qg Same Type as DUT 50 kΩ 10 V 0.3 µF Qgd VGS VDD = 48 V DUT IG = 1 mA 0 Gate Voltage Time IG CurrentSampling Resistor Qgs = Qg – Qgd ID CurrentSampling Resistor WAVEFORM TEST CIRCUIT Figure 3. Gate-Charge Test Circuit and Waveform 25 V tw 15 V 2.5 mH ID Pulse Generator 50 Ω tav VGS 0 VDS VGS IAS (see Note B) ID DUT 0 Rgen V(BR)DSX = 60 V MIN VDS 50 Ω 0 VOLTAGE AND CURRENT WAVEFORMS TEST CIRCUIT NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω. B. Input pulse duration (tw) is increased until peak current IAS = 7.5 A. Energy test level is defined as E + AS I AS V (BR)DSX 2 t av + 120 mJ min. Figure 4. Single-Pulse Avalanche Energy Test Circuit and Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 TYPICAL CHARACTERISTICS STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs CASE TEMPERATURE STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs DRAIN CURRENT 0.3 1 ID = 7.5 A TC = 25°C VGS = 5 V rDS(on) – Static Drain-Source On-State Resistance – Ω rDS(on) – Static Drain-Source On-State Resistance – Ω 0.25 VGS = 5 V 0.2 VGS = 10 V 0.15 0.1 VGS = 15 V VGS = 20 V 0.05 0 – 50 VGS = 10 V VGS = 15 V 0.1 VGS = 20 V 0.01 – 25 0 25 50 75 100 125 0 3 TC – Case Temperature – °C Figure 5 DRAIN CURRENT vs DRAIN-TO-SOURCE VOLTAGE 25 15 TC = 25°C ID = 7.5 A VDS = 15 V VGS = 5 V VGS = 10 V 12 I D – Drain Current – A Percentage of Units – % 15 Figure 6 DISTRIBUTION OF FORWARD TRANSCONDUCTANCE 20 6 9 12 ID – Drain Current – A 15 10 TC = 25°C VGS = 4.5 V VGS = 4 V 9 VGS = 3.5 V 6 VGS = 3 V 5 3 0 4.6 4.65 4.7 4.75 4.8 gfs – Forward Transconductance – S 0 0 5 10 15 20 25 30 35 40 45 VDS – Drain-to-Source Voltage – V 50 Figure 8 Figure 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 TYPICAL CHARACTERISTICS GATE-SOURCE THRESHOLD VOLTAGE vs CASE TEMPERATURE SOURCE-DRAIN DIODE CURRENT vs SOURCE-DRAIN VOLTAGE 100 ID = 1 mA 1.8 I SD – Source-Drain Diode Current – A VTGS – Gate-Source Threshold Voltage – V 2 1.6 1.4 1.2 1 0.8 0.6 0.4 10 TC = 125°C TC = – 40°C 1 TC = 25°C 0.2 0 – 50 0.1 – 25 0 50 25 75 100 125 0 TC – Case Temperature – °C 0.5 1 1.5 VSD – Source-Drain Voltage – V Figure 9 Figure 10 REVERSE RECOVERY TIME vs REVERSE di/dt GATE-SOURCE VOLTAGE vs GATE CHARGE 300 16 ID = 2.5 A TC = 25°C TC = 25°C 12 VDS = 20 V 10 8 6 VDS = 30 V 4 VDS = 48 V t rr – Reverse-Recovery Time – ns 14 VGS – Gate-Source Voltage – V 2 250 200 150 100 50 2 0 0 0 1.5 3 4.5 6 7.5 9 10.5 12 13.5 15 0 200 Figure 12 Figure 11 6 100 POST OFFICE BOX 655303 300 Reverse di/dt – A/µs Q – Gate Charge – nC • DALLAS, TEXAS 75265 400 500 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 TYPICAL CHARACTERISTICS VDS = 37.5 V 35 V DS – Drain-Source Voltage – V 16 RL = 7.5 Ω IG = 100 µA TC = 25°C 14 30 12 Gate-Source Voltage VDS = 25 V 25 10 VDS = 37.5 V 20 8 VDS = 25 V 15 6 VDS = 12.5 V 10 4 VGS – Gate-Source Voltage – V 40 2 5 Drain-Source Voltage 0 0 50 100 150 200 250 300 350 400 450 500 t – Time – µs Figure 13. Resistive Switching Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPIC2301 3-CHANNEL COMMON-SOURCE POWER DMOS ARRAY SLIS018 – SEPTMEBER 1992 THERMAL INFORMATION MAXIMUM DRAIN CURRENT vs DRAIN-SOURCE VOLTAGE MAXIMUM PEAK AVALANCHE CURRENT vs TIME DURATION OF AVALANCHE 100 I AS – Maximum Peak Avalanche Current – A 100 I D – Maximum Drain Current – A TC = 25°C rDS(on) Limit 15 A 1 ms 10 7.5 A DC 1 0.1 10 1 10 TC = 25°C TC = 125°C 1 0.01 100 VDS – Drain-Source Voltage – V 0.1 1 10 tav – Time Duration of Avalanche – ms Figure 14 Figure 15 r(t) – Normalized Transient Resistance NORMALIZED TRANSIENT THERMAL IMPEDANCE vs SQUARE-WAVE PULSE DURATION 1 0.8 0.6 d=1 0.4 0.5 TC = 25°C 0.2 0.2 0.1 0.1 0.08 0.06 0.05 0.04 tc Single Pulse 0.02 tw ID 0 0.02 0.01 0.01 0.01 10 1 0.1 tw – Pulse Duration – ms NOTES: ZθJC(t) = r(t) RθJC tw pulse duration tc period d duty cycle tw tc + + + 8 + ń Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 100 1000 10000 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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