ONSEMI NTGD3149CT1G

NTGD3149C
Power MOSFET
Complementary, 20 V, +3.5/−2.7 A,
TSOP−6 Dual
Features
•
•
•
•
•
•
Complementary N−Channel and P−Channel MOSFET
Small Size (3 x 3 mm) Dual TSOP−6 Package
Leading Edge Trench Technology for Low On Resistance
Reduced Gate Charge to Improve Switching Response
Independently Connected Devices to Provide Design Flexibility
This is a Pb−Free Device
Applications
• DC−DC Conversion Circuits
• Load/Power Switching with Level Shift
http://onsemi.com
V(BR)DSS
RDS(on) MAX
N−Ch
20 V
60 mW @ 4.5 V
P−Ch
−20 V
110 mW @ 4.5 V
Drain−to−Source Voltage
Gate−to−Source Voltage
(N−Ch & P−Ch)
N−Channel
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°C
TA = 85°C
t≤5s
TA = 25°C
P−Channel
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°C
TA = 85°C
t≤5s
TA = 25°C
Power Dissipation
(Note 1)
Steady State
TA = 25°C
Pulsed Drain
Current
Value
Unit
VDSS
20
V
VGS
±8
V
ID
3.2
2.3
A
N−Ch
IDM
P−Ch
Operating Junction and Storage Temperature
D2
S1
P−CHANNEL MOSFET
A
2.4
1.7
W
0.9
1.1
tp = 10 ms
G2
G1
MARKING
DIAGRAM
2.7
t≤5s
S2
N−CHANNEL MOSFET
3.5
PD
−2.7 A
145 mW @ 2.5 V
D1
Symbol
ID
3.5 A
90 mW @ 2.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
ID MAX (Note 1)
A
11
1
TSOP−6
CASE 318G
STYLE 13
CC MG
G
1
8.0
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode)
IS
0.8
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
CC = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTION
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
140
°C/W
Junction−to−Ambient – t ≤ 5 s (Note 1)
RqJA
110
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
G1
1
6 D1
S2
2
5 S1
G2
3
4 D2
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2008
May, 2008 − Rev. 0
1
Publication Order Number:
NTGD3149C/D
NTGD3149C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
Test Conditions
Min
Typ
Drain−to−Source Breakdown Voltage
V(BR)DSS
N
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
N
1.1
P
1.1
Max
Unit
OFF CHARACTERISTICS
VGS = 0 V
P
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
IGSS
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
N
VGS = 0 V, VDS = 16 V
P
VGS = 0 V, VDS = −16 V
ID = 250 mA
20
ID = −250 mA
−20
V
mV/°C
1.0
TJ = 25 °C
mA
−1.0
10
TJ = 85 °C
−10
N
VDS = 0 V, VGS = ±8 V
±100
P
VDS = 0 V, VGS = ±8 V
±100
nA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
VGS(TH)
N
VGS = VDS
P
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
gFS
ID = 250 mA
0.4
1.0
ID = −250 mA
−0.4
−1.0
N
VGS = 4.5 V , ID = 3.5 A
41
60
P
VGS = −4.5 V , ID = −2.7 A
83
110
N
VGS = 2.5 V , ID = 2.9 A
51
90
P
VGS = −2.5 V , ID = −2.4 A
104
145
N
VGS = 1.8 V , ID = 2.2 A
67
150
P
VGS = −1.8 V , ID = −1.9 A
143
220
N
VDS = 10 V , ID = 3.5 A
4.7
P
VDS = −10 V , ID = −2.7 A
5.1
V
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
387
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
40
Total Gate Charge
QG(TOT)
4.6
Threshold Gate Charge
QG(TH)
0.3
N
VDS = 10 V
43
f = 1 MHz, VGS = 0 V
P
N
73
VDS = −10 V
VGS = 4.5 V, VDS = 10 V, ID = 2.0 A
RG = 6 W
76
Gate−to−Source Gate Charge
QGS
Gate−to−Drain “Miller” Charge
QGD
1.2
Total Gate Charge
QG(TOT)
5.2
Threshold Gate Charge
QG(TH)
Gate−to−Source Gate Charge
QGS
Gate−to−Drain “Miller” Charge
QGD
P
VGS = −4.5 V, VDS = −10 V, ID = −1.0 A
RG = 6 W
2
5.5
0.7
0.4
1.0
1.2
http://onsemi.com
pF
509
5.5
nC
NTGD3149C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
N/P
Test Conditions
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
td(ON)
tr
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
N
3.8
VGS = 4.5 V, VDD = 10 V,
ID = 1.0 A, RG = 6.0 W
td(OFF)
16.4
tf
2.4
td(ON)
7.0
tr
td(OFF)
ns
6.5
5.3
VGS = −4.5 V, VDD = −10 V,
ID = −1.0 A, RG = 6.0 W
P
33.3
tf
29.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
N
P
Reverse Recovery Time
VGS = 0 V, TJ = 25 °C
IS = 0.8 A
0.7
1.2
IS = −0.8 A
−0.7
−1.2
tRR
7.7
Charge Time
ta
4.5
Discharge Time
tb
N
VGS = 0 V, dIS / dt = 100 A/ms
V
ns
3.2
Reverse Recovery Charge
QRR
1.9
nC
Reverse Recovery Time
tRR
11.4
ns
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
P
VGS = 0 V, dIS / dt = 100 A/ms
QRR
7.5
3.9
4.7
nC
2. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.
ORDERING INFORMATION
Device
NTGD3149CT1G
Package
Shipping†
TSOP6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
3
NTGD3149C
TYPICAL CHARACTERISTICS (N−CHANNEL)
5.0
VDS ≥ 10 V
2.0 V
1.6 V
1.8 V
4.0
3.0
1.4 V
2.0
1.0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
VGS = 1.2 V
0
0.5
1.0
1.5
2.0
2.5
3.0
4.0
3.0
TJ = 125°C
2.0
TJ = 25°C
1.0
TJ = −55°C
0
1.0
1.5
2.0
2.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. Nch On−Region Characteristics
Figure 2. Nch Transfer Characteristics
ID = 3.5 A
T = 25°C
0.34
0.30
0.26
0.22
0.18
0.14
0.10
0.06
1.0
2.0
3.0
4.0
5.0
6.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.08
0.07
TJ = 25°C
0.06
VGS = 2.5 V
0.05
0.04
VGS = 4.5 V
0.03
0.02
0.01
0
1.0
2.0
3.0
4.0
5.0
6.0
ID, DRAIN CURRENT (A)
Figure 3. Nch On−Resistance vs. Gate Voltage
Figure 4. Nch On−Resistance vs. Drain
Current and Gate Voltage
10,000
1.5
VGS = 0 V
ID = 3.5 A
VGS = 4.5 V
1.4
TJ = 150°C
1.3
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
0.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.38
0.02
5.0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
2.2 V
6.0
2.5 V
ID, DRAIN CURRENT (A)
4.5 V
6.0
1.2
1.1
1.0
0.9
1000
TJ = 125°C
100
0.8
0.7
−50
−25
0
25
50
75
100
125
150
10
2.0
TJ, JUNCTION TEMPERATURE (°C)
4.0
6.0
8.0
10
12
14
16
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. Nch On−Resistance Variation with
Temperature
Figure 6. Nch Drain−to−Source Leakage
Current vs. Voltage
http://onsemi.com
4
18
NTGD3149C
600
550
VGS = 0 V
TJ = 25°C
500
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS (N−CHANNEL)
450
400
Ciss
350
300
250
200
150
100
50
0
Coss
Crss
0
2.0
4.0
6.0
8.0
10
12
14
18
16
20
3.5
3.0
2.5
2.0
Q1
1.5
Q2
1.0
ID = 3.5 A
TJ = 25°C
0.5
0
0
1.0
2.0
3.0
4.0
5.0
QG, TOTAL GATE CHARGE (nC)
Figure 7. Nch Capacitance Variation
Figure 8. Nch Gate−to−Source Voltage vs.
Total Charge
3.5
10
IS, SOURCE CURRENT (A)
VDD = 10 V
ID = 3.5 A
VGS = 4.5 V
t, TIME (ns)
QT
4.0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
td(off)
td(on)
tr
1.0
4.5
tf
1.0
10
2.5
2.0
1.5
1.0
0.5
0
100
VGS = 0 V
TJ = 25°C
3.0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Nch Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Nch Diode Forward Voltage vs.
Current
http://onsemi.com
5
0.9
NTGD3149C
TYPICAL CHARACTERISTICS (P−CHANNEL)
TJ = 25°C
VDS ≥ −10 V
−ID, DRAIN CURRENT (A)
−1.8 V
4.0
−1.6 V
3.0
2.0
−1.4 V
1.0
−1.2 V
VGS = −1.0 V
0
0.5
1.0
1.5
2.0
2.5
3.0
4.0
3.0
TJ = −55°C
2.0
TJ = 25°C
1.0
TJ = 125°C
0
1.0
1.5
2.0
2.5
−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 11. Pch On−Region Characteristics
Figure 12. Pch Transfer Characteristics
ID = −2.7 A
T = 25°C
0.34
0.30
0.26
0.22
0.18
0.14
0.10
0.06
1.0
2.0
3.0
4.0
5.0
6.0
−VGS, GATE−TO−SOURCE VOLTAGE (V)
0.14
0.12
TJ = 25°C
VGS = −2.5 V
0.10
VGS = −4.5 V
0.08
0.06
0.04
0.02
0
1.0
2.0
3.0
4.0
5.0
6.0
−ID, DRAIN CURRENT (A)
Figure 13. Pch On−Resistance vs. Gate
Voltage
Figure 14. Pch On−Resistance vs. Drain
Current and Gate Voltage
10,000
1.5
VGS = 0 V
ID = −2.7 A
VGS = −4.5 V
1.4
1.3
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.38
0.02
5.0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (A)
6.0
−2.0 V
−3.0 V
5.0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−2.5 V
−4.5 V
6.0
1.2
1.1
1.0
0.9
TJ = 150°C
1000
TJ = 125°C
100
0.8
0.7
−50
−25
0
25
50
75
100
125
150
10
2.0
TJ, JUNCTION TEMPERATURE (°C)
4.0
6.0
8.0
10
12
14
16
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 15. Pch On−Resistance Variation with
Temperature
Figure 16. Pch Drain−to−Source Leakage
Current vs. Voltage
http://onsemi.com
6
18
NTGD3149C
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
−VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
TYPICAL CHARACTERISTICS (P−CHANNEL)
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
0
2.0
4.0
6.0
8.0
12
10
3.5
3.0
2.5
2.0
Q1
1.5
Q2
ID = 2.7 A
TJ = 25°C
1.0
0.5
0
0
1.0
2.0
3.0
4.0
5.0
QG, TOTAL GATE CHARGE (nC)
Figure 17. Pch Capacitance Variation
Figure 18. Pch Gate−to−Source Voltage vs.
Total Charge
3.5
100
IS, SOURCE CURRENT (A)
VDD = −10 V
ID = −1 A
VGS = −4.5 V
t, TIME (ns)
QT
4.0
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
td(off)
tf
tr
td(on)
10
1.0
4.5
1.0
10
2.5
2.0
1.5
1.0
0.5
0
100
VGS = 0 V
TJ = 25°C
3.0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 19. Pch Resistive Switching Time
Variation vs. Gate Resistance
Figure 20. Pch Diode Forward Voltage vs.
Current
http://onsemi.com
7
0.9
NTGD3149C
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
D
6
HE
1
5
4
2
3
E
b
DIM
A
A1
b
c
D
E
e
L
HE
q
e
c
A
0.05 (0.002)
q
L
A1
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0.85
0.20
2.50
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
1.50
1.70
0.95
1.05
0.40
0.60
2.75
3.00
10°
−
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
INCHES
NOM
0.039
0.002
0.014
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
STYLE 13:
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
SOLDERING FOOTPRINT*
2.4
0.094
1.9
0.075
0.95
0.037
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
8
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NTGD3149C/D