VISHAY SI9108_04

Si9108
Vishay Siliconix
1-W High-Voltage Switchmode Regulator
FEATURES
D CCITT Compatible
D Current-Mode Control
D Low Power Consumption
(less than 5 mW)
D 10- to 120-V Input Range
D 200-V, 250-mA MOSFET
D Internal Start-Up Circuit
D SHUTDOWN and RESET
D Maximum Duty Cycle of 99.9%
DESCRIPTION
The Si9108 high-voltage switchmode regulator is a monolithic
BiC/DMOS integrated circuit which contains most of the
components necessary to implement a high-efficiency dc/dc
converter in ISDN terminals up to 3 watts. A 0.5-mA max
supply current makes possible the design of a dc/dc converter
with 60% efficiency at 25 mW, therefore meeting the
recommended performance under the CCITT I.430
specifications.
This device may be used with an appropriate transformer to
implement isolated flyback power converter topologies to
provide single or multiple regulated dc outputs (i.e., "5 V).
The Si9108 is available in both standard and lead (Pb)-free
16-pin wide-body SOIC, 14-pin plastic DIP and 20-pin PLCC
packages which are specified to operate over the industrial
temperature range of −40 _C to 85 _C.
FUNCTIONAL BLOCK DIAGRAM
FB
COMP
DISCHARGE
OSC
IN
Error
Amplifier
OSC
OUT
OSC
−
+
VREF
Clock
2V
−
4 V (1%)
Current-Mode
Comparator
+
Ref
Gen
R
Q
S
+
−
DRAIN
C/L
Comparator
−VIN
(BODY)
1.2 V
BIAS
Current
Sources
To
Internal
Circuits
VCC
VCC
+VIN
−
8.7 V
+
Undervoltage Comparator
SOURCE
S
SHUTDOWN
R
RESET
Q
−
+
Document Number: 70883
S-42038—Rev. B,15-Nov-04
9.3 V
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1
Si9108
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to −VIN (VCC < +VIN + 0.3 V)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V
VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
ID (Peak) (300 s pulse, 2% duty cycle) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 A
ID (rms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA
Logic Inputs (RESET,
SHUTDOWN, OSC IN) . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V
Power Dissipation (Package)a
14-Pin Plastic DIP (J Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
16-Pin Plastic Wide-Body SOIC (W Suffix)c . . . . . . . . . . . . . . . . . . . 900 mW
20-Pin PLCC (N Suffix)d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1400 mW
Thermal Impedance (JA)
14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
16-Pin Plastic Wide-Body SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
20-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90_C/W
Linear Inputs (FEEDBACK, SOURCE) . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 5 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 125_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 to 85_C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C
c. Derate 7.2 mW/_C above 25_C
d. Derate 11.2 mW/_C above 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to −VIN
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 13.5 V
ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 k to 1 M
+VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC − 3 V
fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
DISCHARGE = −VIN = 0 V
VCC = 10 V, +VIN = 48 V
RBIAS = 820 k , ROSC = 910 k
Limits
Tempb
Minc
Typd
Maxc
Unit
OSC IN = VIN (OSC Disabled)
RL = 10 M
Room
3.92
4.00
4.08
V
k
Reference
Output Voltage
VR
Output Impedancee
ZOUT
OSC IN = −VIN
Room
15
300
45
Short Circuit Current
ISREF
OSC IN = − VIN, VREF = −VIN
Room
70
100
130
A
Temperature Stabilitye
TREF
OSC IN = −VIN
Full
0.25
1.0
mV/_C
t = 1000 hrs, TA = 125_C
Room
5.00
25.00
mV
Long Term Stabilitye
Oscillator
Maximum Frequencye
fMAX
ROSC = 0
Room
1
3
Initial Accuracy
fOSC
See Note e
Room
32
40
f/f
f/f = f (13.5 V) − f (9.5 V)/f (9.5 V)
Room
10
15
%
Full
200
500
ppm/_C
4
4.04
V
25
500
nA
"40
mV
Voltage Stability
Temperature Coefficiente
TOSC
MHz
48
kHz
Error Amplifier
Feedback Input Voltage
Input BIAS Current
VFB
FB Tied to COMP
OSC IN = −VIN (OSC Disabled)
Room
IFB
OSC IN = −VIN, VFB = 4 V
Room
Open Loop Voltage Gaine
AVOL
OSC IN = −VIN (OSC Disabled)
Room
Input Offset Voltage
VOS
Unity Gain Bandwidthe
BW
Dynamic Output Impedance
ZOUT
Output Current
IOUT
Power Supply Rejection
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2
PSRR
3.96
60
Room
OSC IN = −VIN
Room
"15
0.5
Room
Source (VFB = 3.4 V)
Room
Sink (VFB = 4.5 V)
Room
10 V v VCC v 13.5 V
Room
80
0.8
MHz
1
k
−1.2
0.05
dB
0.08
70
−0.32
mA
dB
Document Number: 70883
S-42038—Rev. B,15-Nov-04
Si9108
Vishay Siliconix
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
DISCHARGE = −VIN = 0 V
VCC = 10 V, +VIN = 48 V
RBIAS = 820 k , ROSC = 910 k
Limits
Tempb
Minc
Typd
Maxc
Room
99.0
99.6
99.9
Unit
PWM
Maximum Duty Cycle
DMAX
Dead Time
Minimum Duty Cycle
Room
DMIN
100
Room
Minimum Pulse Width Before Pulse
Drops Out
Room
%
ns
0
%
110
175
ns
1.0
1.2
V
200
300
ns
10
A
Current Limit
Threshold Voltage
Delay to Outpute
VSOURCE
RL = 100 from DRAIN to VCC
VFB = 0 V
Room
td
RL = 100 from DRAIN to VCC
VSOURCE = 1.5 V, See Figure 1
Room
0.8
Input Voltage
+VIN
IIN = 10 A
Room
Input Leakage Current
+IIN
VCC w 10 V
Room
120
V
Pre-Regulator Start-Up Current
ISTART
Pulse Width v 300 s, VCC = 7 V
Room
8
15
VCC Pre-Regulator
Turn-Off Threshold Voltage
VREG
IPRE-REGULATOR = 10 A
Room
7.5
9.3
9.7
Undervoltage Lockout
VUVLO
RL = 100 from DRAIN to VCC
See Detailed Description
Room
7.0
8.7
9.2
V
VREG − VUVLO
VDELTA
Room
0.25
0.5
ICC
Room
0.35
0.5
mA
Room
7.5
Room
50
mA
Supply
Supply Current
Bias Current
SHUTDOWN Delay
IBIAS
tSD
VSOURCE = −VIN, See Figure 2
SHUTDOWN Pulse Width
tSW
Room
50
RESET Pulse Width
tRW
Room
50
Latching Pulse Width
SHUTDOWN and RESET Low
tLW
Room
25
Input Low Voltage
VIL
Room
Input High Voltage
VIH
Room
Input Current, Input Voltage High
IIH
VIN = 10 V
Room
Input Current, Input Voltage Low
IIL
VIN = 0 V
Room
−35
−25
200
220
See Figure 3
A
100
ns
2.0
8.0
1
5
V
A
MOSFET Switch
Breakdown Voltage
V(BR)DSS
IDRAIN = 100 A
Full
rDS(on)
IDRAIN = 100 mA
Room
Drain Off Leakage Current
IDSS
VDRAIN = 100 V
Room
Drain Capacitance
CDS
Drain-Source On Resistanceg
Room
5
35
V
7
10
A
pF
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
CSTRAY Pin 8 = v 5 pF
g. Temperature coefficient of rDS(on) is 0.75% per _C, typical.
Document Number: 70883
S-42038—Rev. B,15-Nov-04
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3
Si9108
Vishay Siliconix
TIMING WAVEFORMS
1.5 V −
SOURCE
0
VCC −
VCC
SHUTDOWN
0
tr v 10 ns
50%
td
VCC
DRAIN
0
−
−
tSD
DRAIN
0
10%
10%
FIGURE 1.
FIGURE 2.
tSW
VCC
SHUTDOWN
0
tf v 10 ns
50%
50%
50%
−
tf, tf v 10 ns
tLW
VCC
RESET
0
50%
50%
50%
−
tRW
FIGURE 3.
TYPICAL CHARACTERISTICS
Output Switching Frequency vs. Oscillator Resistance
f OUT (Hz)
2M
200 k
20 k
10 k
100 k
1M
rOSC − Oscillator Resistance ()
FIGURE 4.
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Document Number: 70883
S-42038—Rev. B,15-Nov-04
Si9108
Vishay Siliconix
PIN CONFIGURATIONS
PLCC-20
SO-16
(Wide-Body)
PDIP-14
3
2
1
20 19
1
16
2
15
4
18
12
3
14
5
17
4
11
4
13
6
16
5
10
5
12
7
15
6
9
6
11
8
14
7
8
7
10
8
9
1
14
2
13
3
Top View
9
Top View
10 11 12 13
Top View
PIN DESCRIPTION
Pin Number
Function
14-Pin Plastic DIP
16-Pin SOIC
20-Pin PLCC
SOURCE
4
1
7
−VIN
5
2
8
VCC
6
4
9
OSCOUT
7
5
10
OSCIN
8
6
11
DISCHARGE
9
7
12
VREF
10
8
14
SHUTDOWN
11
9
16
RESET
12
10
17
COMP
13
11
18
FB
14
12
20
BIAS
1
13
2
+VIN
2
14
3
DRAIN
3
16
5
3, 15
1, 4, 6, 13, 15, 19
NC
ORDERING INFORMATION
Standard
Part Number
Si9108DJ02
Lead (Pb)-Free
Part Number
Si9108DJ02—E3
Package
Temperature
Range
PDIP-14
Si9108DW
Si9108DW-T1
(With Tape and Reel)
Si9108DW-T1—E3
(With Tape and Reel)
SOIC-16 (WB)
Si9108DN02-T1—E3
(With Tape and Reel)
PLCC-20
−40 to 85 _C
Si9108DN02
Si9108DN02-T1
(With Tape and Reel)
Document Number: 70883
S-42038—Rev. B,15-Nov-04
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Si9108
Vishay Siliconix
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Error Amplifier
Due to the low quiescent current requirement of the Si9108
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
Closed-loop regulation is provided by the error amplifier,
whose 1-k dynamic output impedance enables it to be used
with feedback compensation (unlike transconductance
amplifiers). A MOS differential input stage provides for low
input current. The noninverting input to the error amplifier
(VREF) is internally connected to the output of the reference
supply and should be bypassed with a small capacitor to
ground.
When power is first applied during start-up, +VIN will draw a
constant current. The magnitude of this current is determined
by a high-voltage depletion MOSFET device which is
connected between +VIN and VCC. This start-up circuitry
provides initial power to the IC by charging an external bypass
capacitance connected to the VCC pin. The constant current is
disabled when VCC exceeds 9.3 V. If VCC is not forced to
exceed the 9.3-V threshold, then VCC will be regulated to a
nominal value of 9.3 V by the pre-regulator circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output MOSFET disabled until VCC exceeds the
undervoltage lockout threshold (typically 8.7 V). This
guarantees that the control logic will be functioning properly
and that sufficient gate drive voltage is available before the
MOSFET turns on. The design of the IC is such that the
undervoltage lockout threshold will not exceed the
pre-regulator turn-off voltage. Power dissipation can be
minimized by providing an external power source to VCC such
that the constant current source is always disabled.
BIAS
To properly set the bias for the Si9108, a 820-k resistor
should be tied from BIAS to −VIN. This determines the
magnitude of bias current in all of the analog sections and the
pull-up current for the SHUTDOWN and RESET pins. The
current flowing in the bias resistor is nominally 7.5 A.
Reference Section
The reference section of the Si9108 consists of a temperature
compensated buried zener and trimmable divider network.
The output of the reference section is connected internally to
the non-inverting input of the error amplifier. Nominal reference
output voltage is 4 V. The trimming procedure that is used on
the Si9108 brings the output of the error amplifier (which is
configured for unity gain during trimming) to within "1% of 4 V.
This automatically compensates for the input offset voltage in
the error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external voltage
source can be used to override the internal voltage source, if
desired, without otherwise altering the performance of the
device.
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6
Oscillator Section
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. Frequency is set by an
external resistor between the OSC IN and OSC OUT pins.
(See Typical Characteristics graph of resistor value vs.
frequency.) The DISCHARGE pin should be tied to −VIN for
normal internal oscillator operation. For 98% duty cycle, the
discharge pin must be connected to −VIN or can be connected
to −VIN through a resistor to set the dead time.
Remote synchronization can be accomplished by capacitive
coupling of a synchronization pulse into the OSC IN terminal.
For a 5-V pulse amplitude and 0.5-s pulse width, typical
values would be 100 pF in series with 3 k to OSC IN.
SHUTDOWN and RESET
SHUTDOWN and RESET are intended for overriding the
output MOSFET switch via external control logic. The two
inputs are fed through a latch preceding the output switch.
Depending on the logic state of RESET, SHUTDOWN can be
either a latched or unlatched input. The output is off whenever
SHUTDOWN is low. By simultaneously having SHUTDOWN
and RESET low, the latch is set and SHUTDOWN has no effect
until RESET goes high. (See the table below.)
Table 1: Truth Table for the SHUTDOWN and RESET Pins
SHUTDOWN
RESET
H
H
H
Output
Normal Operation
Normal Operation (No Change)
L
H
L
L
Off (Not Latched)
Off (Latched)
L
Off (Latched, No Change)
When power is first applied during start-up, +VIN will draw a
constant current. The magnitude of this current is determined
by a high-voltage depletion MOSFET device which is
connected between +VIN and VCC. This start-up circuitry
provides initial power to the IC by charging an external bypass
capacitance connected to the VCC pin. The constant current is
disabled when VCC exceeds 9.3 V. If VCC is not forced to
exceed the 9.3-V threshold, then VCC will be regulated to a
nominal value of 9.3 V by the pre-regulator circuit.
Document Number: 70883
S-42038—Rev. B,15-Nov-04
Si9108
Vishay Siliconix
DETAILED DESCRIPTION (CONT’D)
Both pins have internal current source pull-ups and can be left
disconnected when not in use. An added feature of the current
sources is the ability to connect a capacitor and an
open-collector driver to the SHUTDOWN pin to provide
variable shutdown time.
Output Switch
The output switch is a 7- , 200-V lateral DMOS transistor. Like
discrete MOSFETs, the switch contains an intrinsic body-drain
diode. However, the body contact in the Si9108 is connected
internally to −VIN and is independent of the SOURCE.
APPLICATIONS
BYS10-25
+VIN
7
NC
2
910 k
20 F
7
+
−
12
0.1 F
NC
10
1
0.1
F
0.1
F
0.1 F
OSCIN
5.6 V
DRAIN
OSCOUT
VCC
Si9108DJ
FB
RESET
VREF
COMP
BIAS
SOURCE
8
3
820 k
9
OUTPUT
3
BYS10-45
10
6
0.1 F
14
13 15 k
4
9
0.22 F
3.9 4
−5 V
BYS10-25
12 V
47.5 k
1%
47 F
150 k
71.5 k
1%
−VIN DISCHGR
5
220 F
11
SD
+VIN
8
+5 V
2
1 F
INPUT GND (GND Plane)
FIGURE 5. CCITT Compatible ISDN Terminal Power Supply
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?70883.
Document Number: 70883
S-42038—Rev. B,15-Nov-04
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7
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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1
Package Information
Vishay Siliconix
SOIC (WIDE-BODY): 16-LEAD (POWER IC ONLY)
ECN: S-40079—Rev. A, 02-Feb-04
DWG: 5910
Ğ0.06$0.002D
CAVITY NO.
0.2025$0.001
0.334$0.005
R0.004
16 15 14 13 12
11
10
0.010
9
R0.008
0.1475$0.001
R0.009
0.295$0.001
0.070$0.005
R0.004
1
2 3
4
5
6
7
4°$2°
8
0.032$0.005
DETAIL A
0.055$0.005
PIN 1 INDICATOR
Ğ0.0470.007$0.001 dp
SURFACE POLISHED
0.334$0.005
0.291$0.001
0.02045°
7°(4)
0.405$0.001
0.091$0.001
0.098$0.002
R0.004
0.295$0.001
0.406$0.004
0.041$0.001
0.050 TYP.
0.006$0.002
0.017$0.0003
DETAIL A
All Dimensions In Inches
Document Number: 72805
28-Jan-04
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1
Package Information
Vishay Siliconix
PLCC: 2O-LEAD (POWER IC ONLY)
D−SQUARE
A2
MILLIMETERS
D1−SQUARE
B1
B
e1
D2
Document Number: 72812
28-Jan-04
INCHES
Min
Max
Min
Max
4.20
4.57
0.165
0.180
2.29
3.04
0.090
0.120
0.51
−
0.020
−
0.331
0.553
0.013
0.021
0.661
0.812
0.026
0.032
9.78
10.03
0.385
0.395
8.890
9.042
0.350
0.356
7.37
8.38
0.290
0.330
1.27 BSC
0.050 BSC
ECN: S-40081—Rev. A, 02-Feb-04
DWG: 5917
A1
A
Dim
A
A1
A2
B
B1
D
D1
D2
e1
0.101 mm
0.004″
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1
Package Information
Vishay Siliconix
PDIP: 14-LEAD (POWER IC ONLY)
14
13
12
11
10
9
8
E
E1
1
2
3
4
5
6
7
D
S
Q1
A
A1
B1
e1
L
B
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
Q1
S
15°
MAX
C
eA
MILLIMETERS
Min
Max
INCHES
Min
Max
3.81
5.08
0.150
0.200
0.38
1.27
0.015
0.050
0.38
0.51
0.015
0.020
0.89
1.65
0.035
0.065
0.20
0.30
0.008
0.012
17.27
19.30
0.680
0.760
7.62
8.26
0.300
0.325
5.59
7.11
0.220
0.280
2.29
2.79
0.090
0.110
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
1.27
2.03
0.050
0.080
1.02
2.03
0.040
0.080
ECN: S-40081—Rev. A, 02-Feb-04
DWG: 5919
Document Number: 72814
28-Jan-04
www.vishay.com
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Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
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operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
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Document Number: 91000
Revision: 11-Mar-11
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