VISHAY SI7212DN

Si7212DN
Vishay Siliconix
Dual N-Channel 30-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
30
rDS(on) (W)
ID (A)
0.036 @ VGS = 10 V
6.8
0.039 @ VGS = 4.5 V
6.6
D TrenchFETr Gen II Power MOSFET
D 100% Rg Tested
D Space Savings Optimized for Fast
Switching
Qg (Typ)
7
RoHS
COMPLIANT
APPLICATIONS
D Synchronous Rectification
D Intermediate Driver
PowerPAKr 1212-8
D1
S1
3.30 mm
1
3.30 mm
G1
2
S2
3
G2
4
G1
D1
8
D2
G2
D1
7
D2
6
D2
5
Bottom View
S1
S2
N-Channel MOSFET
N-Channel MOSFET
Ordering Information: Si7212DN-T1—E3 (Lead (Pb)-Free)
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
10 secs
Steady State
Drain-Source Voltage
VDS
30
Gate-Source Voltage
VGS
"12
Continuous Drain Current (TJ = 150_C)a
TA = 25_C
TA = 85_C
Pulsed Drain Current
ID
Continuous Source Current (Diode Conduction)a
IS
TA = 25_C
Maximum Power Dissipationa
TA = 85_C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak
PD
V
6.8
4.9
4.9
IDM
Unit
3.5
A
1.1
A
20
2.2
2.6
1.3
1.4
0.69
TJ, Tstg
−55 to 150
Temperature)b,c
W
_C
260
THERMAL RESISTANCE RATINGS
Parameter
M i
Maximum
JJunction-to-Ambient
ti t A bi ta
Maximum Junction-to-Case (Drain)
Symbol
t v 10 sec
Steady State
Steady State
RthJA
RthJC
Typical
Maximum
38
48
77
94
4.3
5.4
Unit
_C/W
C/W
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure
adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 73128
S-51128—Rev. B, 13-Jun-05
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Si7212DN
Vishay Siliconix
SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Min
0.6
Typ
Max
Unit
Static
Gate Threshold Voltage
VGS(th)
VDS = VGS, ID = 250 mA
1.6
V
Gate-Body Leakage
IGSS
VDS = 0 V, VGS = "20 V
"100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 30 V, VGS = 0 V
1
VDS = 30 V, VGS = 0 V, TJ = 55_C
5
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
Diode Forward Voltagea
20
VDS w 5 V, VGS = 10 V
rDS(on)
mA
A
VGS = 10 V, ID = 6.8 A
0.030
0.036
VGS = 4.5 V, ID = 6.6 A
0.032
0.039
gfs
VDS = 10 V, ID = 6.8 A
20
VSD
IS = 2.2 A, VGS = 0 V
0.8
1.2
7
11
W
S
V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
VDS = 15 V, VGS = 4.5 V, ID = 6.8 A
f = 1 MHz
1.5
td(on)
Rise Time
tr
Turn-Off Delay Time
VDD = 15 V, RL = 15 W
ID ^ 1 A, VGEN = 10 V, Rg = 6 W
td(off)
Fall Time
tf
Source-Drain Reverse Recovery Time
trr
nC
1.7
Rg
Turn-On Delay Time
2
IF = 2.2 A, di/dt = 100 A/ms
3.0
4.5
10
15
12
20
30
45
10
15
15
30
W
ns
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Characteristics
Transfer Characteristics
20
20
VGS = 10 thru 3 V
16
I D − Drain Current (A)
I D − Drain Current (A)
16
12
8
2V
4
12
8
TC = 125_C
4
25_C
−55_C
0
0.0
0.5
1.0
1.5
2.0
2.5
VDS − Drain-to-Source Voltage (V)
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2
3.0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VGS − Gate-to-Source Voltage (V)
Document Number: 73128
S-51128—Rev. B, 13-Jun-05
Si7212DN
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Drain Current
Capacitance
1200
1000
0.04
C − Capacitance (pF)
r DS(on) − On-Resistance ( W )
0.05
VGS = 4.5 V
0.03
VGS = 10 V
0.02
Ciss
800
600
400
Coss
0.01
Crss
200
0.00
0
0
4
8
12
16
20
0
5
10
ID − Drain Current (A)
Gate Charge
25
30
On-Resistance vs. Junction Temperature
1.6
VDS = 15 V
ID = 6.8 A
VGS = 10 V
ID = 6.8 A
8
1.4
rDS(on) − On-Resiistance
(Normalized)
V GS − Gate-to-Source Voltage (V)
20
VDS − Drain-to-Source Voltage (V)
10
6
4
2
1.2
1.0
0.8
0
0
3
6
9
12
0.6
−50
15
−25
0
Qg − Total Gate Charge (nC)
Source-Drain Diode Forward Voltage
50
75
100
125
150
On-Resistance vs. Gate-to-Source Voltage
0.10
r DS(on) − On-Resistance ( W )
TJ = 150_C
10
TJ = 25_C
1
0.0
25
TJ − Junction Temperature (_C)
20
I S − Source Current (A)
15
0.08
ID = 6.8 A
0.06
ID = 2 A
0.04
0.02
0.00
0.2
0.4
0.6
0.8
1.0
VSD − Source-to-Drain Voltage (V)
Document Number: 73128
S-51128—Rev. B, 13-Jun-05
1.2
1.4
0
2
4
6
8
10
VGS − Gate-to-Source Voltage (V)
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Si7212DN
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Threshold Voltage
Single Pulse Power
0.4
50
40
ID = 250 mA
−0.0
30
Power (W)
V GS(th) Variance (V)
0.2
−0.2
20
−0.4
10
−0.6
−50
−25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
10
1
100
600
Time (sec)
TJ − Temperature (_C)
100
Safe Operating Area, Junction-To-Ambient
IDM Limited
*Limited by rDS(on)
I D − Drain Current (A)
10
1
P(t) = 0.001
ID(on)
Limited
P(t) = 0.01
P(t) = 0.1
0.1
TA = 25_C
Single Pulse
P(t) = 10
dc
BVDSS Limited
0.01
0.1
P(t) = 1
1
10
100
VDS − Drain-to-Source Voltage (V)
*VGS u minimum VGS at which rDS(on) is specified
Normalized Thermal Transient Impedance, Junction-to-Ambient
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = RthJA = 77_C/W
3. TJM − TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10−4
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4
10−3
10−2
10−1
1
Square Wave Pulse Duration (sec)
10
100
600
Document Number: 73128
S-51128—Rev. B, 13-Jun-05
Si7212DN
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Normalized Thermal Transient Impedance, Junction-to-Case
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10−4
10−3
10−2
10−1
1
Square Wave Pulse Duration (sec)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?73128.
Document Number: 73128
S-51128—Rev. B, 13-Jun-05
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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