FDC855N tm ® Single N-Channel, Logic Level, PowerTrench MOSFET 30V, 6.1A, 27mΩ Features General Description Max rDS(on) = 27mΩ at VGS = 10V, ID = 6.1A This N-Channel Logic Level MOSFET is an efficient solution for low voltage and battery powered applications. Utilizing Fairchild Semiconductor’s advanced PowerTrench® process, this device possesses minimized on-state resistance to optimize the power consumption. They are ideal for applications where in-line power loss is critical. Max rDS(on) = 36mΩ at VGS = 4.5V, ID = 5.3A SuperSOTTM -6 package: small footprint (72% smaller than standard SO-8; low profile (1mm thick). RoHS Compliant Application Power Management in Notebook, Hard Disk Drive S D D D D D G S D TM-6 SuperSOT G D D Pin 1 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID TA = 25°C (Note 1a) -Pulsed PD TJ, TSTG Ratings 30 Units V ±20 V 6.1 20 Power Dissipation (Steady State) (Note 1a) 1.6 Power Dissipation (Steady State) (Note 1b) 0.8 Operating and Storage Junction Temperature Range -55 to +150 A W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient (Note 1) 30 (Note 1a) 78 °C/W Package Marking and Ordering Information Device Marking .855 Device FDC855N ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C Package SuperSOT-6 1 Reel Size 7” Tape Width 8 mm Quantity 3000 units www.fairchildsemi.com FDC855N N-Channel, Logic Level, PowerTrench® MOSFET January 2008 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient 30 ID = 250µA, referenced to 25°C IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current V 24 VGS = 0V, VDS = 24V, mV/°C 1 TC = 125°C µA 250 VGS = ±20V, VDS = 0V ±100 nA 3.0 V On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250µA ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250µA, referenced to 25°C rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance 1.0 2.0 -6 mV/°C VGS = 10V, ID = 6.1A 20.7 27.0 VGS = 4.5V, ID = 5.3A 28.2 36.0 VGS = 10V, ID = 6.1A, TJ =125°C 30.1 39.3 VDD = 10V, ID = 6.1A 20 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 15V, VGS = 0V, f = 1MHz f = 1MHz 493 655 pF 108 145 pF 62 95 pF Ω 1.0 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge at 10V VGS = 0V to 10V Qg Total Gate Charge at 5V VGS = 0V to 5V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 15V, ID = 6.1A, VGS = 10V, RGEN = 6Ω VDD = 15V, ID = 6.1A 6 12 ns 2 10 ns 14 23 ns 2 10 ns 9.2 13 nC 4.9 7.0 nC 1.7 nC 3.1 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0V, IS = 1.3A (Note 2) IF = 6.1A, di/dt = 100A/µs 0.80 1.2 V 17 31 ns 6 12 nC Notes: 1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user’s board design. a. 78°C/W when mounted on a 1 in2 pad of 2 oz copper. b. 156°C/W when mounted on a minimum pad of 2 oz copper. 2: Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%. ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C 2 www.fairchildsemi.com FDC855N N-Channel, Logic Level, PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted 20 4.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5V VGS = 4.0V ID, DRAIN CURRENT (A) 16 VGS = 10V VGS = 6V 12 8 VGS = 3.5V 4 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 0 0 1 2 3 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 3.5 VGS = 3.5V 3.0 VGS = 4.0V 2.5 2.0 VGS = 4.5V 1.5 1.0 4 0 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 12 16 20 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 60 ID = 6.1A VGS = 10V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 8 ID, DRAIN CURRENT(A) Figure 1. On-Region Characteristics IS, REVERSE DRAIN CURRENT (A) VDS = 10V 12 8 TJ = 25oC 4 2 3 = -55oC 4 40 TJ = 125oC 30 TJ = 25oC 4 5 6 7 8 9 20 10 VGS = 0V 1 TJ = 150oC 0.01 TJ = -55oC 0.001 0.2 5 TJ = 25oC 0.1 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C 10 Figure 4. On-Resistance vs Gate to Source Voltage 16 TJ ID = 6.1A VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 0 1 50 3 20 TJ = 150oC PULSE DURATION = 300µs DUTY CYCLE = 2%MAX 20 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On- Resistance vs Junction Temperature ID, DRAIN CURRENT (A) VGS = 10V VGS = 6V 0.5 3 1.2 www.fairchildsemi.com FDC855N N-Channel, Logic Level, PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE(V) 10 1000 ID = 6.1A Ciss CAPACITANCE (pF) 8 VDD = 15V 6 VDD = 10V VDD = 20V 4 Coss 100 2 0 0 3 6 9 20 0.1 12 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE(nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 30 P(PK), PEAK TRANSIENT POWER (W) 100 100µs 10 ID, DRAIN CURRENT (A) Crss f = 1MHz VGS = 0V 1ms 1 10ms THIS AREA IS LIMITED BY rDS(on) 100ms SINGLE PULSE TJ = MAX RATED 0.1 1s RθJA = 156oC/W DC TA = 25oC 0.01 0.01 0.1 1 10 100 VGS = 10V SINGLE PULSE RθJA = 156oC/W TA = 25oC 10 1 0.5 -3 10 -2 10 -1 10 1 100 10 1000 t, PULSE WIDTH (s) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Forward Bias Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 156 C/W 0.01 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 11. Transient Thermal Response Curve ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C 4 www.fairchildsemi.com FDC855N N-Channel, Logic Level, PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted FDC855N N-Channel, Logic Level, PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C 5 www.fairchildsemi.com The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ * FPS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ i-Lo™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® ™ ® tm Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * ® PDP-SPM™ Power220® POWEREDGE® Power-SPM™ PowerTrench® Programmable Active Droop™ QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 tm SupreMOS™ SyncFET™ ® The Power Franchise® tm TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support, device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I33 ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C www.fairchildsemi.com FDC855N N-Channel, Logic Level, PowerTrench® MOSFET TRADEMARKS