TI DS26C31TN

DS26C31M, DS26C31T
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
DS26C31T/DS26C31M CMOS Quad TRI-STATE® Differential Line Driver
Check for Samples: DS26C31M, DS26C31T
FEATURES
DESCRIPTION
•
•
•
•
•
The DS26C31 is a quad differential line driver
designed for digital data transmission over balanced
lines. The DS26C31T meets all the requirements of
EIA standard RS-422 while retaining the low power
characteristics of CMOS. The DS26C31M is
compatible with EIA standard RS-422; however, one
exception in test methodology is taken (1). This
enables the construction of serial and terminal
interfaces
while
maintaining
minimal
power
consumption.
1
23
•
•
•
•
•
TTL Input Compatible
Typical Propagation Delays: 6 ns
Typical Output Skew: 0.5 ns
Outputs Will Not Load Line when VCC = 0V
DS26C31T Meets the Requirements of EIA
Standard RS-422
Operation from Single 5V Supply
TRI-STATE Outputs for Connection to System
Buses
Low Quiescent Current
Available in Surface Mount
Mil-Std-883C Compliant
The DS26C31 accepts TTL or CMOS input levels and
translates these to RS-422 output levels. This part
uses special output circuitry that enables the drivers
to power down without loading down the bus. This
device has enable and disable circuitry common to all
four drivers. The DS26C31 is pin compatible to the
AM26LS31 and the DS26LS31.
All inputs are protected against damage due to
electrostatic discharge by diodes to VCC and ground.
(1)
The DS26C31M (−55°C to +125°C) is tested with VOUT
between +6V and 0V while RS-422A condition is +6V and
−0.25V.
Connection Diagrams
Figure 1. Dual-In-Line Package, Top View
See Package Number D0016A or NFG0016E
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
See Package Number NAJ0020A, NFE0016A or NAD0016A
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TRI-STATE is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
DS26C31M, DS26C31T
SNLS375B – JUNE 1998 – REVISED APRIL 2013
www.ti.com
Figure 2. 20-Lead Ceramic Leadless Chip Carrier (NAJ)
Truth Table (1)
ENABLE
ENABLE
L
H
Input
Non-Inverting
Inverting
Output
Output
X
Z
Z
All other
L
L
H
combinations of
H
H
L
enable inputs
(1)
2
L = Low logic state
X = Irrelevant
H = High logic state
Z = TRI-STATE (high impedance)
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2) (3)
−0.5V to 7.0V
Supply Voltage (VCC)
−1.5V to VCC +1.5V
DC Input Voltage (VIN)
−0.5V to 7V
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
±20 mA
DC Output Current, per pin (IOUT)
±150 mA
DC VCC or GND Current, per pin (ICC)
−65°C to +150°C
Storage Temperature Range (TSTG)
Max. Power Dissipation (PD) @25°C (4)
Lead Temperature (TL)
This device does not meet 2000V ESD Rating.
(1)
(2)
(3)
(4)
(5)
Ceramic “NFE” Pkg.
2419 mW
Plastic “NFG” Pkg.
1736 mW
SOIC “D” Pkg.
1226 mW
Ceramic “NAD” Pkg.
1182 mW
Ceramic “NAJ” Pkg.
2134 mW
(Soldering, 4 sec.)
260°C
(5)
Unless otherwise specified, all voltages are referenced to ground. All currents into device pins are positive, all currents out of device
pins are negative.
Absolute Maximum Ratings are those values beyond which the safety of the device cannot be verified. They are not meant to imply that
the device should be operated at these limits. The table of “Electrical Characteristics” provide conditions for actual device operation.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Ratings apply to ambient temperature at 25°C. Above this temperature derate NFG package at 13.89 mW/°C, NFE package 16.13
mW/°C, D package 9.80 mW/°C, NAJ package 12.20 mW/°C, and NAD package 6.75 mW/°C.
ESD Rating: HBM (1.5 kΩ, 100 pF); Inputs ≥ 1500V; Outputs ≥ 1000V; EIAJ (0Ω, 200 pF) ≥ 350V
Operating Conditions
Supply Voltage (VCC)
Min
Max
Units
4.50
5.50
V
DC Input or Output Voltage
(VIN, VOUT)
0
VCC
V
Operating Temperature Range (TA)
DS26C31T
−40
+85
°C
DS26C31M
−55
+125
°C
500
ns
Input Rise or Fall Times (tr, tf)
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DS26C31M, DS26C31T
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DC Electrical Characteristics
VCC = 5V ± 10% (unless otherwise specified) (1)
Symbol
Parameter
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
VOH
High Level Output Voltage
Conditions
Min
Typ
Max
2.0
V
0.8
VIN = VIH or VIL,
2.5
Units
3.4
V
V
IOUT = −20 mA
VOL
Low Level Output Voltage
VIN = VIH or VIL,
0.3
0.5
V
IOUT = 20 mA
VT
Differential Output Voltage
RL = 100Ω
See
|VT| − |VT |
Difference In Differential Output
2.0
3.1
V
(2)
RL = 100Ω
0.4
V
3.0
V
0.4
V
±1.0
μA
See (2)
VOS
Common Mode Output Voltage
RL = 100Ω
1.8
See (2)
|VOS − VOS |
Difference In Common Mode
Output
RL = 100Ω
IIN
Input Current
VIN = VCC, GND, VIH, or VIL
ICC
Quiescent Supply Current (3)
DS26C31T
VIN = VCC or GND
200
500
μA
IOUT = 0 μA
VIN = 2.4V or 0.5V (3)
0.8
2.0
mA
DS26C31M
VIN = VCC or GND
200
500
μA
IOUT = 0 μA
VIN = 2.4V or 0.5V (3)
0.8
2.1
mA
±0.5
±5.0
μA
−150
mA
100
μA
−100
μA
100
μA
−100
μA
IOZ
TRI-STATE Output Leakage
Current
See (2)
VOUT = VCC or GND
ENABLE = VIL
ENABLE = VIH
ISC
Output Short Circuit Current
VIN = VCC or GND (2) (4)
IOFF
Output Leakage Current Power
Off (2)
DS26C31T
VOUT = 6V
VCC = 0V
VOUT = −0.25V
DS26C31M
VOUT = 6V
VCC = 0V
VOUT = 0V (5)
(1)
(2)
(3)
(4)
(5)
−30
Unless otherwise specified, min/max limits apply across the recommended operating temperature range. All typicals are given for VCC =
5V and TA = 25°C.
See EIA Specification RS-422 for exact test conditions.
Measured per input. All other inputs at VCC or GND.
This is the current sourced when a high output is shorted to ground. Only one output at a time should be shorted.
The DS26C31M (−55°C to +125°C) is tested with VOUT between +6V and 0V while RS-422A condition is +6V and −0.25V.
Switching Characteristics
VCC = 5V ±10%, tr ≤ 6 ns, tf ≤ 6 ns (Figure 3, Figure 4, Figure 5, Figure 6) (1)
Symbol
Parameter
Conditions
Min
Typ
Max
2
6
11
14
ns
S1 Open
0.5
2.0
3.0
ns
DS26C31T
tPLH, tPHL
Propagation Delays Input to Output
(2)
Skew
S1 Open
Units
CS26C31M
tTLH, tTHL
Differential Output Rise And Fall
Times
S1 Open
6
10
14
ns
tPZH
Output Enable Time
S1 Closed
11
19
22
ns
tPZL
Output Enable Time
S1 Closed
13
21
28
ns
(1)
(2)
4
Unless otherwise specified, min/max limits apply across the recommended operating temperature range. All typicals are given for VCC =
5V and TA = 25°C.
Skew is defined as the difference in propagation delays between complementary outputs at the 50% point.
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
Switching Characteristics (continued)
VCC = 5V ±10%, tr ≤ 6 ns, tf ≤ 6 ns (Figure 3, Figure 4, Figure 5, Figure 6)(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DS26C31T
CS26C31M
tPHZ
Output Disable Time (3)
S1 Closed
5
9
12
tPLZ
Output Disable Time (3)
S1 Closed
7
11
14
CPD
Power Dissipation Capacitance (4)
50
pF
CIN
Input Capacitance
6
pF
(3)
(4)
ns
ns
Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times
are less than indicated due to the delay added by the RC time constant of the load.
CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS
= CPD VCC f + ICC.
Comparison Table of Switching Characteristics into “LS-Type” Load
VCC = 5V, TA = 25°C, tr ≤ 6 ns, tf ≤ 6 ns (Figure 4, Figure 6, Figure 7, Figure 8)
Symbol
tPLH, tPHL
Parameter
Conditions
Propagation Delays Input to Output
(1)
DS26C31T
DS26LS31C
Units
Typ
Max
Typ
Max
6
8
10
15
ns
0.5
1.0
2.0
6.0
ns
4
6
6
9
15
35
ns
4
7
15
25
ns
14
20
20
30
ns
11
17
20
30
ns
CL = 30 pF
S1 Closed
S2 Closed
Skew
See (2)
CL = 30 pF
S1 Closed
S2 Closed
tTHL, tTLH
Differential Output Rise and Fall
Times
CL = 30 pF
S1 Closed
ns
S2 Closed
tPLZ
Output Disable Time (3)
CL = 10 pF
S1 Closed
S2 Open
tPHZ
Output Disable Time (3)
CL = 10 pF
S1 Open
S2 Closed
tPZL
Output Enable Time
CL = 30 pF
S1 Closed
S2 Open
tPZH
Output Enable Time
CL = 30 pF
S1 Open
S2 Closed
(1)
(2)
(3)
This table is provided for comparison purposes only. The values in this table for the DS26C31 reflect the performance of the device but
are not tested or verified.
Skew is defined as the difference in propagation delays between complementary outputs at the 50% point.
Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times
are less than indicated due to the delay added by the RC time constant of the load.
Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS26C31M DS26C31T
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DS26C31M, DS26C31T
SNLS375B – JUNE 1998 – REVISED APRIL 2013
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Logic Diagram
AC Test Circuit and Switching Time Waveforms
Note: C1 = C2 = C3 = 40 pF (Including Probe and Jig Capacitance), R1 = R2 = 50Ω, R3 = 500Ω.
Figure 3. AC Test Circuit
Figure 4. Propagation Delays
Figure 5. Enable and Disable Times
6
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
Input pulse; f = 1 MHz, 50%; tr ≤ 6 ns, tf ≤ 6 ns
Figure 6. Differential Rise and Fall Times
Figure 7. Load AC Test Circuit for “LS-Type” Load
Figure 8. Enable and Disable Times for “LS-Type” Load
Typical Applications
*RT is optional although highly recommended to reduce reflection.
Figure 9. Two-Wire Balanced System, RS-422
Copyright © 1998–2013, Texas Instruments Incorporated
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DS26C31M, DS26C31T
SNLS375B – JUNE 1998 – REVISED APRIL 2013
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Typical Performance Characteristics
8
Differential Propagation Delay
vs Temperature
Differential Propagation Delay
vs Power Supply Voltage
Figure 10.
Figure 11.
Differential Skew vs
Temperature
Differential Skew
vs
Power
Supply Voltage
Figure 12.
Figure 13.
Differential Transition Time
vs Temperature
Differential Transition Time
vs Power Supply Voltage
Figure 14.
Figure 15.
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
Typical Performance Characteristics (continued)
Complementary Skew vs
Temperature
Complementary Skew vs
Power Supply Voltage
Figure 16.
Figure 17.
Differential Output Voltage
vs Output Current
Differential Output Voltage
vs Output Current
Figure 18.
Figure 19.
Output High Voltage vs
Output High Current
Output High Voltage vs
Output High Current
Figure 20.
Figure 21.
Copyright © 1998–2013, Texas Instruments Incorporated
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DS26C31M, DS26C31T
SNLS375B – JUNE 1998 – REVISED APRIL 2013
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Typical Performance Characteristics (continued)
10
Output Low Voltage vs
Output Low Current
Output Low Voltage vs
Output Low Current
Figure 22.
Figure 23.
Supply Current
vs Temperature
Output Low Voltage vs
Output Low Current
Figure 24.
Figure 25.
Output Low Voltage vs
Output Low Current
Supply Current
vs Temperature
Figure 26.
Figure 27.
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
Typical Performance Characteristics (continued)
Supply Current vs
Power Supply Voltage
No Load Supply Current
vs Data Rate
Figure 28.
Figure 29.
Loaded Supply Current
vs Data Rate
Output Short Circuit Current
vs Temperature
Figure 30.
Figure 31.
Output Short Circuit Current
vs Power Supply Voltage
Figure 32.
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Product Folder Links: DS26C31M DS26C31T
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DS26C31M, DS26C31T
SNLS375B – JUNE 1998 – REVISED APRIL 2013
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REVISION HISTORY
Changes from Revision A (April 2013) to Revision B
•
12
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 11
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
DS26C31TM
ACTIVE
SOIC
D
16
48
TBD
Call TI
Call TI
-40 to 85
DS26C31TM
DS26C31TM/NOPB
ACTIVE
SOIC
D
16
48
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
DS26C31TM
DS26C31TMX
ACTIVE
SOIC
D
16
2500
TBD
Call TI
Call TI
-40 to 85
DS26C31TM
DS26C31TMX/NOPB
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
DS26C31TM
DS26C31TN
ACTIVE
PDIP
NFG
16
25
TBD
Call TI
Call TI
-40 to 85
DS26C31TN
DS26C31TN/NOPB
ACTIVE
PDIP
NFG
16
25
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 85
DS26C31TN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DS26C31TMX
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
DS26C31TMX/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DS26C31TMX
SOIC
D
16
2500
367.0
367.0
35.0
DS26C31TMX/NOPB
SOIC
D
16
2500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NFG0016E
N0016E
N16E (Rev G)
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