ONSEMI NTMFS4841NH

NTMFS4841NH
Power MOSFET
30 V, 59 A, Single N−Channel, SO−8FL
Features
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Low RG
These are Pb−Free Devices*
http://onsemi.com
V(BR)DSS
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
RDS(ON) MAX
7.0 mW @ 10 V
30 V
D (5,6)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
TA = 85°C
ID
13.5
9.7
A
Power Dissipation
RqJA (Note 1)
TA = 25°C
TA = 85°C
PD
2.16
1.1
W
Continuous Drain
Current RqJA
v10 s
TA = 25°C
TA = 85°C
ID
21.8
15.7
A
Power Dissipation
RqJA v10 s
TA = 25°C
TA = 85°C
PD
5.7
2.9
W
TA = 25°C
TA = 85°C
ID
8.6
6.2
A
Power Dissipation
RqJA (Note 2)
TA = 25°C
TA = 85°C
PD
0.87
0.45
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
TC = 85°C
ID
59
42.5
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
TC = 85°C
PD
41.7
21.7
W
TA = 25°C
IDM
177
A
TJ,
TSTG
−55 to
+150
°C
IS
35
A
Continuous Drain
Current RqJA
(Note 2)
Pulsed Drain
Current
G (4)
S (1,2,3)
N−CHANNEL MOSFET
Steady
State
tp =
10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 24 V, VGS = 10 V, IL = 25.6 A,
L = 0.3 mH, RG = 25 W)
EAS
98
mJ
TL
260
°C
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2010
MARKING
DIAGRAM
D
Drain to Source dV/dt
May, 2010 − Rev. 4
59 A
11.6 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
1
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
4841NH
AYWWG
G
D
D
D
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4841NHT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4841NHT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4841NH/D
NTMFS4841NH
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
3
Junction−to−Ambient – Steady State (Note 1)
RqJA
57.8
Junction−to−Ambient – Steady State (Note 2)
RqJA
143.5
Junction−to−Ambient (tv10 s)
RqJA
22.1
Unit
°C/W
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
28
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
±100
mA
nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.5
2.1
2.5
5.6
VGS = 10 V to
11.5 V
ID = 30 A
4.8
ID = 15 A
4.8
VGS = 4.5 V
ID = 30 A
8.8
ID = 15 A
8.5
gFS
VDS = 1.5 V, ID = 50 A
V
mV/°C
7.0
11.6
57
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
1565
2113
Output Capacitance
COSS
325
439
Reverse Transfer Capacitance
CRSS
173
268
Total Gate Charge
QG(TOT)
11.3
16.7
Threshold Gate Charge
QG(TH)
1.4
2.1
Gate−to−Source Charge
QGS
5.3
7.9
Gate−to−Drain Charge
QGD
4.5
6.8
24.4
33
12.1
18.1
23.3
34.9
14.1
21.1
4.9
7.3
td(ON)
7.2
10.7
tr
20.6
30.9
21.9
32.9
2.9
4.4
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 11.5 V, VDS = 15 V,
ID = 30 A
pF
nC
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
ns
ns
NTMFS4841NH
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
TJ = 25°C
0.86
1.2
TJ = 125°C
0.71
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 30 A
tRR
ta
tb
V
18.8
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
11.4
ns
7.4
QRR
6.7
nC
Source Inductance
LS
0.93
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.005
1.84
0.90
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
W
NTMFS4841NH
4.6 V
4.8 V
5.0 V
80
4.4 V
7.0 V
4.2 V
10 V
4.0 V
90
TJ = 25°C
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
3.8 V
3.6 V
3.4 V
70
60
50
TC = 25°C
40
30
20
TC = 125°C
10
VGS = 3.2 V
0
1
2
3
4
5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
6
0
1
2
0.010
0.009
0.008
0.007
0.006
0.005
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
11
VGS, GATE−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.011
0.004
5
0.012
0.0115 T = 25°C
J
0.011
0.0105
0.01
0.0095
VGS = 4.5 V
0.009
0.0085
0.008
0.0075
0.007
0.0065
0.006
0.0055
VGS = 11.5 V
0.005
0.0045
0.004
0.0035
0.003
0.0025
0.002
10
15
20
25
30
35
6
7
40
45
50
55
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
10000
1.7
1.6 ID = 30 A
VGS = 10 V
1.5
VGS = 0 V
1000
1.4
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
4
Figure 2. Transfer Characteristics
ID = 30 A
TJ = 25°C
0.012
3
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
0.013
TC = −55°C
1.3
1.2
1.1
1
0.9
0.8
TJ = 150°C
TJ = 125°C
100
10
TJ = 25°C
1
0.7
0.6
−55 −35 −15
5
25
45
65
85
105
0.1
145
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
http://onsemi.com
4
30
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
12
TJ = 25°C
CISS
COSS
CRSS
15
10
5
0
5
VGS
VDS
10
15
20
25
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
NTMFS4841NH
9
7.5
6
4.5
0
0
2
IS, SOURCE CURRENT (A)
td(off)
tr
10
td(on)
tf
10
100
100 ms
10
1 ms
RDS(on) Limit
Thermal Limit
Package Limit
10 ms
dc
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
10 ms
100
1
10 12 14 16 18 20 22 24
15
10
5
0
0.5
0.6
0.7
0.8
0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
1.0
Figure 10. Diode Forward Voltage versus
Current
VGS = 20 V
Single Pulse
TC = 25°C
0.1
8
20
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
1
6
VGS = 0 V
TJ = 25°C
25
RG, GATE RESISTANCE (W)
1000
4
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Gate Charge
30
1
VDD = 15 V
VGS = 0 V − 11.5 V
ID = 30 A
TJ = 25°C
Qg, TOTAL GATE CHARGE (nC)
100
VDS = 15 V
ID = 15 A
VGS = 11.5 V
QGD
1.5
Figure 7. Capacitance Variation
t, TIME (ns)
QGS
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
1
QT
10.5
110
ID = 25.6 A
100
90
80
70
60
50
40
30
20
10
0
25
50
75
100
125
150
175
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
http://onsemi.com
5
NTMFS4841NH
80
70
60
gFS, (S)
50
40
30
20
10
VDS = 1.5 V
0
0
10
20
30
40
50
60
DRAIN CURRENT (A)
Figure 13. GFS versus Drain Current
http://onsemi.com
6
70
80
NTMFS4841NH
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
6
2X
0.20 C
5
4X
E1
1
2
3
q
E
2
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
0.10 C
SIDE VIEW
8X
C A B
0.05
c
3X
4X
1.270
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
0.750
4X
1.000
0.965
1.330
2X
0.905
2X
E2
L1
6
G
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
0.51
−−−
−−−
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
SOLDERING FOOTPRINT*
DETAIL A
b
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.495
M
4.530
3.200
0.475
5
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4841NH/D