BAT30F3 Small signal Schottky diode Features ■ very low conduction losses ■ negligible switching losses ■ low capacitance diode ■ Flip Chip, 2-bump package Complies with the following standards ■ Flip Chip (2 bumps) IEC 61000-4-2 level 1: – ±2kV (air discharge) – ±2kV (contact discharge) Figure 1. Description Pin configuration (bump side) 1 The BAT30F3 is a Schottky diode in a 2-bump, Flip-Chip package. A This device is specially suited for switching mode applications needing a low forward voltage drop diode. The electrical parameters are guaranteed across the operating temperature range (- 30 °C to 85 °C). B Figure 2. Schematic 1 A B October 2010 Doc ID 16915 Rev 2 1/10 www.st.com 10 Characteristics 1 BAT30F3 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol VPP VRRM 1. Parameter Value Unit Peak pulse voltage: IEC 61000-4-2 air discharge IEC 61000-4-2 contact discharge ±2 ±2 kV Repetitive peak reverse voltage 20 V -55 to +150 °C -30 to +85 °C range(1) Tstg Storage temperature Top Operating junction temperature range 1 dPtot < condition to avoid thermal runaway for a diode on its own heatsink Rth(j-a) dTj Table 2. Symbol Electrical characteristics Parameter Test conditions 25 °C IR(1) Reverse leakage current 55 °C 85 °C 25 °C VF Forward voltage drop - 30 °C Min. Typ. Max. VR = 6 V - - 2 VR = 20 V - - 6 VR = 6 V - - 20 VR = 20 V - - 55 VR = 6 V - - 145 VR = 20 V - - 360 IF = 0.1 mA - - 200 IF = 1 mA - - 270 IF = 10 mA - - 340 IF = 100 mA - - 440 IF = 200 mA - - 500 IF = 300 mA - - 560 IF = 0.1 mA - - 300 IF = 1 mA - - 355 IF = 10 mA - - 415 IF = 100 mA - - 495 IF = 200 mA - - 545 IF = 300 mA - - 600 1. Pulse test: tp = 5 ms, δ < 2% 2/10 Doc ID 16915 Rev 2 Unit µA mV BAT30F3 Characteristics Figure 3. Leakage current versus reverse applied voltage (typical values) Figure 4. IR (µA) 1.E+00 1.E+03 Forward voltage drop versus forward current (typical values, positive temperatures) IFM (A) Tj=85°C (Maximum specified values) Tj=85°C 1.E+02 1.E-01 Tj=55°C 1.E+01 Tj = 55 °C Tj = 25 °C 1.E-02 Tj=25°C 1.E+00 Tj = 85 °C Tj=0°C 1.E-01 1.E-03 Tj=-30°C 1.E-02 0 5 Figure 5. 1.E+00 1.E-04 0.0 VR(V) 1.E-03 10 15 20 25 VFM (V) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 30 Forward voltage drop versus forward current (typical values, negative temperatures) Figure 6. IFM (A) 1.E+02 1.E-01 Relative variation of reverse leakage current versus junction temperature (typical values) IR[Tj] / IR[Tj = 25 °C] 1.E+01 Tj=-20°C 1.E-02 1.E+00 Tj=-10°C Tj=-30°C 1.E-01 1.E-03 VFM (V) Tj=-30°C (Maximum specified values) 1.E-04 0.2 0.3 0.4 0.5 0.6 0.7 1.E-02 -30 Doc ID 16915 Rev 2 Tj(°C) -20 -10 0 10 20 30 40 50 60 70 80 90 3/10 Ordering information scheme 2 BAT30F3 Ordering information scheme Figure 7. Ordering information scheme BAT30 Signal Schottky diode VRRM = 20 V Package F = Flip Chip x = 3: lead-free, pitch = 400 µm 4/10 Doc ID 16915 Rev 2 F3 BAT30F3 Package information ● Epoxy meets UL94, V0 ● Lead-free packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Package dimensions (dimensions in mm) 0.70 9 0.28 .0 R0 0.40 G 0.37 G 0.085 0.065 Figure 8. 0.50 3 Package information 0.06 0.12 Section G-G Doc ID 16915 Rev 2 5/10 PCB recommendations Flip Chip tape and reel specification (dimensions in mm) 2.0 ± 0.05 Ø 1.55 ± 0.05 4.0 ± 0.1 1.75 ± 0.1 Figure 9. BAT30F3 3.5 ±- 0.05 0.75 ± 0.05 3 3 0.57 ± 0.05 0.43 ± 0.1 3 3 3 3 3 8.0 ± 0.3 0.20 ± 0.05 2.0 ± 0.1 User direction of unreeling All dimensions in mm 4 PCB recommendations 4.1 Design For optimum electrical performance and highly reliable solder joints, STMicroelectronics recommends the PCB design recommendations listed in Table 3. Table 3. PCB design recommendations for solder bar pitch 400 µm For NSMD PCB non solder mask defined Note: 6/10 Oblong pad: 370 x 180 µm – Micro via SSBU allowed – Micro via SBU to be avoided – Micro via SBU filled (under qualification) Track: – Only one track per pad – Maximum track width = 100 µm Track layout must be symmetrical to the die axis (to homogenize stress and welding attraction during reflow assembly) For SMD PCB solder mask defined Oblong pad: – Micro via SSBU allowed – Micro via SBU to be avoided – Micro via SBU filled (under qualification) PCB Pad Finishing Cu – Ni (2-6 µm) - Au (0.2 µm max) A gold layer finishing on the PCB pad that is too thick (0.2 µm maximum) is not recommended (low joint reliability). Doc ID 16915 Rev 2 BAT30F3 PCB recommendations To optimize the natural self centering effect of CSP on the PCB, PCB pad positioning and size have to be properly designed (see Figure 10) Micro vias An alternative to routing on the top surface is to route out on buried layers. To achieve this, the pads are connected to the lower layers using micro vias. Only SSBU via technology is approved. Figure 10. Solder mask opening 450 µm 370 µm 370 µm 180 µm 255 µm 180 µm 100 µm Non solder mask defined Doc ID 16915 Rev 2 Solder mask defined 7/10 PCB recommendations 4.2 BAT30F3 Assembly For chip scale package mounting on the PCB, STMicroelectronics recommends the use of a solder stencil aperture of 330 x 330 µm maximum and a typical stencil thickness of 75 or 80 µm. Chip scale packages are fully compatible with the use of near eutectic 95.5 Sn, 4 Ag, 0.5 Cu solder paste with no-clean flux. ST's recommendations for chip scale package board mounting are illustrated on the soldering reflow profile shown in Figure 11. Figure 11. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec 6 7 Time (min) 90 sec max Dwell time in the soldering zone (with temperature higher than 220 °C) has to be kept as short as possible to prevent component and substrate damage. Peak temperature must not exceed 260 °C. Controlled atmosphere (N2 or N2H2) is recommended during the whole reflow, especially above 150 °C. Chip scale packages are able to withstand three times the previous recommended reflow profile in order to be compatible with a double reflow when SMDs are mounted on both sides of the PCB and one additional repair. A maximum of three soldering reflows are allowed for these lead-free packages (with repair step included). The use of a no-clean flux is highly recommended to avoid any cleaning operation. To prevent any bump cracks, ultrasonic cleaning methods are not recommended. 8/10 Doc ID 16915 Rev 2 BAT30F3 5 Ordering information Ordering information Table 4. 6 Ordering information Order code Marking Package Weight Base qty Delivery mode BAT30F3 3 Flip Chip 0.3 mg 15000 Tape and reel 7” Revision history Table 5. Document revision history Date Revision Changes 14-Dec-2009 1 Initial release. 21-Oct-2010 2 Updated dot graphic in Figure 1. Doc ID 16915 Rev 2 9/10 BAT30F3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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