SHENZHENFREESCALE AOD421

AOD421
P-Channel Enhancement Mode Field
Effect Transistor
General Description
The AOD421 uses advanced trench technology to provide excellent RDS(ON), low gate charge and
operation with gate voltages as low as 2.5V. This device is suitable for load switching. It is ESD
protected.
Features
VDS (V) = -20V
ID = -12.5 A (VGS = -10V)
RDS(ON) < 75mΩ (VGS = -10V)
RDS(ON) < 95mΩ (VGS = -4.5V)
RDS(ON) < 145mΩ (VGS = -2.5V)
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
VGS
Gate-Source Voltage
TA=25°C
Continuous Drain
G
Current
C
TC=25°C
Power Dissipation
B
Power Dissipation
A
TA=25°C
Junction and Storage Temperature Range
1/6
B
V
ID
-8.9
-30
W
9.4
2
W
1.33
TJ, TSTG
-55 to 175
Symbol
t ≤ 10s
Steady-State
Steady-State
A
18.8
PDSM
TA=70°C
Maximum Junction-to-Case
±12
IDM
PD
TC=100°C
Thermal Characteristics
Parameter
A
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient A
Units
V
-12.5
TA=70°C
Pulsed Drain Current
Maximum
-20
RθJA
RθJC
Typ
23
50
6
°C
Max
28
60
8
Units
°C/W
°C/W
°C/W
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AOD421
P-Channel Enhancement Mode Field
Effect Transistor
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-250µA, VGS=0V
-20
-0.5
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-0.7
ID(ON)
On state drain current
VGS=-4.5V, VDS=-5V
-15
TJ=55°C
-2.5
±1
µA
±10
µA
TJ=125°C
mΩ
95
mΩ
mΩ
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Input Capacitance
Ciss
SWITCHING PARAMETERS
Total Gate Charge
Qg
75
105
145
IS=-1A,VGS=0V
Gate resistance
61
83
75
Diode Forward Voltage
Rg
V
A
110
Forward Transconductance
Reverse Transfer Capacitance
-1.4
VGS=-2.5V, ID=-1A
gFS
Output Capacitance
-0.9
VGS=-4.5V, ID=-3A
VSD
Crss
µΑ
VDS=0V, VGS=±12V
VDS=-5V, ID=-12.5A
Coss
Units
VDS=0V, VGS=±10V
VGS=-10V, ID=-12.5A
Static Drain-Source On-Resistance
Max
V
VDS=-16V, VGS=0V
IDSS
RDS(ON)
Typ
-1
8.8
S
-0.81
V
512
VGS=0V, VDS=-10V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
-8.5
A
620
pF
77
pF
62
pF
9.2
13
Ω
4.6
nC
0.9
nC
2.1
nC
5.2
ns
38
ns
17
ns
31
ns
IF=-12.5A, dI/dt=100A/µs
19
Body Diode Reverse Recovery Charge IF=-12.5A, dI/dt=100A/µs
6.3
ns
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
Body Diode Reverse Recovery Time
VGS=-4.5V, VDS=-10V,
ID=-12.5A
VGS=-10V, VDS=-10V, RL=0.75Ω,
RGEN=3Ω
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev 1: Sep 2008
2/6
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AOD421
P-Channel Enhancement Mode Field
Effect Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
40
-10.0V
VDS=-5V
35
30
-5.0V
25
-4.0V
20
-3.0V
15
-2.5V
10
-2.0V
5
6
-ID(A)
-ID (A)
8
4
125°C
2
25°C
VGS=-1.5V
0
0
0
1
2
3
4
5
0
0.5
160
1.5
2
2.5
3
3.5
1.6
Normalized On-Resistance
ID=-3A, VGS=-4.5V
140
VGS=-2.5V
120
RDS(ON) (mΩ )
1
-VGS(Volts)
Figure 2: Transfer Characteristics
-VDS (Volts)
Figure 1: On-Region Characteristics
100
VGS=-4.5V
80
60
VGS=-10V
40
20
ID=-12.5A, VGS=-10V
1.4
1.2
ID=-1A, VGS=-2.5V
1.0
0.8
0
2
4
6
8
10
12
14
0
25
-ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
200
1E+01
ID=-12.5A
180
1E+00
125°C
1E-01
125°C
140
-IS (A)
RDS(ON) (mΩ )
160
120
100
25°C
1E-02
1E-03
1E-04
80
1E-05
60
25°C
1E-06
40
0.0
0
2
4
6
8
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
3/6
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOD421
P-Channel Enhancement Mode Field
Effect Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
800
5
ID=-12.5A
Ciss
600
Capacitance (pF)
-VGS (Volts)
4
3
2
400
200
1
Coss
Crss
0
0
0
1
2
3
4
5
6
0
-Qg (nC)
Figure 7: Gate-Charge Characteristics
10
15
20
-VDS (Volts)
Figure 8: Capacitance Characteristics
100
100
TJ(Max)=175C, TA=25°C
80
70
DC
Power (W)
100µs
ID (Amps)
10
TJ(Max)=175°C
TC=25°C
90
10µs
1ms
60
50
40
30
1
20
RDS(ON)
limited
10
0
0.0001
0.1
0.1
5
1
10
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
100
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-tocase (Note F)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=8°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
PD
0.1
Ton
T
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
4/6
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AOD421
P-Channel Enhancement Mode Field
Effect Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
20
14
18
Power Dissipation (W)
Current rating ID(A)
12
10
8
6
4
16
14
12
10
2
8
6
4
2
0
0
0
25
50
75
100
125
150
TCASE (°C)
Figure 12: Current De-rating (Note B)
175
0
25
50
75
100
125
150
175
TCASE (°C)
Figure 13: Power De-rating (Note B)
100
50
TJ(Max)=150°C, T A=25°C
10µs
10
TA=25°C
40
Power (W)
ID (Amps)
100µs
1ms
100m
1
1s
10s
DC
RDS(ON)
limited
1
10
20
10
0
0.001
0.1
0.1
30
100
VDS (Volts)
Figure 14: Maximum Forward Biased
Safe Operating Area (Note H)
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
Zθ JA Normalized Transient
Thermal Resistance
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
0.01
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=60°C/W
PD
Ton
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
5/6
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AOD421
P-Channel Enhancement Mode Field
Effect Transistor
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
Qgd
+
+
DUT
Qgs
Vds
VDC
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
td(on)
Vgs
-
DUT
Vgs
td(off)
tr
90%
Vdd
VDC
tf
+
Rg
Vgs
10%
Vds
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
6/6
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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