[AK7756] AK7756 Mono CODEC + Mic/Lineout Amp AK7756 CODEC 9216step/fs (8kHz RAM DSP ) DSP HF AK7756VF AK7756EN 28pin QFN 30pin VSOP DSP : 24-bit (Data RAM 24bit ) : 13.6 ns (9216 steps at fs=8 kHz) : 20 x 20 → 36-bit ( ) : 20 / 20 → 20-bit - ALU: 36bit (with overflow margin 4bit) 24-bit RAM: 3072 x 36-bit RAM: 2048 x 20-bit RAM: 1024 x 24-bit (24-bit ) RAM: 3072 x 20-bit, 3072 x 20-bit : 4.6MHz ~ 73.7MHz - JX pins (Interrupt) I/F / I2S - PCM (Short / Long Frame) - 16-bit linear, 8-bit A-law, 8-bit µ-law Mono CODEC : 8KHz, 16KHz - DAC S/N: 91dB, S/ (N+D): 83dB (fs: 16 kHz) - ADC S/N: 86dB, S/ (N+D): 77dB (fs: 16 kHz) / - Programmable Gain (+33dB ~ +15dB and 0dB, 3dB step) - Low Noise Microphone Bias CODEC, DSP μP I/F: SPI, I2C-slave I2C bootloader Analog (AVDD) : 3.0V ~ 3.6V (typ.3.3V) Digital1 (DVDD) : 3.0V ~ 3.6V (typ.3.3V) Digital2 (DVDD18) : 1.7V ~ 1.9V (typ.1.8V) : -20°C ~ 85°C (AK7756EN), -40°C ~ 85°C (AK7756VF) : 28pin QFN (AK7756EN) 30pin VSOP (AK7756VF) MS1218-J-00-PB 2010/08 1 [AK7756] ■ MPRF AVDD VSS2 DVDD VCOM DVDD18 VSS1 PMMB MICBIAS Mic AIN/INP AKM DSP Core MIC Power Supply XTO PLL LFLT PMADC I2S or PCM Interface SELDI2 A/D DIN2 INN SELDO2 JX1 DOUT2 PMDAC SDOUT2/RDY EXTEEP/RQN μP (I2C,SPI)/ EEPROM (I2C) Interface AOUT D/A SDIN1 STO/RDY/SDOUT1 RDY Line Out LRCK SDOUT1 WDT/ CRC JX1E JX1 BICK SELDO1 JX0 JX0/SDIN2 DIN1 DOUT1 JX0E XTI DOUT3 SCL/SCLK SDA/SO I2CSEL pin SI I2CSEL EEST/SDOUT3/SI EEST SELDO3 PMOSC OSC Memory IRSTN Figure 1. MS1218-J-00-PB 2010/08 2 [AK7756] ■ -20 ∼ +85°C -40 ∼ +85°C AK7756EN AK7756VF AKD7756HFS 28pin QFN 30pin VSOP Evaluation Board for AK7756 ■ SDOUT2/RDY LRCK BICK SDIN1 IRSTN JX1 AOUT AK7756EN 21 20 19 18 17 16 15 MPRF 22 14 STO/RDY/SDOUT1 VCOM 23 13 SDA/SO VSS2 24 12 SCL/SCLK AVDD 25 11 EEST/SDOUT3/ SI MICBIAS 26 10 EXTEEP/RQN INP/AIN 27 9 JX0/SDIN2 INN 28 8 SDOUT1 MS1218-J-00-PB 5 6 7 VSS1 DVDD 4 DVDD18 3 XTI I2CSEL LFLT 1 2 XTO Top View 2010/08 3 [AK7756] AK7756VF DVDD18 1 30 XTI VSS1 2 29 XTO DVDD 3 28 I2CSEL SDOUT1 4 27 LFLT JX0/SDIN2 5 26 INN EXTEEP/RQN 6 25 INP/AIN EEST/SDOUT3/SI 7 24 MICBIAS SCL/SCLK 8 23 AVDD SDA/SO 9 22 AVDD STO/RDY/SDOUT1 10 21 VSS2 SDOUT2/RDY 11 20 VCOM NC 12 19 MPRF LRCK 13 18 AOUT BICK 14 17 JX1 SDIN1 15 16 IRSTN AK7756VF Top View MS1218-J-00-PB 2010/08 4 [AK7756] ■ DSP CP0, CP1 DLP0, DLP1 DP0, DP1 DLRAM DRAM 512w × 24-Bit 512w × 24-Bit CRAM 2048w x 20-Bit DLRAM Address Pointer OFREG 32w x 13-Bit 3072w x 20-Bit 3072w x 20-Bit CBUS(20-Bit) DBUS(24-Bit) MPX20 µP I/F MPX20 X Control PRAM DEC Y Serial I/F 3072w x 36-Bit Multiply 20 x 20 → 36-Bit PC Stack: 5 level(max) TMP 12 x 24-Bit 24-Bit 36-Bit PTMP(LIFO) 6 x 24-Bit MUL DBUS SHIFT 40-Bit 40-Bit A B ALU 40-Bit Overflow Margin: 4-Bit 1 x 24-Bit DIN2 (ADC or SDIN2 pin) 2 x 24-Bit DIN1 40-Bit DR0 ∼ 3 40-Bit Over Flow Data Generator Division 20÷20→20 1 x 24-Bit 2 x 24-Bit DOUT3 (DAC or SDOUT3pin) DOUT2 2 x 24-Bit DOUT1 Peak Detector MS1218-J-00-PB 2010/08 5 [AK7756] / No. Pin Name 1 LFLT O 2 3 4 5 6 7 8 I2CSEL XTO XTI DVDD18 VSS1 DVDD SDOUT1 JX0 SDIN2 I O I O I I EXTEEP I RQN I EEST O SDOUT3 O SI I SCL I SCLK I SDA I/O 9 I/O 10 11 12 13 SO O STO RDY SDOUT1 O O O 15 SDOUT2 RDY O O 16 17 18 LRCK BICK SDIN1 I/O I/O I 19 IRSTN I 20 21 JX1 AOUT I O 22 MPRF O 23 VCOM O 24 25 26 VSS2 AVDD MICBIAS O 14 (AK7756EN) Function Output Pin for Loop Filter of PLL Circuit This pin must be connected to VSS2 with 8.2KΩ and 33nF in series. Outputs “L” during initial reset. μP Control Mode Select Pin “H”: I2C, “L”: SPI Master Clock Output Pin. Outputs Hi-Z during initial reset. External Master Clock Input Pin Digital Power Supply 2 Pin. 1.7 ∼ 1.9V Ground Pin Digital Power Supply 1 Pin. 3.0 ∼ 3.6V Audio Serial Data Output1 Pin. Outputs “L” during initial reset. Conditional Jump Pin0 (JXOE bit = “1”) Audio Serial Data Input 2 Pin (JXOE bit = “0”) Start to Download from external EEPROM (I2CSEL pin = “H” : I2C Bus Mode) “H”: start download (download from external memory) “L”: normal operation μP I/F Write Request Pin (I2CSEL pin = “L” : SPI Mode) When initial reset and μP I/F are not in use, leave the RQN pin High level. EEPROM download busy output (I2CSEL pin = “H” and SELDO3 bit = “0”) H: Download is busy. L: download is complete. Outputs “L” during initial reset. Audio Serial Data Output Pin3 (I2CSEL pin = “H” and SELDO3 bit = “1”) Outputs “L” during initial reset. Control Data Input Pin (I2CSEL pin = “L”: SPI Mode) Control Data Clock Pin (I2CSEL pin = “H”: I2C Bus Mode) Outputs Hi-Z during initial reset. Control Data Clock Pin (I2CSEL pin = “L”: SPI Mode) Set this pin to “H” when there are no clock inputs. Control Data Input /Output Pin (I2CSEL pin = “H”: I2C Bus Mode) Outputs Hi-Z during initial reset. Control Data output Pin (I2CSEL pin = “L”: SPI Mode) Outputs “L” during initial reset. Status Output Pin Data Write Ready Output Pin for μP Interface Audio Serial Data Output Pin1 Outputs “H” during initial reset. Audio Serial Data Output2 Pin Data Write Ready Output Pin for μP Interface Outputs “L” during initial reset. Audio Channel Select Pin Audio Serial Data Clock Pin Audio Serial Data Input 1 Pin Reset Pin (active low) The AK7756 must be reset once upon power-up. “H”: Power-up, “L”: Initialize the control register. Conditional Jump Pin1 Analog Output Outputs. Outputs VSS2 during initial reset. Output Pin for Ripple Filter of MICBIAS Circuit Connect 1.0μF capacitor to VSS2. Outputs AVDD during initial reset. Analog Common Voltage Output Pin Connect 0.1μF and 2.2μF capacitor to VSS2. Outputs VSS2 during initial reset. Ground Pin Analog Power Supply Pin 3.0 ∼ 3.6V Microphone bias. Outputs Hi-Z during initial reset. MS1218-J-00-PB 2010/08 6 [AK7756] 27 AIN INP INN 28 Note 1. Note 2. I2CSEL pin Note 3. Note 4. I I I Single-ended Analog Input pin (MDIF bit = “0”) Positive Microphone input pin (MDIF bit = “1”) Negative Microphone input pin (MDIF bit = “1”) DVDD VSS1 (INP/AIN, INN pins) (AOUT pin) DC DC / No. 1 2 3 Pin Name DVDD18 VSS1 DVDD I/O - 4 SDOUT1 O 5 JX0 SDIN2 I I EXTEEP I RQN I EEST O SDOUT3 O SI I SCL I SCLK I SDA I/O 6 7 8 9 SO O STO RDY SDOUT1 O O O 11 SDOUT2 RDY O O 12 NC - 10 (AK7756VF) Function Digital Power Supply 2 Pin. 1.7 ∼ 1.9V Ground Pin Digital Power Supply 1 Pin. 3.0 ∼ 3.6V Audio Serial Data Output1 Pin. Outputs “L” during initial reset. Conditional Jump Pin0 (JXOE bit = “1”) Audio Serial Data Input 2 Pin (JXOE bit = “0”) Start to Download from external EEPROM (I2CSEL pin = “H” : I2C Bus Mode) “H”: start download (download from external memory) “L”: normal operation μP I/F Write Request Pin (I2CSEL pin = “L” : SPI Mode) When initial reset and μP I/F are not in use, leave the RQN pin High level. EEPROM download busy output (I2CSEL pin = “H” and SELDO3 bit = “0”) H: Download is busy. L: download is complete. Outputs “L” during initial reset. Audio Serial Data Output Pin3 (I2CSEL pin = “H” and SELDO3 bit = “1”) Outputs “L” during initial reset. Control Data Input Pin (I2CSEL pin = “L”: SPI Mode) Control Data Clock Pin (I2CSEL pin = “H”: I2C Bus Mode) Outputs Hi-Z during initial reset. Control Data Clock Pin (I2CSEL pin = “L”: SPI Mode) Set this pin to “H” when there are no clock inputs. Control Data Input /Output Pin (I2CSEL pin = “H”: I2C Bus Mode) Outputs Hi-Z during initial reset. Control Data output Pin (I2CSEL pin = “L”: SPI Mode) Outputs “L” during initial reset. Status Output Pin Data Write Ready Output Pin for μP Interface Audio Serial Data Output Pin1 Outputs “H” during initial reset. Audio Serial Data Output2 Pin Data Write Ready Output Pin for μP Interface Outputs “L” during initial reset. No Connect Pin. This pin must be connected to VSS1. MS1218-J-00-PB 2010/08 7 [AK7756] 13 14 15 LRCK BICK SDIN1 I/O I/O I 16 IRSTN I 17 18 JX1 AOUT I O 19 MPRF O 20 VCOM O 21 22 23 24 26 VSS2 AVDD AVDD MICBIAS AIN INP INN O I I I 27 LFLT O 28 I2CSEL 29 XTO 30 XTI Note 1. Note 2. I2CSEL pin Note 3. Note 4. I O I 25 Audio channel select Pin Audio Serial Data Clock Pin Audio Serial Data Input 1 Pin Reset Pin (active low) The AK7756VF must be reset once upon power-up. “H”: Power-up, “L”: Initialize the control register. Conditional Jump Pin1 Analog Output Outputs. Outputs VSS2 during initial reset. Output Pin for Ripple Filter of MICBIAS Circuit Connect 1.0μF capacitor to VSS2. Outputs AVDD during initial reset. Analog Common Voltage Output Pin Connect 0.1μF and 2.2μF capacitor to VSS2. Outputs VSS2 during initial reset. Ground Pin Analog Power Supply Pin 3.0 ∼ 3.6V Analog Power Supply Pin 3.0 ∼ 3.6V Microphone bias. Outputs Hi-Z during initial reset. Single-ended Analog Input pin (MDIF bit = “0”) Positive Microphone input pin (MDIF bit = “1”) Negative Microphone input pin (MDIF bit = “1”) Output Pin for Loop Filter of PLL Circuit This pin must be connected to VSS2 with 8.2KΩ and 33nF in series. Outputs “L” during initial reset. μP Control Mode Select Pin “H”: I2C, “L”: SPI Master Clock Output Pin. Outputs Hi-Z during initial reset. External Master Clock Input Pin DVDD VSS1 (INP/AIN, INN pins) (AOUT pin) DC DC ■ Classification Analog Digital Pin Name MICBIAS, INP/AIN, INN, AOUT, MPRF SDOUT1, STO/RDY/SDOUT1, SDOUT2/RDY, SDOUT3/EEST/ SI, XTO EXTEEP/RQN, SDIN1, XTI, JX0/SDIN2, JX1 MS1218-J-00-PB Setting VSS1 2010/08 8 [AK7756] (VSS1=VSS2=0V; Note 5) Parameter Symbol min max Power Supplies: Analog AVDD 4.3 −0.3 Digital 1 DVDD 4.3 −0.3 Digital 2 DVDD18 2.5 −0.3 Difference(VSS1~VSS2) ΔGND -0.3 0.3 Input Current, Any Pin Except Supplies IIN ±10 Analog Input Voltage (Note 6) VINA (AVDD+0.3) or 4.3 −0.3 Digital Input Voltage (Note 7) VIND1 (DVDD+0.3) or 4.3 −0.3 AK7756EN Ta 85 −20 Ambient Temperature (powered applied) AK7756VF Ta 85 −40 Storage Temperature Tstg 150 −65 Note 5. VSS1 VSS2 Note 6. INP/AIN, INN pins Note 7. IRSTN, I2CSEL, EXTEEP, SI/EEST, SDA/SO, SCL/SCLK, JX1, JX0, SDIN1, LRCK, BICK pin Note 8. SDA pin SCL pin DVDD OFF Units V V V V mA V V °C °C °C : (VSS1=VSS2=0V; Note 5) Parameter Power Supplies Analog (Note 9) Digital Digital Difference1 Note 5. Note 9. AVDD, DVDD, DVDD18 (AVDD, DVDD, DVDD18) Symbol min AVDD 3.0 DVDD 3.0 DVDD18 1.7 AVDD – DVDD -0.3 VSS1 VSS2 typ 3.3 3.3 1.8 0 max 3.6 3.6 1.9 +0.3 Units V V V V : MS1218-J-00-PB 2010/08 9 [AK7756] (CODEC) ■ ADC ( Ta=25ºC; AVDD=DVDD=3.3V, DVDD18=1.8V; VSS1=VSS2=0V; BICK=64fs; Signal Frequency 1kHz ; Measurement frequency =20Hz~8 kHz, fs=16 kHz, CKM mode 6) Parameter min typ max Units MIC Input Programmable Gain Amplifier Input Resistance (INP, INN pins) (MGAIN = 0dB) 22.5 30 37.5 kΩ Gain Min (MGAIN2-0 bit = “0H”) 0 dB Max (MGAIN2-0 bit = “7H”) +33 dB 3 dB Step size (MGAIN2-0 bit = “1H” “7H”) Microphone Bias Supply: MICBIAS pin Bias Output Voltage (Note 10) 2.32 V Load Resistance 2.0 kΩ Load Capacitance 30 pF Resolution 24 Bits Mono ADC Dynamic Characteristics AIN pin→ Mono ADC→ SDOUT1 MGAIN=21dB 72 dB S/(N+D) (-1dBFS) MGAIN= 0dB 69 77 MGAIN=21dB 77 dB Dynamic Range MGAIN= 0dB 78 86 MGAIN=21dB 77 dB S/N MGAIN= 0dB 78 86 Microphone Analog Inputs INP, INN (Note 11) Full-scale Input Voltage Note 10. Note 11. AVDD AVDD Differential MGAIN= 0dB Single-ended MGAIN= 0dB 2.0 2.2 Vmic bias=0.70 * AVDD, Iout=-1mA Vin=0.67 x AVDD (typ.) @MGAIN = 0dB MS1218-J-00-PB ±2.0 ±2.2 ±2.4 Vpp 2.4 VPP 2010/08 10 [AK7756] ■ DAC ( Ta=25ºC; AVDD=DVDD=3.3V, DVDD18=1.8V; VSS1=VSS2=0V; BICK=64fs; Signal frequency 1 kHz; Measurement frequency=20Hz~8 kHz, fs=16 kHz, CKM mode 6) Parameter min typ max Unit Resolution 24 Bits Mono DAC Dynamic Characteristics; Mono DAC→AOUT pin S/(N+D) (0dBFS) 75 83 dB S/N 83 91 dB Analog Output Full-scale Output Voltage (Note 12) 2.09 2.2 2.31 Vpp Load Resistance 10 kΩ Load Capacitance 30 pF Note 12. AVDD Vout=0.67 x AVDD (typ.) MS1218-J-00-PB 2010/08 11 [AK7756] DC (Ta=Tmin~Tmax; AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1=VSS2=0V) Parameter Symbol min typ High level input voltage (Note 13) VIH 80%DVDD Low level input voltage (Note 13) VIL SCL, SDA High level input voltage VIH 70%DVDD SCL, SDA Low level input voltage VIL VOH DVDD-0.4 High level output voltage: Iout=-100μA (Note 14) VOL Low level output voltage: Iout=100μA (Note 14) SDA Low level output voltage Iout=3mA VOL Input leak current (Note 15) Iin Input leak current XTI pin Iix 26 max 20%DVDD 30%DVDD 0.4 0.4 ±10 Unit V V V V V V V μA μA Note 13. SCL/SCLK, SDA/SO pin Note 14. SDA/SO pin Note 15. XTI pin (Ta=25ºC; AVDD=DVDD=3.3V; DVDD18=1.8V; VSS1=VSS2=0V, fin=1 KHz, 24 bit, fs=8 KHz (CKM mode = 0), DSPS=BITFS=PMOSC bits= “0” PMMB bit=“1”, DSP running with programmed connecting DIN2 with DOUT1 and DIN1 with DOUT3. Parameter min typ max Units Power Supplies: (Note 16) Power-Up (IRSTN pin = “H”) CODEC+DSP All Circuit Power-up AVDD+DVDD AVDD=DVDD=3.3V 11 mA DVDD18=1.8V DVDD18 6 mA Power Consumption 47 mW AVDD+DVDD AVDD=DVDD=3.6V 15 mA DVDD18=1.9V DVDD18 60 mA Reset (IRSTN pin = “L”), Power-down condition (Note 17, Note 18) AVDD+DVDD 1 10 μA DVDD18 3 200 μA Note 16. DVDD18 DSP Note 17. DVDD VSS1 Note 18. (Tmin~Tmax), (AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V) max MS1218-J-00-PB 2010/08 12 [AK7756] ■ ADC 1. fs=8kHz (Ta= Tmin~Tmax, AVDD= DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; fs=8 kHz) Parameter Symbol min typ max PB 0 3.15 (±0.1dB) (Note 19, Note 20) 3.63 (-0.02dB) 3.83 (-3.0dB) SB 4.66 PR ±0.1 (Note 20) SA 68 (Note 21, Note 22) ΔGD 0 GD 16 (Ts=1/fs) Note 19. Note 20. fs=8kHz DC 3.15kHz Note 21. fs=8kHz 4.66kHz 507.34kHz Note 22. fs=8kHz 512kHz 2. fs=16kHz (Ta= Tmin~Tmax, AVDD= DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; fs=16 kHz) Parameter Symbol min typ max Passband (±0.1dB) (Note 23, Note 24) PB 0 6.3 (-0.02dB) 7.26 (-3.0dB) 7.66 Stopband SB 9.32 Passband Ripple (Note 24) PR ±0.1 Stopband Attenuation (Note 25, Note 26) SA 68 Group Delay Distortion ΔGD 0 Group Deley (Ts=1/fs) GD 16 Note 23. Note 24. fs=16kHz DC 6.3kHz Note 25. fs=16kHz 9.32kHz 1014.68kHz Note 26. fs=16kHz 1024kHz MS1218-J-00-PB Unit kHz kHz kHz kHz dB dB μs Ts Unit kHz kHz kHz kHz dB dB μs Ts 2010/08 13 [AK7756] ■ DAC 1. fs=8kHz (Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V; VSS1=VSS2=0V; fs=8 kHz) Parameter Symbol min typ max Passband (±0.05dB) (Note 27) PB 0 3.62 (-6.0dB) 4 Stopband (Note 27) SB 4.37 Passband Ripple PR ±0.01 Stopband Attenuation SA 64 Group Delay (Ts=1/fs) (Note 28) GD 24 Digital Filter + Analog Filter Amplitude characteristic 20Hz~3.5kHz ±0.5 Note 27. fs PB=0.4535fs(@±0.05dB), SB=0.5465fs Note 28. 2. fs=16kHz (Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V; VSS1=VSS2=0V; fs=16kHz) Parameter Symbol min typ max Passband (±0.05dB) (Note 27) PB 0 7.24 (-6.0dB) 8 Stopband (Note 27) SB 8.74 Passband Ripple PR ±0.01 Stopband Attenuation SA 64 Group Delay (Ts=1/fs) (Note 28) GD 24 Digital Filter + Analog Filter Amplitude characteristic 20Hz~7.0kHz ±0.5 MS1218-J-00-PB Unit kHz kHz kHz dB dB Ts dB Unit kHz kHz kHz dB dB Ts dB 2010/08 14 [AK7756] ■ (Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=0V, CL=20pF) Parameter Symbol min typ max Master operation a) XTI/XTO with a X’tal, External Clock input CKM[2:0]bits=6h(768x16KHz) fXTI 11.0 12.288 12.4 Duty Cycle 40 50 60 Slave mode operation LRCK Frequency fs 8 BICK Frequency fBICK Duty 0.1 40 32fs/48fs/64fs Unit MHz % 16 kHz 1.1 60 MHz % ■ (Ta= Tmin~Tmax, AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1=VSS2=0V) Parameter Symbol min typ tRST 600 Reset pulse width (Note 29) Note 29. IRSTN pin “H” MS1218-J-00-PB max Unit ns 2010/08 15 [AK7756] ■ (SDIN1 2, SDOUT1 3) 1) SDIN1/2, SDOUT1/2/3 (Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=0V, CL=20pF) Parameter Symbol min typ max I2S and PCM Interface Input Timing Delay Time from BICK “↑” to LRCK (Note 30) tBLRD 20 Delay Time from LRCK to BICK “↑” (Note 30) tLRBD 20 Serial Data Input Latch Setup Time tBSIDS 80 Serial Data Input Latch Hold Time tBSIDH 80 Delay Time from LRCK to Serial Data Output (Note 31) tLRD 80 Delay Time from BICK “↓” or “↑”to LRCK Output tBSOD 80 2 I S and PCM Interface Output Timing SDOUT1/2 BICK Frequency fBICK 64 BICK Duty cycle 50 tMBL -20 40 BITCLK “↓” LRCLK tBSIDS 80 tBSIDH 80 Delay Time from LRCK to Serial Data Output (Note 31) tLRD 80 Delay Time from BICK “↓” or “↑”to LRCK Output tBSOD 80 Note 30. LRCK BICK Note 31. I2S MS1218-J-00-PB Unit ns ns ns ns ns ns fs % ns ns ns ns ns 2010/08 16 [AK7756] ■ μP (SPI mode) (Ta= Tmin~Tmax; AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V, VSS1=VSS2=0V; CL=20pF) Parameter Symbol min typ max μP Interface Timing (SPI mode) RQN Fall Time tWRF 30 RQN Rise Time tWRR 30 SCLK Fall Time tSF 30 SCLK Rise Time tSR 30 SCLK Frequency fSCLK 2.1 SCLK Low Level Width tSCLKL 200 SCLK High Level Width tSCLKH 200 RQN High Level Width tWRQH 500 From RQN “↑” to IRSTN “↑” tRST1 600 From IRSTN “↑” to RQN “↓” tIRRQ 100 From RQN “↓” to SCLK “↓” tWSC 500 From SCLK “↑” to RQN “↑” tSCW 800 SI Latch Setup Time tSIS 200 SI Latch Hold Time tSIH 200 AK7756 → μP Delay Time from SCLK “↓”to SO Output tSOS 200 Hold Time from SCLK “↑” to SO Output (Note 32) tSOH 200 Note 32. 8bit ■ ns ns ns ns MHz ns ns ns ns μs ns ns ns ns ns ns (I2C BUS mode) μP/EEPROM (Ta= Tmin~Tmax; AVDD=DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; CL=20pF) Parameter Symbol min typ max I2C Timing SCL clock frequency fSCL 400 Bus Free Time Between Transmissions tBUF 1.3 Start Condition Hold Time tHD:STA 0.6 (prior to first Clock pulse) Clock Low Time 1.3 tLOW Clock High Time 0.6 tHIGH Setup Time for Repeated Start Condition 0.6 tSU:STA SDA Hold Time from SCL Falling 0 0.9 tHD:DAT SDA Setup Time from SCL Rising 0.1 tSU:DAT Rise Time of Both SDA and SCL Lines 0.3 tR Fall Time of Both SDA and SCL Lines 0.3 tF Setup Time for Stop Condition 0.6 tSU:STO Pulse Width of Spike Noise Suppressed tSP 0 50 by Input Filter Capacitive load on bus Cb 400 Note 33. I2C-bus Unit Unit kHz μs μs μs μs μs μs μs μs μs μs ns pF NXP B.V. MS1218-J-00-PB 2010/08 17 [AK7756] ■ 1/fXTI 1/fXTI tXTI=1/fXTI XTI VIH VIL 1/fs ts=1/fs 1/fs LRCK VIH VIL 1/fBICK 1/fBICK tBICK=1/fBICK VIH BICK VIL tBICKH tBICKL Figure 2. IRSTN tRST VIL Figure 3. Note 34. IRSTNpin = "L" MS1218-J-00-PB 2010/08 18 [AK7756] VIH VIL LRCK tBLRD tLRBD VIH VIL BICK tBSIDS tBSIDH VIH VIL SDIN1/2 Figure 4. ( ) VIH VIL LRCK tLRD VIH VIL BICK tLRD tBSOD tBSOD SDOUT1/2/3 50%VDD Figure 5. ( MS1218-J-00-PB ) 2010/08 19 [AK7756] 50%DVDD LRCK tMBL tMBL BICK 50%DVDD tBSIDS tBSIDH VIH VIL SDIN1/2 Figure 6. ( ) LRCK 50%DVDD tLRD BICK 50%DVDD tLRD tBSOD tBSOD 50%DVDD SDOUT1/2/3 Figure 7. ( MS1218-J-00-PB ) 2010/08 20 [AK7756] VIH RQN VIL tWRF tWRR tSF tSR VIH SCLK VIL tSCLKL tSCLKH 1/fSCLK 1/fSCLK VIH IRSTN VIL VIH RQN VIL tRST1 tIRRQ Figure 8. μP 1 (SPI ) VIH RQN tWRQH VIL VIH SI VIL tSIS tSIH VIH SCLK VIL tWSC tSCW Figure 9. μP tWSC tSCW 2 (SPI) MS1218-J-00-PB 2010/08 21 [AK7756] VIH SCLK VIL VIH SO VIL tSOH tSOS Figure 10. μP 3 (SPI) VIH SDA VIL tBUF tLOW tR tHIGH tF tSP VIH SCL VIL tHD:STA Stop tHD:DAT tSU:DAT Start tSU:STA tSU:STO Start Stop (I2C Bus) Figure 11. μP MS1218-J-00-PB 2010/08 22 [AK7756] (AK7756EN) 28Pin QFN (Unit: mm) 3.10 5.0±0.07 14 21 15 22 8 0.55±0.07 2.50 3.10 5.0±0.07 A 1 28 7 B 0.05M 2.50 SAB C0.30 0.23±0.05 S 0.12~0.18 0.00~0.05 0.70 0.75MAX 0.05 S 0.5 0.05MAX A A 0.18~0.28 Note: (Exposed Pad) ■ ( ) MS1218-J-00-PB 2010/08 23 [AK7756] (AK7756VF) 0.45±0.20 -0.05 0.17 +0.06 30Pin VSOP (Unit: mm) 9.70±0.10 16 1 15 5.60±0.10 7.60±0.20 30 0.12 0.65 0°~8˚ M 0.30 0.24±0.06 10.00MAX 1.20±0.10 +0.10 -0.05 0.08 S 0.10 1.50MAX S ■ ( ) MS1218-J-00-PB 2010/08 24 [AK7756] (AK7756EN) 7756 XXXX 1 XXXX : Date code identifier (4 digits) (AK7756VF) AKM AK7756VF XXXBYYYYC 1) AKM Logo 2) Marketing Code: AK7756VF 3) Pin #1 identification 4) Date Code: XXXBYYYYC XXXB: Lot number (X: Digit number, B: Alpha character) YYYYC: Assembly date (Y: Digit number, C: Alpha character) MS1218-J-00-PB 2010/08 25 [AK7756] Date (YY/MM/DD) 10/08/18 Revision 00 Reason Page Contents z z z z z z MS1218-J-00-PB 2010/08 26 [AK7756] MS1218-J-00-PB 2010/08 27