TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 D Start-Up Into a Full Load With Supply D D D D D D Low-EMI Converter (Integrated Antiringing Voltages as Low as 0.9 V Over Full Temperature Range Minimum 100-mA Output Current From 0.8-V Supply Voltage, 250 mA From 1.8 V High Power Conversion Efficiency, up to 90% Power-Save Mode for Improved Efficiency at Low Output Currents Device Quiescent Current Less Than 50 µA Added System Security With Integrated Low-Battery Comparator Switch Across Inductor) D Micro-Size 10-Pin MSOP Package D Evaluation Modules Available (TPS6100xEVM–156) Applications Include: – Single- and Dual-Cell Battery Operated Products – MP3-Players and Wireless Headsets – Pagers and Cordless Phones – Portable Medical Diagnostic Equipment – Remote Controls D · description The TPS6100x devices are boost converters intended for systems that are typically operated from a single- or dual-cell nickel-cadmium (NiCd), nickel-metal hydride (NiMH), or alkaline battery. The converter output voltage can be adjusted from 1.5 V to a maximum of 3.3 V and provides a minimum output current of 100 mA from a single battery cell and 250 mA from two battery cells. The converter starts up into a full load with a supply voltage of 0.9 V and stays in operation with supply voltages as low as 0.8 V. The converter is based on a fixed-frequency, current-mode pulse-width-modulation (PWM) controller that goes into power-save mode at low load currents. The current through the switch is limited to a maximum of 1100 mA, depending on the output voltage. The current sense is integrated to further minimize external component count. The converter can be disabled to minimize battery drain when the system is put into standby. A low-EMI mode is implemented to reduce interference and radiated electromagnetic energy that is caused by the ringing of the inductor when the inductor discharge-current decreases to zero. The device is packaged in the space-saving 10-pin MSOP package. L1 6 VBAT 140 7 SW LBO 10 9 LBI R2 Low Battery Warning TPS61006 FB 3 8 NC ON OFF COMP 2 1 EN GND 4 C1 100 pF VOUT Co 22 µF VOUT 5 R3 R1 START-UP TIMING INTO 33-Ω LOAD R4 10 kΩ 120 3 100 IOUT 2 80 60 40 1 C2 33 nF 20 EN 0 0 TYPICAL APPLICATION CIRCUIT FOR FIXED OUTPUT VOLTAGE OPTION I O– Output Current – mA 33 µH VO = 3.3 V VO – Output Voltage – V Ci 10 µF TPS61006 D1 0 2 4 6 8 10 12 Time – ms 14 16 18 20 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000–2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 AVAILABLE OPTIONS TA PACKAGE – 40°C to 85°C OUTPUT VOLTAGE (V) PART NUMBER† MARKING DGS PACKAGE Adj. from 1.5 V to 3.3 V TPS61000DGS ADA 1.5 TPS61001DGS ADB 1.8 TPS61002DGS ADC 2.5 TPS61003DGS ADD 2.8 TPS61004DGS ADE 3.0 TPS61005DGS ADF 3.3 TPS61006DGS ADG 10 Pin MSOP DGS 10-Pin Adj. from 1.5 V to 3.3 V TPS61007DGS ADH † The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS61000DGSR) to order quantities of 2500 devices per reel. Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION Compensation of error amplifier. Connect R-C-C network to set frequency response of control loop. See the Application section for more details. COMP 2 EN 1 I Chip-enable input. The converter is switched on if EN is set high, and is switched off when EN is connected to ground (shutdown mode). FB 3 I Feedback input for adjustable output voltage (TPS61000 only). The output voltage is programmed depending on the values of resistors R1 and R2. For the fixed output voltage versions (TPS61000, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006), leave the FB pin unconnected. NC/FBGND 8 Not connected (TPS61000, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006). A ground pin for the feedback resistor divider for the TPS61007 only. GND 4 Ground LBI 9 I Low-battery detector input. A low-battery signal is generated at the LBO pin when the voltage on LBI drops below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used. Do not leave this pin floating. LBO 10 O Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold of 500 mV. A pullup resistor should be connected between LBO and VOUT. SW 7 I Switch input pin. The node between inductor and anode of the rectifier diode is connected to this pin. VBAT VOUT 6 I Supply pin 5 O Output voltage. For the fixed output voltage versions, the integrated resistive divider is connected to this pin. DGS PACKAGE (TOP VIEW) EN COMP FB GND VOUT 1 10 2 9 3 8 4 7 5 6 LBO LBI NC/FBGND‡ SW VBAT ‡ TPS61007 only 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 functional block diagram fixed output-voltage option L1 D1 CI VOUT SW CO Antiringing Comparator and Switch VBAT UVLO Control Logic Oscillator Gate Drive EN LBI/LBO Comparator Current Sense Current Limit Slope Compensation LBI VREF Comparator Error Amplifier LBO GND Bandgap Reference COMP adjustable output-voltage option (TPS61000 only) L1 D1 CI CO SW Antiringing Comparator and Switch VBAT UVLO EN LBI/LBO Comparator VOUT Control Logic Oscillator Gate Drive Current Sense Current Limit Slope Compensation LBI FB VREF Comparator Error Amplifier LBO GND POST OFFICE BOX 655303 Bandgap Reference COMP • DALLAS, TEXAS 75265 3 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 functional block diagram (continued) adjustable output-voltage option (TPS61007 only) L1 D1 CI CO SW Antiringing Comparator and Switch VBAT UVLO EN LBI/LBO Comparator VOUT Control Logic Oscillator Gate Drive Current Sense Current Limit Slope Compensation LBI FB VREF Comparator Error Amplifier LBO Bandgap Reference FBGND GND COMP detailed description controller circuit The device is based on a current-mode control topology using a constant-frequency pulse-width modulator to regulate the output voltage. It runs at an oscillator frequency of 500 kHz. The current sense is implemented by measuring the voltage across the switch. The controller also limits the current through the power switch on a pulse-by-pulse basis. Care must be taken that the inductor saturation current is higher than the current limit of the TPS6100x. This prevents the inductor from going into saturation and therefore protects both device and inductor. The current limit should not become active during normal operating conditions. The TPS6100x is designed for high efficiency over a wide output current range. Even at light loads the efficiency stays high because the controller enters a power-save mode, minimizing switching losses of the converter. In this mode, the controller only switches if the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses, and again goes into the power-save mode once the output voltage exceeds the threshold voltage. The controller enters the power-save mode when the output current drops to levels that force the discontinuous current mode. It calculates a minimum duty cycle based on input and output voltage and uses the calculation for the transition out of the power-save mode into continuous current mode. The control loop must be externally compensated with an R/C/C network connected to the COMP pin. See the application section for more details on the design of the compensation network. device enable The device is put into operation when EN is set high. During start-up of the converter the input current from the battery is limited until the voltage on COMP reaches its operating point. The device is put into a shutdown mode when EN is set to GND. In this mode, the regulator stops switching and all internal control circuitry including the low-battery comparator is switched off. The output voltage drops to one diode drop below the input voltage in shutdown. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 detailed description (continued) under-voltage lockout An under-voltage lockout function prevents the device start-up if the supply voltage on VBAT is lower than approximately 0.7 V. This undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter. When in operation and the battery is being discharged, the device automatically enters the shutdown mode if the voltage on VBAT drops below approximately 0.7 V. If the EN pin is hardwired to VBAT and if the voltage at VBAT drops temporarily below the UVLO threshold voltage, the device switches off and does not start up again automatically, even if the supply voltage rises above 0.9 V. The device starts up again only after a signal change from low to high on EN or if the battery voltage is completely removed. low Battery detector circuit (LBI and LBO) The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO pin is high impedance. The LBO pin goes active low when the voltage on the LBI pin decreases below the set threshold voltage of 500 mV ± 15 mV, which is equal to the internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the application section for more details about the programming of the LBI threshold. If the low-battery detection circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left unconnected. Do not let the LBI pin float. low-EMI switch The device integrates a circuit which removes the ringing that typically appears on the SW-node when the converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and the Schottky diode stops conducting. Due to remaining energy that is stored in parasitic components of the diode, inductor, and switch, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage internally to VBAT and therefore dampens this ringing. The antiringing switch is turned on by a comparator that monitors the voltage between SW and VOUT. This voltage indicates when the diode is reverse biased. The ringing on the SW-node is damped to a large degree, reducing the electromagnetic interference generated by the switching regulator to a very great extent. adjustable output voltage (TPS61000 and TPS61007 only) The accuracy of the internal voltage reference, the controller topology, and the accuracy of the external resistor divider determine the accuracy of the adjustable output voltage versions. The reference voltage has an accuracy of ± 4% over line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending on load current. This adds an offset to the output voltage that is equivalent to 1% of VO. Using 1% accurate resistors for the feedback divider, a total accuracy of ± 6% can be achieved over the complete temperature and output current range. The TPS61007 is an improved adjustable output voltage version. Ground shift in the feedback loop was eliminated by adding a separate ground pin for the feedback resistor divider (FBGND). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 absolute maximum ratings† Input voltage range, VI (VBAT, VOUT, COMP, FB, LBO, EN, LBI) . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 3.6 V Input voltage, VI (SW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VOUT +0.7 V Peak current into SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1300 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ 25_C POWER RATING DGS 424 mW DERATING FACTOR ABOVE TA = 25_C 3.4 mW/_C TA = 70_C POWER RATING TA = 85_C POWER RATING 271 mW 220 mW recommended operating conditions MIN Supply voltage at VBAT Output current NOM 0.8 VBAT = 0.8 V VBAT = 1.8 V MAX VO UNIT V 100 mA 250 Inductor 10 33 µH Input capacitor 10 µF Output capacitor 22 µF Operating junction temperature, TJ 6 –40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 °C TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 electrical characteristics over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) PARAMETER VI Input voltage for start-up start up VI Input voltage once started VO Programmable output voltage TEST CONDITIONS RL = 33 Ω RL = 3 kΩ, TPS61000, TPS61007 1.5 0.8 V < VI < VO, 1.2 V, TPS61003 0.8 V < VI < VO, 1.6 V < VI < VO, 1.2 V, VO Output voltage TPS61004 0.8 V < VI < VO, 1.6 V < VI < VO, 1.2 V, TPS61005 0.8 V < VI < VO, 1.6 V < VI < VO, 1.2 V, TPS61006 0.8 V < VI < VO, 1.6 V < VI < VO, IO Switch current limit V 3.3 1.44 1.5 1.55 1.45 1.5 1.55 IO = 1 mA IO = 100 mA 1.72 1.8 1.86 1.74 1.8 1.86 IO = 1 mA IO = 100 mA 2.40 2.5 2.58 2.42 2.5 2.58 IO = 200 mA IO = 1 mA 2.42 2.5 2.58 2.68 2.8 2.89 IO = 100 mA IO = 200 mA 2.72 2.8 2.89 2.72 2.8 2.89 IO = 1 mA IO = 100 mA 2.88 3.0 3.1 2.9 3.0 3.1 IO = 200 mA IO = 1 mA 2.9 3.0 3.1 3.16 3.3 3.4 3.2 3.3 3.4 3.2 3.3 3.4 IO = 100 mA IO = 200 mA V mA 250 TPS61001 0.5 TPS61002 0.65 TPS61004 V 100 TPS61003 ILIM UNIT V IO = 1 mA IO = 100 mA VI = 0.8 V VI = 1.8 V Maximum continuous output current MAX 0.8 IO = 100 mA 1.2 V, TPS61002 TA = 25°C 0.8 0.8 V < VI < VO, TYP 0.9 IO = 100 mA 1.2 V, TPS61001 MIN 0.9 0 8 V < VI < VO 0.8 A 0.95 TPS61005 1 TPS61006 1.1 TPS61000, TPS61007 VFB Feedback voltage 468 f Oscillator frequency DMAX Maximum duty cycle rDS(on) Switch-on resistance VO = 3.3 V Line regulation (see Note 1) VI = 0.8 V to 1.25 V, IO = 50 mA Load regulation fixed output voltage versions (see Note 1) VI = 1.2 V, 360 500 515 mV 500 840 kHz 85% 0.18 IO = 10 mA to 90 mA 0.3 0.27 Ω %/V 0.25% NOTE 1: Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal output voltage). For line regulation, x %/V stands for ± x% change of the nominal output voltage per 1-V change on the input/supply voltage. For load regulation, y% stands for ± y% change of the nominal output voltage per the specified current change. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 electrical characteristics over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS IQ Quiescent current drawn from power ower source (current into VBAT and into VOUT) IO = 0 mA, VEN = VI, VO = 3.4 V ISD Shutdown current from power source (current into VBAT and into VOUT) VEN = 0 V VIL EN low-level input voltage VIH EN high-level input voltage VIL MIN IFB MAX 44 6 0.2 EN input current EN = GND or VBAT LBI low-level input voltage threshold VLBI voltage decreasing 470 0.2 × VBAT V V 0.1 1 µA 500 530 mV mV µA 0.01 0.1 0.04 0.2 V LBO output leakage current VLBI = 0 V, VO = 3.3 V, IOL = 50 µA VLBI = 650 mV, VLBO = 3.3 V 0.01 1 µA FB input bias current (TPS61000, TPS61007 only) VFB = 500 mV 0.01 0.1 µA LBO low-level output voltage PARAMETER MEASUREMENT INFORMATION L1 Ci 10 µF D1 33 µH 6 VBAT 7 SW 9 LBI R2 Low Battery Warning LBO 10 List of Components: IC1: Only fixed output versions (unless otherwise noted) L1: Coilcraft DO3308P–333 D1: Motorola Schottky Diode MBRM120LT3 CI: Ceramic CO: Ceramic TPS6100x 8 NC/FBGND FB 3 ON OFF Co 22 µF VOUT 5 R3 R1 COMP 2 1 EN GND 4 R4 10 kΩ C1 100 pF C2 33 nF Figure 1. Circuit Used for Typical Characteristics Measurements 8 µA A µA 10 LBI input current UNIT 5 0.8 × VBAT LBI input hysteresis II VOL TYP VBAT VOUT POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS Table of Graphs FIGURE η Efficiency vs Output Current 2, 3 vs Inductor Type 4 vs Input Voltage 5 IO VO Maximum Output Current vs Input Voltage 6 Output Voltage vs Output Current 7 VO IQ TPS61007 Output Voltage vs Output Current 8 No-Load Supply Current vs Input Voltage 9 ISD VI Shutdown Current vs Input Voltage 10 Minimum Start-Up Input Voltage vs Load Current 11 ILIM Switch Current Limit vs Output Voltage 12 Output Voltage Ripple Amplitude 13 Output Voltage Ripple Amplitude 14 Load Transient Response 15 Line Transient Response 16 Start-Up Timing 17 EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 100 VI = 2.4 V VI = 1.2 V 90 90 80 80 VO = 3.3 V 70 VO = 1.5 V Efficiency – % Efficiency – % 70 VO = 3.3 V 60 50 40 VO = 2.8 V 60 50 40 30 30 20 20 10 10 0 0 1 10 100 1000 1 10 100 1000 IO – Output Current – mA IO – Output Current – mA Figure 2 Figure 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS EFFICIENCY vs INDUCTOR TYPE 100 VI = 1.2 V VO = 3.3 V IO = 100 mA 95 90 Efficiency – % 85 80 75 70 65 60 55 50 Coilcraft DO1608C Coilcraft DS1608C Coiltronics Coiltronics UP1B UP2B Inductor Type Sumida CD43 Sumida CD54 Figure 4 EFFICIENCY vs INPUT VOLTAGE MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 95 1 IO = 50 mA 0.90 I O – Maximum Output Current – A 90 Efficiency – % 85 IO = 100 mA 80 75 70 65 VO = 3.2 V 0.80 0.70 VO = 2.42 V VO = 1.75 V 0.60 0.50 VO = 1.45 V 0.40 0.30 0.20 0.10 60 0.80 1.30 1.80 2.30 VI – Input Voltage – V 2.80 3.30 0 0.8 1 Figure 5 10 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 VI – Input Voltage – V Figure 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS TPS61002/3/6 TPS61007 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 3.60 3.60 VI = 1.2 V 3.3 V 3.40 VI = 1.2 V 3.20 3.20 VO – Output Voltage – V VO – Output Voltage – V VO = 3.3 V 3.40 3 2.80 2.5 V 2.60 2.40 2 2.00 3 2.80 VO = 2.5 V 2.60 2.40 2.20 2 VO = 1.8 V 1.8 V 1.80 1.80 1.60 0.1 1.60 1 10 100 1000 1 IO – Output Current – mA NO-LOAD SUPPLY CURRENT vs INPUT VOLTAGE 1000 SHUTDOWN CURRENT vs INPUT VOLTAGE 45 1800 TA = 85°C TA = 85°C 40 35 1600 TA = 25°C 30 1400 I SD – Shutdown Current – nA I Q – No-Load Supply Current – µ A 100 Figure 8 Figure 7 TA = –40°C 25 20 15 10 5 0 0.80 10 IO – Output Current – mA 1.30 1.80 2.30 2.80 VI – Input Voltage – V 3.30 3.80 1200 1000 800 600 400 TA = 25°C 200 0 0.80 TA = –40°C 1.30 1.80 2.30 2.80 3.30 3.80 VI – Input Voltage – V Figure 9 Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS TPS61000, TPS61007 MINIMUM START-UP INPUT VOLTAGE vs LOAD CURRENT SWITCH CURRENT LIMIT vs OUTPUT VOLTAGE 1.5 VO = min 3.2 V VI = 1.2 V 0.85 I LIM – Switch Current Limit – A VI – Minimum Start-Up Input Voltage – V 0.90 0.80 0.75 0.70 0.65 0.60 0 10 20 30 40 50 60 70 80 1 0.5 0 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 90 100 IO – Load Current – mA VO – Output Voltage – V Figure 11 Figure 12 TPS61006 TPS61006 OUTPUT VOLTAGE RIPPLE AMPLITUDE OUTPUT VOLTAGE RIPPLE AMPLITUDE 3.36 VO – Output Voltage – V 3.34 IO = 2 mA VO – Output Voltage – V 3.32 3.30 3.28 3.26 VI = 1.2 V 3.32 3.30 VSW 2 3.24 VSW 3.22 0 3.20 3.18 0 1 2 3 4 5 0 1 2 Time – µs Time – ms Figure 14 Figure 13 12 VOUT 3.34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 4 5 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 TPS61006 LINE TRANSIENT RESPONSE VO – Output Voltage – V TPS61006 LOAD TRANSIENT RESPONSE VI = 1.2 V RC = 33 kΩ 3.3 60 50 mA 40 20 5 mA 0 0 1 2 3.45 3 4 5 6 Time – ms 7 8 9 VOUT IO = 50 mA RC = 33 kΩ 3.35 3.25 V I – Input Voltage – V 3.2 3.55 1.2 VBAT 1 0.8 0 10 1 2 Figure 15 3 4 5 6 Time – ms 7 8 9 10 Figure 16 TPS61006 START-UP TIMING INTO 33-Ω LOAD 140 VOUT 120 3 100 IOUT 2 80 60 40 1 20 EN I O – Output Current – mA 3.4 VO – Output Voltage – V I O– Output Current – mA VO – Output Voltage – V TYPICAL CHARACTERISTICS 0 0 0 2 4 6 8 10 12 Time – ms 14 16 18 20 Figure 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION The TPS6100x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, singleor dual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6100x is used. programming the TPS61000 and TPS61007 adjustable output voltage devices The output voltage of the TPS61000 and TPS61007 can be adjusted with an external resistor divider. The typical value of the voltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode. The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the range of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3, depending on the needed output voltage VOUT, can be calculated using the following equation: R3 + R4 ǒ Ǔ V O *1 V FB ǒ + 500 kΩ Ǔ V O *1 500 mV (1) If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3. D1 L1 VO 33 µH 7 SW Ci 10 µF 10 V VOUT CO 22 µF 10 V 5 R5 6 V BAT R1 9 LBO LBI FB Low Battery Warning 3 TPS61007 R4 R2 FBGND 1 R3 10 8 EN Alkaline Cell 4 COMP GND 2 RC 10 kΩ CC1 100 pF CC2 33 nF Figure 18. Typical Application Circuit for Adjustable Output Voltage Option The TPS61007 is an improved version of the TPS61000 adjustable output voltage device. The FBGND pin is internally connected to GND. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION programming the low battery comparator threshold voltage The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 µA. The voltage across R2 is equal to the reference voltage that is generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage (VBAT), can be calculated using the following equation: R1 + R2 ǒ Ǔ V TRIP * 1 V REF + 500 kΩ ǒ V Ǔ BAT * 1 0.5 V (2) For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery voltage of 1.0 V, a resistor in the range of 500 kΩ should be chosen for R1. The output of the low battery comparator is a simple open-drain output that goes active low if the battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1MΩ, and should only be pulled up to the VOUT. If not used, the LBO pin can be left floating. inductor selection The output filter of inductive switching regulators is a low pass filter of second order. It consists of an inductor and a capacitor, often referred to as storage inductor and output capacitor. To select an inductor, keep the possible peak inductor current below the current limit threshold of the power switch in your chosen configuration. For example, the current limit threshold of the TPS61006’s switch is 1100 mA at an output voltage of 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current can be done using the following equation: I L + I V OUT x V OUT x 0.8 BAT (3) For example, for an output current of 100 mA at 3.3 V, at least 515-mA current flows through the inductor at a minimum input voltage of 0.8 V. The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally it is advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the magnetic hysteresis losses in the inductor as well as output voltage ripple and EMI. But in the same way, the regulation time at load change rises. In addition, a larger inductor increases the total system cost. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION With those parameters it is possible to calculate the value for the inductor: L + V ǒ –V x V BAT BAT OUT ∆I x f x V L OUT Ǔ (4) Parameter f is the switching frequency and ∆IL is the ripple current in the inductor, i.e., 20% x IL. In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated currents, it is possible to chose a suitable inductor. Care has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in equation 3. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency. The following inductors from different suppliers were tested. All work with the TPS6100x converter within their specified parameters: Table 1. Recommended Inductors VENDOR PART NUMBER Coilcraft DO1608P Series DS1608P Series DO3308 Series Coiltronics UP1B Series UP2B Series Murata LQH3N Series Sumida CD43 Series CD54 Series CDR74B Series TDK NLC453232T Series capacitor selection The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero. C min + I ǒ –V x V BAT OUT OUT f x ∆V x V OUT Ǔ (5) Parameter f is the switching frequency and ∆V is the maximum allowed ripple. With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple will be larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using the following equation: ∆V 16 ESR + I OUT xR (6) ESR POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For example, a 10-µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs have to be made between performance and costs of the converter circuit. A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in parallel placed close to the IC is recommended. rectifier selection The rectifier diode has a major impact on the overall converter efficiency. Standard diodes are not suitable for low-voltage switched mode power supplies. A Schottky diode with low forward voltage and fast reverse recovery should be used as a rectifier to minimize overall losses of the dc-dc converter. The maximum current rating of the diode must be high enough for the application. The maximum diode current is equal to the maximum current in the inductor that was calculated in equation 3. The maximum reverse voltage is the output voltage. The chosen diode should therefore have a reverse voltage rating higher than the output voltage. Table 2. Recommended Diodes VENDOR PART NUMBER Motorola Surface Mount MBRM120LT3 MBR0520LT1 Motorola Axial Lead 1N1517 ROHM RB520S-30 RB160L–40 The typical forward voltage of those diodes is in the range of 0.35 to 0.45 V assuming a peak diode current of 600 mA. compensation of the control loop An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter. Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output capacitor must be compensated. The network shown in Figure 19 satisfies these requirements. RC 10 kΩ COMP CC1 100 pF CC2 33 nF Figure 19. Compensation of the Control Loop POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION Resistor RC and capacitor CC2 depend on the chosen inductance. For a 33-µH inductor, the capacitance of CC2 should be chosen to 33 nF, or in other words, if the inductor is xx µH, the chosen compensation capacitor should be xx nF, the same number value. The value of the compensation resistor is then chosen based on the requirement to have a time constant of 0.3 ms for the R/C network of RC and CC2; hence for a 33-nF capacitor, a 10-kΩ resistor should be chosen for RC. Capacitor CC1 is depending on the ESR and capacitance value of the output capacitor, and on the value chosen for RC. Its value is calculated using following equation: C C1 + C O x ESR COUT R C 3 (7) For a selected output capacitor of 22 µF with an ESR of 0.2 Ω, and RC of 33 kΩ, the value of CC1 is in the range of 100 pF. Table 3. Recommended Compensation Components OUTPUT CAPACITOR INDUCTOR [µH] RC [kΩ] CC1 [pF] CC2 [nF] 0.2 10 100 33 0.3 15 100 22 22 0.4 33 100 10 10 0.1 33 100 10 CAPACITANCE [µF] ESR [Ω] 33 22 22 22 10 10 schematic of TPS6100x evaluation modules (TPS6100xEVM–156) J1 LP1 R6 C5 TPS6100x R5 EN C6 LBO COMP FB OUT R4 LBI NC/FBGND L1 R3 GND R2 SW VOUT R1 IN VBAT C2 C1 C3 D1 Evaluation modules are available for device types TPS61000, TPS61002, TPS61003, and TPS61006. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 APPLICATION INFORMATION suggested board layout and component placement (21 mm x 21 mm board size) Figure 20. Top Layer Layout and Component Placement Figure 21. Bottom Layer Layout and Component Placement POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TPS61000, TPS61001, TPS61002, TPS61003, TPS61004, TPS61005, TPS61006, TPS61007 SINGLE- AND DUAL-CELL BOOST CONVERTER WITH START-UP INTO FULL LOAD SLVS279C – MARCH 2000 – REVISED APRIL 2003 THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component. Three basic approaches for enhancing thermal performance are listed below: • • • Improving the power dissipation capability of the PWB design Improving the thermal coupling of the component to the PWB Introducing airflow in the system The maximum junction temperature (TJ) of the TPS6100x devices is 125°C. The thermal resistance of the 10-pin MSOP package (DGS) is RθJA = 294°C/W. Specified regulator operation is assured to a maximum ambient temperature (TA) of 85 °C. Therefore, the maximum power dissipation is about 130 mW. More power can be dissipated if the maximum ambient temperature of the application is lower. T P = D ( MAX ) J ( MAX ) – A R = 125 ° C – 85 ° C Θ JA 294 ° C / W = 136 mW (8) Under normal operating conditions, the sum of all losses generated inside the converter IC is less than 50 mW, which is well below the maximum allowed power dissipation of 136 mW as calculated in equation 8. Therefore, power dissipation is given no special attention. Table 4 shows where the losses inside the converter are generated. Table 4. Losses Inside the Converter 20 LOSSES AMOUNTS Conduction losses in the switch 36 mW Switching losses 8 mW Gate drive losses 2.3 mW Quiescent current losses < 1 mW TOTAL < 50 mW POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 19-Nov-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish MSL Peak Temp Samples (3) (Requires Login) (2) TPS61000DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61000DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61000DGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61000DGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61000DGST PREVIEW VSSOP DGS 10 TBD Call TI TPS61002DGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61002DGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61003DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61003DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61004DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61004DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61005DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61005DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61005DGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61005DGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61005DGST PREVIEW VSSOP DGS 10 TBD Call TI TPS61006DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61006DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 19-Nov-2012 Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish MSL Peak Temp Samples (3) (Requires Login) (2) TPS61006DGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61006DGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61006DGST PREVIEW VSSOP DGS 10 TBD Call TI TPS61007DGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS61007DGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS61000DGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS61002DGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS61005DGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS61006DGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS61000DGSR VSSOP DGS 10 2500 358.0 335.0 35.0 TPS61002DGSR VSSOP DGS 10 2500 358.0 335.0 35.0 TPS61005DGSR VSSOP DGS 10 2500 358.0 335.0 35.0 TPS61006DGSR VSSOP DGS 10 2500 358.0 335.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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