TI TPS61025DRC

TPS61020, TPS61024
TPS61025, TPS61027
(3,25 mm x 3,25 mm)
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
96% EFFICIENT SYNCHRONOUS BOOST CONVERTER WITH 1.5-A SWITCH
FEATURES
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DESCRIPTION
96% Efficient Synchronous Boost Converter
– 200-mA Output Current From 0.9-V Input
– 500-mA Output Current From 1.8-V Input
Output Voltage Remains Regulated When Input Voltage Exceeds Nominal Output Voltage
Device Quiescent Current: 25-µA (Typ)
Input Voltage Range: 0.9-V to 6.5-V
Fixed and Adjustable Output Voltage Options
Up to 5.5-V
Power Save Mode for Improved Efficiency at
Low Output Power
Low Battery Comparator
Low EMI-Converter (Integrated Antiringing
Switch)
Load Disconnect During Shutdown
Over-Temperature Protection
Small 3 mm x 3 mm QFN-10 Package
The TPS6102x devices provide a power supply
solution for products powered by either a one-cell,
two-cell, or three-cell alkaline, NiCd or NiMH, or
one-cell Li-Ion or Li-polymer battery. Output currents
can go as high as 200 mA while using a single-cell
alkaline, and discharge it down to 0.9 V. It can also
be used for generating 5 V at 500 mA from a 3.3-V
rail or a Li-Ion battery. The boost converter is based
on a fixed frequency, pulse-width-modulation (PWM)
controller using a synchronous rectifier to obtain
maximum efficiency. At low load currents the converter enters the Power Save mode to maintain a
high efficiency over a wide load current range. The
Power Save mode can be disabled, forcing the
converter to operate at a fixed switching frequency.
The maximum peak current in the boost switch is
limited to a value of 1500 mA.
The TPS6102x devices keep the output voltage
regulated even when the input voltage exceeds the
nominal output voltage. The output voltage can be
programmed by an external resistor divider, or is
fixed internally on the chip. The converter can be
disabled to minimize battery drain. During shutdown,
the load is completely disconnected from the battery.
A low-EMI mode is implemented to reduce ringing
and, in effect, lower radiated electromagnetic energy
when the converter enters the discontinuous conduction mode. The device is packaged in a 10-pin QFN
PowerPAD™package measuring 3 mm x 3 mm
(DRC).
APPLICATIONS
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All One-Cell, Two-Cell and Three-Cell Alkaline,
NiCd or NiMH or Single-Cell Li Battery
Powered Products
Portable Audio Players
PDAs
Cellular Phones
Personal Medical Products
Camera White LED Flash Light
L1
6.8 µH
SW
VOUT
VBAT
0.9-V To
6.5-V Input
C1
10 µF
R1
R3
EN
C2
2.2 µF
C3
47 µF
VO
3.3 V Up To
200 mA
FB
LBI
R4
R5
R2
PS
GND
LBO
Low Battery
Output
PGND
TPS61020
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OUTPUT VOLTAGE OPTIONS (1)
TA
OUTPUT VOLTAGE
DC/DC
PACKAGE
MARKING
Adjustable
BDR
3.0 V
BDS
40°C to 85°C
(1)
(2)
3.3 V
BDT
5V
BDU
PART NUMBER (2)
PACKAGE
TPS61020DRC
TPS61024DRC
10-Pin QFN
TPS61025DRC
TPS61027DRC
Contact the factory to check availability of other fixed output voltage versions.
The DRC package is available taped and reeled. Add R suffix to device type (e.g., TPS61020DRCR) to order quantities of 3000 devices
per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
TPS6102x
Input voltage range on SW, VOUT, LBO, VBAT, PS, EN, FB, LBI
-0.3 V to 7 V
Operating virtual junction temperature range, TJ
-40°C to 150°C
Storage temperature range Tstg
-65°C to 150°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS TABLE
PACKAGE
THERMAL RESISTANCE
ΘJA
POWER RATING
TA≤ 25°C
DERATING FACTOR ABOVE
TA = 25°C
DRC
48.7 °C/W
2054 mW
21 mW/°C
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX UNIT
Supply voltage at VBAT, VI
0.9
6.5
V
Operating free air temperature range, TA
-40
85
°C
Operating virtual junction temperature range, TJ
-40
125
°C
2
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
ELECTRICAL CHARACTERISTICS
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
DC/DC STAGE
PARAMETER
VI
TEST CONDITIONS
Minimum input voltage range for
start-up
MIN
RL = 120 Ω
Input voltage range, after start-up
TYP
MAX
0.9
1.2
0.9
VO
TPS61020 output voltage range
1.8
VFB
TPS61020 feedback voltage
490
f
Oscillator frequency
ISW
Switch current limit
VOUT= 3.3 V
UNIT
V
6.5
500
5.5
V
510
mV
480
600
720
kHz
1200
1500
1800
mA
Start-up current limit
0.4 x ISW
mA
SWN switch on resistance
VOUT= 3.3 V
260
mΩ
SWP switch on resistance
VOUT= 3.3 V
290
mΩ
Total accuracy (including line and
load regulation)
-3%
3%
Line regulation
0.6%
Load regulation
Quiescent current
0.6%
VBAT
VOUT
Shutdown current
IO = 0 mA, VEN = VBAT = 1.2 V,
VOUT = 3.3 V, TA = 25°C
1
3
µA
25
45
µA
VEN = 0 V, VBAT = 1.2 V, TA = 25°C
0.1
1
µA
MIN
TYP
MAX
UNIT
490
500
510
mV
CONTROL STAGE
PARAMETER
TEST CONDITIONS
VUVLO
Under voltage lockout threshold
VLBI voltage decreasing
VIL
LBI voltage threshold
VLBI voltage decreasing
0.8
LBI input hysteresis
VOL
V
10
mV
LBI input current
EN = VBAT or GND
0.01
0.1
LBO output low voltage
VO = 3.3 V, IOI = 100 µA
0.04
0.4
LBO output low current
Vlkg
LBO output leakage current
VIL
EN, PS input low voltage
VIH
EN, PS input high voltage
EN, PS input current
100
VLBO = 7 V
0.01
V
µA
0.1
µA
0.2 ×
VBAT
V
0.8 ×
VBAT
Clamped on GND or VBAT
µA
V
0.01
0.1
µA
Overtemperature protection
140
°C
Overtemperature hysteresis
20
°C
3
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
PIN ASSIGNMENTS
DRC PACKAGE
(TOP VIEW)
EN
VOUT
FB
LBO
GND
PGND
SW
PS
LBI
VBAT
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
EN
1
I
Enable input. (1/VBAT enabled, 0/GND disabled)
FB
3
I
Voltage feedback of adjustable versions
GND
5
LBI
7
I
Low battery comparator input (comparator enabled with EN)
LBO
4
O
Low battery comparator output (open drain)
PS
8
I
Enable/disable power save mode (1 / VBAT disabled, 0/ GND enabled)
SW
9
I
Boost and rectifying switch input
PGND
10
VBAT
6
I
Supply voltage
VOUT
2
O
Boost converter output
PowerPAD™
4
Control / logic ground
Power ground
Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
ELECTRICAL CHARACTERISTICS (continued)
FUNCTIONAL BLOCK DIAGRAM (TPS61020)
SW
Backgate
Control
AntiRinging
VBAT
VOUT
10 kΩ
VOUT
Vmax
Control
20 pF
Gate
Control
PGND
PGND
Regulator
PGND
Error
Amplifier _
FB
+
Vref = 0.5 V
Control Logic
+
_
GND
Oscillator
Temperature
Control
EN
PS
GND
Low Battery
Comparator
_
LBI
LDO
+
+
_
Vref = 0.5 V
GND
5
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
PARAMETER MEASUREMENT INFORMATION
L1
6.8 µH
VOUT
SW
VBAT
Power
Supply
C1
10 µF
R1
R3
EN
C2
2.2 µF
C3
47 µF
VCC
Boost Output
FB
LBI
R4
R5
R2
PS
LBO
GND
List of Components:
U1 = TPS6102xDRC
L1 = EPCOS B82462−G4682
C1, C2 = X7R/X5R Ceramic
C3 = Low ESR Tantalum
Control Output
PGND
TPS6102x
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Maximum output current
vs Input voltage
1
vs Output current (TPS61020)
2
vs Output current (TPS61025)
3
vs Output current (TPS61027)
4
vs Input voltage (TPS61025)
5
vs Input voltage (TPS61027)
6
vs Output current (TPS61025)
7
vs Output current (TPS61027)
8
No load supply current into VBAT
vs Input voltage
9
No load supply current into VOUT
vs Input voltage
10
Output voltage in continuous mode (TPS61025)
11
Output voltage in continuous mode (TPS61027)
12
Output voltage in power save mode (TPS61025)
13
Output voltage in power save mode (TPS61027)
14
Load transient response (TPS61025)
15
Load transient response (TPS61027)
16
Line transient response (TPS61025)
17
Line transient response (TPS61027)
18
Start-up after enable (TPS61025)
19
Start-up after enable (TPS61027)
20
Efficiency
Output voltage
Waveforms
6
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TYPICAL CHARACTERISTICS
TPS61020
EFFICIENCY
vs
OUTPUT CURRENT
MAXIMUM OUTPUT CURRENT
vs
INPUT VOLTAGE
1400
100
VO = 3.3 V
VO = 5 V
80
1000
70
Efficiency - %
Maximum Output Current - mA
1200
800
600
VO = 1.8 V
400
VO = 1.8 V
VBAT = 0.9 V
90
VBAT = 1.8 V
60
50
40
30
20
200
10
0
0.9
1.7
2.5
3.3
4.1
4.9
VI - Input Voltage - V
5.7
0
6.5
1
Figure 1.
Figure 2.
TPS61025
EFFICIENCY
vs
OUTPUT CURRENT
TPS61027
EFFICIENCY
vs
OUTPUT CURRENT
100
100
90
90
80
1000
80
VBAT = 2.4 V
70
60
50
VBAT = 0.9 V
40
40
20
20
1
10
100
IO - Output Current - mA
Figure 3.
VO = 5 V
10
0
1000
VBAT = 3.6 V
50
30
VO = 3.3 V
VBAT = 2.4 V
VBAT = 1.8 V
60
30
10
VBAT = 1.2 V
70
VBAT = 1.8 V
Efficiency - %
Efficiency - %
10
100
IO - Output Current - mA
0
1
10
100
IO - Output Current - mA
1000
Figure 4.
7
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
TPS61025
EFFICIENCY
vs
INPUT VOLTAGE
TPS61027
EFFICIENCY
vs
INPUT VOLTAGE
100
IO = 100 mA
90
90
85
85
IO = 10 mA
80
75
IO = 250 mA
70
70
60
60
55
55
1.9
2.4
2.9
3.4
3.9
IO = 250 mA
75
65
1.4
IO = 10 mA
80
65
50
0.9
IO = 100 mA
95
Efficiency - %
Efficiency - %
95
100
VO = 3.3 V
VO = 5 V
50
4.4 4.9
0.9 1.4 1.9 2.4 2.9 3.4 3.9 4.4 4.9 5.4 5.9 6.4
VI - Input Voltage - V
VI - Input Voltage - V
Figure 5.
Figure 6.
TPS61025
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
TPS61027
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.35
5.10
VO = 3.3 V
VO = 5 V
VO - Output Voltage - V
VO - Output Voltage - V
5.05
3.30
VBAT = 2.4 V
3.25
5
VBAT = 3.6 V
4.95
4.90
4.85
3.20
4.80
1
8
10
100
1000
IO - Output Current - mA
1
10
100
IO - Output Current - mA
Figure 7.
Figure 8.
1000
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
NO LOAD SUPPLY CURRENT INTO VBAT
vs
INPUT VOLTAGE
NO LOAD SUPPLY CURRENT INTO VOUT
vs
INPUT VOLTAGE
1.6
34.8
TA = 85°C
No Load Supply Current Into VOUT - µ A
1.4
1.2
1
0.8
TA = 25°C
TA = -40°C
0.6
0.4
0.2
29.8
24.8
TA = -40°C
TA = 25°C
19.8
14.8
9.8
4.8
-0.2
2
2.5 3 3.5 4 4.5 5
VI - Input Voltage - V
5.5
6
0.9 1.5
6.5
2
2.5 3 3.5 4 4.5 5
VI - Input Voltage - V
5.5
6
Figure 9.
Figure 10.
TPS61025
OUTPUT VOLTAGE IN CONTINUOUS MODE
TPS61027
OUTPUT VOLTAGE IN CONTINUOUS MODE
6.5
Output Voltage
20 mV/div
VI = 1.2 V,
RL = 33 Ω,
VO = 3.3 V
Inductor Current
200 mA/div
Output Voltage
20 mV/div
0
0.9 1.5
Inductor Current
200 mA/div
No Load Supply Current Into VBAT - µ A
TA = 85°C
t - Time - 1 µs/div
Figure 11.
VI = 3.6 V,
RL = 25 Ω,
VO = 5 V
t - Time - 1 µs/div
Figure 12.
9
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
Inductor Current
200 mA/div, DC
Figure 13.
Figure 14.
TPS61025
LOAD TRANSIENT RESPONSE
TPS61027
LOAD TRANSIENT RESPONSE
VI = 3.6 V,
IL = 100 mA to 200 mA,
VO = 5 V
Output Voltage
20 mV/div, AC
VI = 1.2 V,
IL = 100 mA to 200 mA,
VO = 3.3 V
Output Current
100 mA/div, DC
t - Time - 50 µs/div
Output Voltage
20 mV/div, AC
Output Current
100 mA/div, DC
VI = 3.6 V,
RL = 250 Ω,
VO = 5 V
t - Time - 50 µs/div
t - Time - 2 ms/div
Figure 15.
10
TPS61027
OUTPUT VOLTAGE IN POWER SAVE MODE
Output Voltage
50 mV/div, AC
VI = 1.2 V,
RL = 330 Ω,
VO = 3.3 V
Inductor Current
100 mA/div, DC
Output Voltage
20 mV/div, AC
TPS61025
OUTPUT VOLTAGE IN POWER SAVE MODE
t - Time - 2 ms/div
Figure 16.
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
TPS61027
LINE TRANSIENT RESPONSE
VI = 3 V to 3.6 V,
RL = 25 Ω,
VO = 5 V
Output Voltage
20 mV/div, AC
Input Voltage
500 mV/div, AC
VI = 1.8 V to 2.4 V,
RL = 33 Ω,
VO = 3.3 V
Output Voltage
20 mV/div, AC
t - Time - 2 ms/div
t - Time - 2 ms/div
Figure 18.
TPS61025
START-UP AFTER ENABLE
TPS61027
START-UP AFTER ENABLE
t - Time - 1 ms/div
Figure 19.
VI = 3.6 V,
RL = 50 Ω,
VO = 5 V
Inductor Current
500 mA/div, DC
Voltage At SW
2 V/div, DC
Inductor Current
200 mA/div, DC
Output Voltage
1 V/div, DC
VI = 2.4V,
RL = 33 Ω,
VO = 3.3 V
Output Voltage
2 V/div, DC
Enable
5 V/div, DC
Enable
5 V/div, DC
Figure 17.
Voltage At SW
2 V/div, DC
Input Voltage
500 mV/div, AC
TPS61025
LINE TRANSIENT RESPONSE
t - Time - 500 µs/div
Figure 20.
11
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
DETAILED DESCRIPTION
CONTROLLER CIRCUIT
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 1500 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
Down Regulation
In general, a boost converter only regulates output voltages which are higher than the input voltage. This device
operates differently. For example, it is able to regulate 3.0 V at the output with two fresh alkaline cells at the input
having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from
a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a down
conversion mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter changes to a down conversion mode. In
this mode, the control circuit changes the behavior of the rectifying PMOS. It sets the voltage drop across the
PMOS as high as needed to regulate the output voltage. This means the power losses in the converter increase.
This has to be taken into account for thermal consideration.
Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This
also means that the output voltage can drop below the input voltage during shutdown. During start-up of the
converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the
battery.
Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than
approximately 0.8 V. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 0.8 V. This undervoltage lockout function is
implemented in order to prevent the malfunctioning of the converter.
12
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TPS61020, TPS61024
TPS61025, TPS61027
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
DETAILED DESCRIPTION (continued)
Softstart
When the device enables, the internal startup cycle starts with the first step, the precharge phase. During
precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input
voltage. The rectifying switch is current limited during that phase. This also limits the output current under short
circuit conditions at the output. After charging the output capacitor to the input voltage, the device starts
switching. If the input voltage is below 1.4 V the device works with a fixed duty cycle of 50% until the output
voltage reaches 1.4V. After that the duty cycle is set depending on the input output voltage ratio. Until the output
voltage reaches its nominal value, the boost switch current limit is set to 40% of its nominal value to avoid high
peak currents at the battery during startup. As soon as the output voltage is reached, the regulator takes control
and the switch current limit is set back to 100%.
Power Save Mode
The PS pin can be used to select different operation modes. To enable power save, PS must be set low. Power
save mode is used to improve efficiency at light load. In power save mode the converter only operates when the
output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses and
goes again into power save mode once the output voltage exceeds the set threshold voltage. This power save
mode can be disabled by setting the PS to VBAT. In down conversion mode, power save mode is always active
and the device cannot be forced into fixed frequency operation at light loads.
Low Battery Detector Circuit—LBI/LBO
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag
when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is
enabled. When the device is disabled, the LBO pin is high-impedance. The switching threshold is 500 mV at LBI.
During normal operation, LBO stays at high impedance when the voltage, applied at LBI, is above the threshold.
It is active low when the voltage at LBI goes below 500 mV.
The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider
connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV,
which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the
application section for more details about the programming of the LBI threshold. If the low-battery detection
circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left
unconnected. Do not let the LBI pin float.
Low-EMI Switch
The device integrates a circuit that removes the ringing that typically appears on the SW node when the
converter enters discontinuous current mode. In this case, the current through the inductor ramps to zero and the
rectifying PMOS switch is turned off to prevent a reverse current flowing from the output capacitors back to the
battery. Due to the remaining energy that is stored in parasitic components of the semiconductor and the
inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage to VBAT and
therefore dampens ringing.
13
TPS61020, TPS61024
TPS61025, TPS61027
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SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
APPLICATION INFORMATION
DESIGN PROCEDURE
The TPS6102x dc/dc converters are intended for systems powered by a single up to triple cell Alkaline, NiCd,
NiMH battery with a typical terminal voltage between 0.9 V and 6.5 V. They can also be used in systems
powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other
voltage source with a typical output voltage between 0.9 V and 6.5 V can power systems where the TPS6102x is
used.
Programming the Output Voltage
The output voltage of the TPS61020 dc/dc converter can be adjusted with an external resistor divider. The typical
value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V.
The current through the resistive divider should be about 100 times greater than the current into the FB pin. The
typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two
values, the recommended value for R4 should be lower than 500 kΩ, in order to set the divider current at 1 µA or
higher. Because of internal compensation circuitry the value for this resistor should be in the range of 200 kΩ.
From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using
Equation 1:
R3 R4 V
O 1
V
FB
180 k V
O 1
500 mV
(1)
If as an example, an output voltage of 3.3 V is needed, a 1.0-MΩ resistor should be chosen for R3. If for any
reason the value for R4 is chosen significantly lower than 200kΩ additional capacitance in parallel to R3 is
recommended, in case the device shows instable regulation of the output voltage. The required capacitance
value can be easily calculated using Equation 2:
C
20 pF 200 k 1
parR3
R4
(2)
L1
VOUT
SW
C2
VBAT
Power
Supply
C1
R1
C3
VCC
Boost Output
R3
EN
FB
LBI
R4
R5
R2
PS
LBO
GND
Control Output
PGND
TPS61020
Figure 21. Typical Application Circuit for Adjustable Output Voltage Option
Programming the LBI/LBO Threshold Voltage
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The
typical current into the LBI pin is 0.01 µA, and the voltage across R2 is equal to the LBI voltage threshold that is
generated on-chip, which has a value of 500 mV. The recommended value for R2 is therefore in the range of 500
kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be
calculated using Equation 3.
14
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
R1 R2 SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
V
V
BAT
LBIthreshold
1
390 k V
BAT 1
500 mV
(3)
The output of the low battery supervisor is a simple open-drain output that goes active low if the dedicated
battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with
a recommended value of 1 MΩ. If not used, the LBO pin can be left floating or tied to GND.
Inductor Selection
A boost converter normally requires two main passive components for storing energy during the conversion. A
boost inductor and a storage capacitor at the output are required. To select the boost inductor, it is
recommended to keep the possible peak inductor current below the current limit threshold of the power switch in
the chosen configuration. For example, the current limit threshold of the TPS6102x's switch is 1800 mA at an
output voltage of 5 V. The highest peak current through the inductor and the switch depends on the output load,
the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current can be done
using Equation 4:
V
OUT
I I
L
OUT V
0.8
BAT
(4)
For example, for an output current of 200 mA at 3.3 V, at least 920 mA of average current flows through the
inductor at a minimum input voltage of 0.9 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is
advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the
magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,
regulation time at load changes rises. In addition, a larger inductor increases the total system costs. With those
parameters, it is possible to calculate the value for the inductor by using Equation 5:
V
V
–V
BAT
OUT BAT
L
I ƒ V
L
OUT
(5)
Parameter f is the switching frequency and∆ IL is the ripple current in the inductor, i.e., 20% × IL. In this example,
the desired inductor has the value of 5.5 µH. With this calculated value and the calculated currents, it is possible
to choose a suitable inductor. In typical applications a 6.8 µH inductance is recommended. The device has been
optimized to operate with inductance values between 2.2 µH and 22 µH. Nevertheless operation with higher
inductance values may be possible in some applications. Detailed stability analysis is then recommended. Care
has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in
Equation 5. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major
parameter for total circuit efficiency.
The following inductor series from different suppliers have been used with the TPS6102x converters:
Table 1. List of Inductors
VENDOR
Sumida
Wurth Elektronik
EPCOS
Cooper Electronics Technologies
INDUCTOR SERIES
CDRH4D28
CDRH5D28
7447789
744042
B82462-G4
SD25
SD20
15
TPS61020, TPS61024
TPS61025, TPS61027
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
www.ti.com
Capacitor Selection
Input Capacitor
At least a 10-µF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in
parallel, placed close to the IC, is recommended.
Output Capacitor
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using Equation 6:
I
C
min
V
V
OUT
OUT
BAT
ƒ V V
OUT
(6)
Parameter f is the switching frequency and ∆V is the maximum allowed ripple.
With a chosen ripple voltage of 10 mV, a minimum capacitance of 24 µF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 7:
V
I
R
ESR
OUT
ESR
(7)
An additional ripple of 16 mV is the result of using a tantalum capacitor with a low ESR of 80 mΩ. The total ripple
is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this
example, the total ripple is 26 mV. Additional ripple is caused by load transients. This means that the output
capacitor has to completely supply the load during the charging phase of the inductor. A reasonable value of the
output capacitance depends on the speed of the load transients and the load current during the load change.
With the calculated minimum value of 24 µF and load transient considerations the recommended output
capacitance value is in a 47 to 100 µF range. For economical reasons, this is usually a tantalum capacitor.
Therefore, the control loop has been optimized for using output capacitors with an ESR of above 30 mΩ. The
minimum value for the output capacitor is 10 µF.
Small Signal Stability
When using output capacitors with lower ESR, like ceramics, the adjustable voltage version is recommended.
The missing ESR can be compensated in the feedback divider. Typically a capacitor in the range of 4.7 pF in
parallel to R3 helps to obtain small signal stability with lowest ESR output capacitors. For more detailed analysis,
the small signal transfer function of the error amplifier and the regulator, which is given in Equation 8, can be
used:
4 (R3 R4)
A
d REG
V
R4 (1 i 0.9 s)
FB
(8)
Layout Considerations
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current.
16
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
APPLICATION EXAMPLES
L1
6.8 µH
Battery
Input
SW
VOUT
C2
2.2 µF
VBAT
R1
C1
10 µF
EN
C3
100 µF
VCC 5 V
Boost Output
FB
R5
LBI
R2
PS
GND
LBO
LBO
PGND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
Figure 22. Power Supply Solution for Maximum Output Power Operating from a Single Alkaline Cell
L1
6.8 µH
Battery
Input
SW
VOUT
C2
2.2 µF
VBAT
C1
10 µF
R1
EN
C3
47 µF
VCC 5 V
Boost Output
FB
R5
LBI
R2
PS
GND
LBO
LBO
PGND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
Figure 23. Power Supply Solution for Maximum Output Power Operating from a Dual/Triple Alkaline Cell
or Single Li-Ion Cell
17
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
TPS61020
L1
SW
4.7 µH
D1
C2
VBAT
C1
Input
0.9 V to 6.5 V
VOUT
10 µF
22 µF
EN
LBI
FB
PS
LBO
C3
R1
10 nF
PGND
GND
List of Components:
U1 = TPS61020DRC
L1 = Sumida CDRH2D16-4R7
C1, C2, C3 = X7R, X5R Ceramic
D1 = White LED
Figure 24. Power Supply Solution for Powering White LED´s in Lighting Applications
TPS61020
L1
4.7 µH
Input
1.8 V to 6.5 V
C1
10 µF
SW
VOUT
C2
VBAT
22 µF
EN
LBI
FB
PS
LBO
GND
C3
22 µF
R1
1.5 MΩ
D1
R2
200 kΩ
PGND
Flashlight
Comtrol
Q1
List of Components:
U1 = TPS61020DRC
L1 = TDK VLF3010AT 4R7MR70
C1, C2, C3 = X7R, X5R Ceramic
D1 = OSRAM LWW57G
Q1 = Vishay SI1012R
Figure 25. Simple Power Supply Solution for Powering White LED Flashlights
18
TPS61020, TPS61024
TPS61025, TPS61027
www.ti.com
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
C5
VCC2 10 V
Unregulated
Auxiliary Output
DS1
C6
1 µF
0.1 µF
L1
6.8 µH
Battery
Input
SW
C2
2.2 µF
VBAT
R1
C1
10 µF
VCC1 5 V
Boost Main Output
VOUT
C3
47 µF
EN
R5
FB
LBI
R2
PS
LBO
LBO
PGND
GND
List of Components:
U1 = TPS61027DRC1
L1 = EPCOS B82462-G4682
C3, C5, C6, = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
TPS61027
Figure 26. Power Supply Solution With Auxiliary Positive Output Voltage
C5
DS1
VCC2 -5 V
Unregulated
Auxiliary Output
C6
1 µF
0.1 µF
L1
6.8 µH
Battery
Input
SW
C2
2.2 µF
VBAT
C1
10 µF
R1
VCC1 5 V
Boost Main Output
VOUT
C3
47 µF
EN
FB
LBI
R5
R2
PS
GND
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2, C5, C6 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
LBO
LBO
PGND
TPS61027
Figure 27. Power Supply Solution With Auxiliary Negative Output Voltage
19
TPS61020, TPS61024
TPS61025, TPS61027
SLVS451A – SEPTEMBER 2003 – REVISED APRIL 2004
www.ti.com
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6102x devices is 125°C. The thermal
resistance of the 10-pin QFN 3 x 3 package (DRC) is RΘJA = 48.7 °C/W, if the PowerPAD is soldered. Specified
regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power
dissipation is about 820 mW. More power can be dissipated if the maximum ambient temperature of the
application is lower.
T
T
J(MAX)
A
P
125°C 85°C 820 mW
D(MAX)
R
48.7 °CW
JA
(9)
20
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