TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 Integrated Synchronous Rectifier for Highest Power Conversion Efficiency (>95%) Start-Up Into Full Load With Supply Voltages as Low as 0.9 V, Operating Down to 0.8 V 200-mA Output Current From 0.9-V Supply Powersave-Mode for Improved Efficiency at Low Output Currents Autodischarge Allows to Discharge Output Capacitor During Shutdown Device Quiescent Current Less Than 50 µA Ease-of-Use Through Isolation of Load From Battery During Shutdown of Converter Integrated Antiringing Switch Across Inductor Integrated Low Battery Comparator Micro-Small 10-Pin MSOP Package Applications Include All Single- or Dual-Cell Battery Operated Products Like Internet Audio Players, Pager, Portable Medical Diagnostic Equipment, Remote Control, Wireless Headsets EVM Available (TPS6101xEVM-157) EN COMP FB GND VOUT 1 10 2 9 3 8 4 7 5 6 LBO LBI ADEN SW VBAT ACTUAL SIZE (3,05mm x 4,98mm) EFFICIENCY vs OUTPUT CURRENT 100 VBAT = 1.2 V, VO = 3.3 V 90 Efficiency – % (TOP VIEW) 80 70 60 0.1 1 L1 10 100 IO – Output Current – mA 1000 10 µH CIN 10 µF 7 SW 6 VBAT VOUT 5 VOUT = 3.3 V R3 R1 9 LBI R2 LBO COUT 22 µF 10 Low Battery Warning TPS61016 OFF ON 1 OFF ON 8 EN FB COMP ADEN GND 4 3 2 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 1. Typical Application Circuit for Fixed Output Voltage Option Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 description The TPS6101x devices are boost converters intended for systems that are typically operated from a single- or dual-cell nickel-cadmium (NiCd), nickel-metal hydride (NiMH), or alkaline battery. The converter output voltage can be adjusted from 1.5 V to a maximum of 3.3 V, by an external resistor divider or, is fixed internally on the chip. The devices provide an output current of 200 mA with a supply voltage of only 0.9 V. The converter starts up into a full load with a supply voltage of only 0.9 V and stays in operation with supply voltages down to 0.8 V. The converter is based on a fixed frequency, current mode, pulse-width-modulation (PWM) controller that goes automatically into power save mode at light load. It uses a built-in synchronous rectifier, so, no external Schottky diode is required and the system efficiency is improved. The current through the switch is limited to a maximum value of 1300 mA. The converter can be disabled to minimize battery drain. During shutdown, the load is completely isolated from the battery. An autodischarge function allows discharging the output capacitor during shutdown mode. This is especially useful when a microcontroller or memory is supplied, where residual voltage across the output capacitor can cause malfunction of the applications. Programming the ADEN-pin the autodischarge function can be disabled. A low-EMI mode is implemented to reduce interference and radiated electromagnetic energy when the converter enters the discontinuous conduction mode. The device is packaged in the micro-small space saving 10-pin MSOP package. AVAILABLE PACKAGE OPTIONS CODE PACKAGE 10-Pin MSOP DGS AVAILABLE OUTPUT VOLTAGE OPTIONS TA – 40 40°C C to 85 85°C C MARKING DGS PACKAGE OUTPUT VOLTAGE PART NUMBER† Adjustable from 1.5 V to 3.3 V TPS61010DGS AIP 1.5 V TPS61011DGS AIQ 1.8 V TPS61012DGS AIR 2.5 V TPS61013DGS AIS 2.8 V TPS61014DGS AIT 3.0 V TPS61015DGS AIU 3.3 V TPS61016DGS AIV † The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS61010DGSR) to order quantities of 3000 devices per reel. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 functional block diagrams fixed output voltage versions TPS61011 to TPS61016 L1 SW CIN Antiringing Comparator and Switch Bias Control _ + VOUT VBAT COUT ADEN UVLO ADEN ADEN LBI _ LBO Current Sense, Current Limit, Slope Compensation Control Logic Oscillator Gate Drive EN + Error Comparator + _ _ Error Amplifier + FB Bandgap Reference VREF GND COMP adjustable output voltage version TPS61010 L1 SW CIN Antiringing Comparator and Switch Bias Control _ + VOUT VBAT COUT ADEN UVLO ADEN ADEN LBI _ LBO Current Sense, Current Limit, Slope Compensation Control Logic Oscillator Gate Drive EN + Error Comparator + _ FB _ Error Amplifier + Bandgap Reference VREF GND POST OFFICE BOX 655303 COMP • DALLAS, TEXAS 75265 3 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION ADEN 8 I Autodischarge input. The autodischarge function is enabled if this pin is connected to VBAT, it is disabled if ADEN is tied to GND. COMP 2 I Compensation of error amplifier. Connect an R/C/C network to set frequency response of control loop. EN 1 I Chip-enable input. The converter is switched on if this pin is set high, it is switched off if this pin is connected to GND. FB 3 I Feedback input for adjustable output voltage version TPS61010. Output voltage is programmed depending on the output voltage divider connected there. For the fixed output voltage versions, leave FB-pin unconnected. GND 4 LBI 9 I Low-battery detector input. A low battery warning is generated at LBO when the voltage on LBI drops below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used. Do not leave this pin floating. LBO 10 O Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold of 500 mV. A pullup resistor must be connected between LBO and VOUT. SW 7 I Switch input pin. The inductor is connected to this pin. VOUT 5 O Output voltage. Internal resistor divider sets regulated output voltage in fixed output voltage versions. VBAT 6 I Supply pin Ground detailed description controller circuit The device is based on a current-mode control topology using a constant frequency pulse-width modulator to regulate the output voltage. The controller limits the current through the power switch on a pulse by pulse basis. The current-sensing circuit is integrated in the device, therefore, no additional components are required. Due to the nature of the boost converter topology used here, the peak switch current is the same as the peak inductor current, which will be limited by the integrated current limiting circuits under normal operating conditions. The control loop must be externally compensated with an R-C-C network connected to the COMP-pin. synchronous rectifier The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. There is no additional Schottky diode required. Because the device uses a integrated low rDS(on) PMOS switch for rectification, the power conversion efficiency reaches 95%. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and allows current flowing from the battery to the output. This device, however, uses a special circuit to disconnect the backgate diode of the high-side PMOS and so, disconnects the output circuitry from the source when the regulator is not enabled (EN = low). The benefit of this feature for the system design engineer, is that the battery is not depleted during shutdown of the converter. So, no additional effort has to be made by the system designer to ensure disconnection of the battery from the output of the converter. Therefore, design performance will be increased without additional costs and board space. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 detailed description (continued) power-save mode The TPS61010 is designed for high efficiency over a wide output current range. Even at light loads, the efficiency stays high because the switching losses of the converter are minimized by effectively reducing the switching frequency. The controller enters a powersave-mode if certain conditions are met. In this mode, the controller only switches on the transistor if the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses, and goes again into powersave-mode once the output voltage exceeds a set threshold voltage. device enable The device is shut down when EN is set to GND. In this mode, the regulator stops switching, all internal control circuitry including the low-battery comparator, is switched off, and the load is disconnected from the input (as described above in the synchronous rectifier section). This also means that the output voltage may drop below the input voltage during shutdown. The device is put into operation when EN is set high. During start-up of the converter, the duty cycle is limited in order to avoid high peak currents drawn from the battery. The limit is set internally by the current limit circuit and is proportional to the voltage on the COMP-pin. under-voltage lockout An under-voltage lockout function prevents the device from starting up if the supply voltage on VBAT is lower than approximately 0.7 V. This under-voltage lockout function is implemented in order to prevent the malfunctioning of the converter. When in operation and the battery is being discharged, the device will automatically enter the shutdown mode if the voltage on VBAT drops below approximately 0.7 V. autodischarge The autodischarge function is useful for applications where the supply voltage of a µC, µP, or memory has to be removed during shutdown in order to ensure a defined state of the system. The autodischarge function is enabled when the ADEN is set high, and is disabled when the ADEN is set to GND. When the autodischarge function is enabled, the output capacitor will be discharged after the device is shut down by setting EN to GND. The capacitors connected to the output are discharged by an integrated switch of 300 Ω, hence the discharge time depends on the total output capacitance. The residual voltage on VOUT will be less than 0.4 V after autodischarge. low-battery detector circuit (LBI and LBO) The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO-pin is high impedance. The LBO-pin goes active low when the voltage on the LBI-pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to the internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI-pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI-pin has a built-in hysteresis of 10 mV. See the application section for more details about the programming of the LBI-threshold. If the low-battery detection circuit is not used, the LBI-pin should be connected to GND (or to VBAT) and the LBO-pin can be left unconnected. Do not let the LBI-pin float. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 detailed description (continued) antiringing switch The device integrates a circuit that removes the ringing that typically appears on the SW-node when the converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and the integrated PMOS switch turns off to prevent a reverse current from the output capacitors back to the battery. Due to remaining energy that is stored in parasitic components of the semiconductors and the inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage internally to VBAT and therefore, dampens this ringing. adjustable output voltage The devices with fixed output voltages are trimmed to operate with an output voltage accuracy of ±3%. The accuracy of the adjustable version is determined by the accuracy of the internal voltage reference, the controller topology, and the accuracy of the external resistor. The reference voltage has an accuracy of ±4% over line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending on load current. This adds an offset to the output voltage that is equivalent to 1% of VO. The tolerance of the resistors in the feedback divider determine the total system accuracy. absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Input voltage range on: VBAT, VOUT, SW, EN, LBI, FB, ADEN . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 3.6 V SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V Voltage range on: LBO, COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 V Peak current into SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1300 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA <25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DGS 424 mW 3.4 mW/°C 271 mW 220 mW recommended operating conditions MIN Supply voltage at VBAT, VI 0.8 Maximum output current at VIN = 1.2 V, IO 100 Maximum output current at VIN = 2.4 V, IO 200 Inductor, L1 10 Input capacitor, Ci MAX UNIT VOUT V mA mA µH 33 µF 10 Output capacitor, Co 10 Operating virtual junction temperature, TJ 6 NOM -40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 22 47 µF 125 °C TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 electrical characteristics over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) PARAMETER VI TEST CONDITIONS Minimum input voltage for start-up start up Programmable output voltage range IO I(SW) Output voltage Maximum continuous output current Switch current limit TYP MAX 0.85 0.9 UNIT TA = 25 C IO = 100 mA TPS61010, IOUT = 100 mA TPS61011, 0.8 V < VI < VO, IO = 0 to 100 mA 1.45 1.5 1.55 TPS61012, 0.8 V < VI < VO, IO = 0 to 100 mA 1.74 1.8 1.86 TPS61013, 0.8 V < VI < VO, IO = 0 to 100 mA 2.42 2.5 2.58 V TPS61013, 1.6 V < VI < VO, IO = 0 to 200 mA 2.42 2.5 2.58 V TPS61014, 0.8 V < VI < VO, IO = 0 to 100 mA 2.72 2.8 2.88 V TPS61014, 1.6 V < VI < VO, IO = 0 to 200 mA 2.72 2.8 2.88 V TPS61015, 0.8 V < VI < VO, IO = 0 to 100 mA 2.9 3.0 3.1 V TPS61015, 1.6 V < VI < VO, IO = 0 to 200 mA 2.9 3.0 3.1 V TPS61016, 0.8 V < VI < VO, IO = 0 to 100 mA 3.2 3.3 3.4 V TPS61016, 1.6 V < VI < VO, IO = 0 to 200 mA 3.2 3.3 3.4 V RL= 3 kΩ, Input voltage once started VO MIN RL = 33 Ω 0.8 V 0.8 1.5 3.3 VI ≥ 0.8 V VI ≥ 1.8 V 100 TPS61011, once started 0.39 0.48 TPS61012, once started 0.54 0.56 TPS61013, once started 0.85 0.93 TPS61014, once started 0.95 1.01 TPS61015, once started 1 1.06 TPS61016, once started V V mA 250 A 1.07 1.13 V(FB) f Feedback voltage 480 500 520 mV Oscillator frequency 420 500 780 kHz D Maximum duty cycle 85% NMOS switch on-resistance rDS(on) VO = 1.5 15V PMOS switch on-resistance NMOS switch on-resistance rDS(on) VO = 3.3 33V PMOS switch on-resistance Line regulation (see Note 1) VIN = 1.2 V to 1.4 V, VIN = 1.2 V; Load regulation (see Note 1) IOUT = 100 mA ADEN = VBAT; LBI voltage threshold (see Note 2) V(LBI) voltage decreasing LBO output leakage current 0.54 0.2 0.37 0.3 0.45 VO = 3.3 V, 480 I(OL) = 10 µA V(LBO) = VOUT Ω 500 400 Ω 0.4 V 520 mV 10 V(LBI) = 0 V, V(LBI) = 650 mV, Ω %/V 0.1 EN = GND LBI input current LBO output low voltage 0.45 300 Residual output voltage after autodischarge LBI input hysteresis VOL 0.51 0.3 IOUT = 50 mA to 100 mA Autodischarge switch resistance VIL 0.37 mV µA 0.01 0.03 0.04 0.2 V 0.01 0.03 µA I(FB) FB input bias current (TPS61010 only) V(FB) = 500 mV 0.01 0.03 µA NOTES: 1. Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal output voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supply voltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change. 2. For proper operation the voltage at LBI may not exceed the voltage at VBAT. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 electrical characteristics over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS VIL EN and ADEN input low voltage 0.8 V < VBAT < 3.3 V VIH EN and ADEN input high voltage 0.8 V < VBAT < 3.3 V EN and ADEN input current EN and ADEN = GND or VBAT Iq Quiescent current into pins VBAT/SW and VOUT IL = 0 mA, mA Ioff Shutdown current from power source VEN = 0 V, ADEN = VBAT MIN MAX UNIT 0.2 × VBAT V 0.8 × VBAT VBAT/SW VEN = VIN TYP VOUT V 0.01 0.03 µA 31 46 µA 5 8 µA 1 5 µA PARAMETER MEASUREMENT INFORMATION L1 10 µH CIN 10 µF 7 SW 6 VBAT VOUT 5 VOUT = 3.3 V R3 R1 9 LBI R2 Low Battery Warning TPS61016 8 OFF LBO 10 COUT 22 µF List of Components: IC1: Only Fixed Output Versions (Unless Otherwise Noted) L1: SUMIDA CDRH6D38 – 100 CIN: X7R/X5R Ceramic COUT : X7R/X5R Ceramic ON 1 ADEN FB COMP EN GND 4 3 2 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 2. Circuit Used for Typical Characteristics Measurements 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS design procedure The TPS6101x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, singleor dual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6101x is used. programming the TPS61010 adjustable output voltage device The output voltage of the TPS61010 can be adjusted with an external resistor divider. The typical value of the voltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode. The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the range of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using equation 1. R3 R4 VO V FB –1 500 k VO 500 mV –1 (1) If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3. L1 10 µH CIN 10 µF 10 V 7 SW 6 VBAT VOUT 5 R5 R1 9 LBI LBO R2 FB 10 1 Cell NiMH, NiCd or Alkaline 8 VOUT = 3.3 V Low Battery Warning 3 TPS61016 1 R3 COUT 22 µF 10 V R4 EN COMP ADEN 2 GND 4 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 3. Typical Application Circuit for Adjustable Output Voltage Option The output voltage of the adjustable output voltage version changes with the output current. Due to device-internal ground shift, which is caused by the high switch current, the internal reference voltage and the voltage on the FB pin increases with increasing output current. Since the output voltage follows the voltage on the FB pin, the output voltage rises as well with a rate of 1 mV per 1-mA output current increase. Additionally, when the converter goes into pulse-skip mode at output currents around 5 mA and lower, the output voltage drops due to the hysteresis of the controller. This hysteresis is about 15 mV, measured on the FB pin. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS design procedure (continued) programming the low battery comparator threshold voltage The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 µA, the voltage across R2 is equal to the reference voltage that is generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be calculated using equation 2. R1 R2 V BAT V REF –1 500 k V BAT 500 mV –1 (2) For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery voltage of 1 V, a resistor in the range of 500 kΩ should be chosen for R1. The output of the low battery comparator is a simple open-drain output that goes active low if the battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 MΩ, and should only be pulled up to the VO. If not used, the LBO pin can be left floating or tied to GND. inductor selection A boost converter normally requires two main passive components for storing energy during the conversion. A boost inductor is required and a storage capacitor at the output. To select the boost inductor, it is recommended to keep the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. For example, the current limit threshold of the TPS61010’s switch is 1100 mA at an output voltage of 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input (VBAT), and the output voltage (VO). Estimation of the maximum average inductor current can be done using equation 3. I L I OUT VO (3) V BAT 0.8 For example, for an output current of 100 mA at 3.3 V, at least 515-mA of current flows through the inductor at a minimum input voltage of 0.8 V. The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way, regulation time at load changes will rise. In addition, a larger inductor increases the total system costs. With those parameters, it is possible to calculate the value for the inductor by using equation 4. L V BAT V OUT V BAT I L ƒ V OUT (4) Parameter ƒ is the switching frequency and ∆IL is the ripple current in the inductor, i.e., 20% × IL. In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated currents, it is possible to choose a suitable inductor. Care has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in equation 3. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS inductor selection (continued) The following inductor series from different suppliers were tested. All work with the TPS6101x converter within their specified parameters: Table 1. Recommended Inductors VENDOR RECOMMENDED INDUCTOR SERIES Sumida Sumida CDR74B Sumida CDRH74 Sumida CDRH5D18 Sumida CDRH6D38 Coilcraft Coilcraft DO 1608C Coilcraft DS 1608C Coilcraft DS 3316 Coilcraft DT D03308P Coiltronics Coiltronics UP1B Coiltronics UP2B Murata Murata LQS66C Murata LQN6C TDK TDK SLF 7045 TDK SLF 7032 capacitor selection The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by using equation 5. C min I OUT V OUT V BAT ƒ V V OUT (5) Parameter f is the switching frequency and ∆V is the maximum allowed ripple. With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using equation 6. (6) V ESR I OUT R ESR An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For example, a 10-µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs have to be made between performance and costs of the converter circuit. A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in parallel placed close to the IC is recommended. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS compensation of the control loop An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter. Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output capacitor must be compensated. The network shown in Figure 5 satisfies these requirements. COMP RC 100 kΩ CC1 10 pF CC2 10 nF Figure 4. Compensation of Control Loop Resistor RC and capacitor CC2 depend on the chosen inductance. For a 10-µH inductor, the capacitance of CC2 should be chosen to 10 nF, or in other words, if the inductor is XX µH, the chosen compensation capacitor should be XX nF, the same number value. The value of the compensation resistor is then chosen based on the requirement to have a time constant of 1 ms, for the R/C network RC and CC2, hence for a 33-nF capacitor, a 33-kΩ resistor should be chosen for RC. Capacitor CC1 depends on the ESR and capacitance value of the output capacitor, and on the value chosen for RC. Its value is calculated using equation 7. C C1 C OUT ESR COUT RC (7) For a selected output capacitor of 22 µF with an ESR of 0.2 Ω, an RC of 33 kΩ, the value of CC1 is in the range of 100 pF. Table 2. Recommended Compensation Components OUTPUT CAPACITOR INDUCTOR [µH] 12 RC [kΩ] CC1 [pF] CC2 [nF] 33 120 33 0.3 47 150 22 0.4 100 100 10 0.1 100 10 10 CAPACITANCE [µF] ESR [Ω] 33 22 0.2 22 22 10 22 10 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Maximum output current vs Input voltage for VOUT = 2.5 V, 3.3 V 5 vs Input voltage for VOUT = 1.5 V, 1.8 V 6 vs Output current for VIN = 1.2 V VOUT = 1.5 V, L1 = Sumida CDR74, 10 µH 7 vs Output current for VIN = 1.2 V VOUT = 2.5 V, L1 = Sumida CDR74, 10 µH 8 vs Output current for VIN = 1.2 V VOUT = 3.3 V, L1 = Sumida CDR74, 10 µH 9 vs Output current for VIN = 2.4 V VOUT = 3.3 V, L1 = Sumida CDR74, 10 µH 10 vs Input voltage for IOUT = 10 mA, IOUT = 100 mA, IOUT = 200 mA VOUT = 3.3 V, L1 = Sumida CDR74, 10 µH 11 TPS61016, VBAT = 1.2 V, IOUT = 100 mA Sumida CDRH6D38 – 10 µH Sumida CDRH5D18 – 10 µH Efficiency Sumida CDRH74 – 10 µH Sumida CDRH74B – 10 µH Coilcraft DS 1608C – 10 µH Coilcraft DO 1608C – 10 µH Coilcraft DO 3308P – 10 µH 12 Coilcraft DS 3316 – 10 µH Coiltronics UP1B – 10 µH Coiltronics UP2B – 10 µH Murata LQS66C – 10 µH Murata LQN6C – 10 µH TDK SLF 7045 – 10 µH TDK SLF 7032 – 10 µH vs Output current TPS61011 13 vs Output current TPS61013 14 vs Output current TPS61016 15 Minimum supply startup voltage vs Load resistance 16 No-load supply current vs Input voltage 17 Shutdown supply current vs Input voltage 18 Switch current limit vs Output voltage 19 Output voltage (ripple) in continuous mode Inductor current 20 Output voltage (ripple) in discontinuous mode Inductor current 21 Load transient response for output current step of 50 mA to 100 mA 22 Line transient response for supply voltage step from 1.08 V to 1.32 V at IOUT = 100 mA 23 Converter startup time after enable 24 Output Out ut voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 0.9 1.4 0.8 1 Maximum Output Current – A Maximum Output Voltage – A 1.2 VO = 2.5 V 0.8 VO = 3.3 V 0.6 0.4 0.2 0.7 VO = 1.8 V 0.6 0.5 VO = 1.5 V 0.4 0.3 0.2 0.1 0 0.5 1 1.5 2 VI – Input Voltage – V 2.5 0 0.5 3 1 1.5 VI – Input Voltage – V Figure 5 Figure 6 EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 VBAT = 1.2 V, VO = 1.5 V VBAT = 1.2 V, VO = 2.5 V 90 90 80 80 Efficiency – % Efficiency – % 100 70 70 60 60 50 50 40 0.1 1 10 100 1000 40 0.1 1 10 Figure 7 Figure 8 POST OFFICE BOX 655303 100 IO – Output Current – mA IO – Output Current – mA 14 2 • DALLAS, TEXAS 75265 1000 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 100 VBAT = 2.4 V, VO = 3.3 V 90 80 80 Efficiency – % 90 70 70 60 60 50 50 40 0.1 1 10 100 40 0.1 1000 1 10 100 1000 IO – Output Current – mA IO – Output Current – mA Figure 9 Figure 10 EFFICIENCY vs INPUT VOLTAGE 100 VO = 3.3 V 90 IO = 200 mA 80 Efficiency – % Efficiency – % VBAT = 1.2 V, VO = 3.3 V IO = 100 mA IO = 10 mA 70 60 50 40 0.5 1 1.5 2 2.5 VI – Input Voltage – V 3 3.5 Figure 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS EFFICIENCY vs INDUCTOR TYPE 91 VBAT = 1.2 V, VO = 3.3 V, IO = 100 mA 90 Efficiency – % 89 88 87 86 85 Inductor Type Figure 12 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLF7032 TDK SLF7045 LQN6C Murata LQS66C UP2B Coiltronics UP1B DS3316 DO3308P DO1608C Coilcraft DS1608C CDR74B CDRH74 CDRH5D18 83 Sumida CDRH6D38 84 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS TPS61011 TPS61013 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 1.75 2.75 VBAT = 1.2 V VO – Output Voltage – V VO – Output Voltage – V VBAT = 1.2 V 1.50 1.25 0.1 1 10 100 IO – Output Current – mA 2.50 2.25 0.1 1A 1 10 100 IO – Output Current – mA 1A Figure 14 Figure 13 TPS61016 OUTPUT VOLTAGE vs OUTPUT CURRENT MINIMUM STARTUP SUPPLY VOLTAGE vs LOAD RESISTANCE 3.50 1 Minimum Startup Supply Voltage – V VO – Output Voltage – V VBAT = 1.2 V 3.25 3 0.1 0.9 0.8 0.7 1 10 100 IO – Output Current – mA 1A 100 Load Resistance – Ω Figure 15 1 Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT vs INPUT VOLTAGE NO-LOAD SUPPLY CURRENT vs INPUT VOLTAGE 6 60 TA = 85°C 50 40 I CC – Shutdown Supply Current –µ A I CC – No-Load Supply Current –µ A TA = 85°C TA = 25°C TA = –40°C 30 20 10 0 0.5 1 1.5 2 2.5 VI – Input Voltage – V 3 3.5 5 4 3 2 TA = –40°C 1 TA = 25°C 0 0.5 1 1.5 2 2.5 VI – Input Voltage – V Figure 17 3 3.5 Figure 18 SWITCH CURRENT LIMIT vs OUTPUT VOLTAGE OUTPUT VOLTAGE RIPPLE IN CONTINUOUS MODE 1.2 Output Voltage 20 mV/div, AC Switch Current Limit – A 1 0.8 0.6 0.4 Inductor Current 50 mA/div, AC 0.2 0 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 VO – Output Voltage – V 3.1 3.3 0 0.5 1.5 2 2.5 Figure 20 POST OFFICE BOX 655303 3 t – Time – µs Figure 19 18 1 • DALLAS, TEXAS 75265 3.5 4 4.5 5 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE RIPPLE IN DISCONTINUOUS MODE LOAD TRANSIENT RESPONSE Output Voltage 50 mV/div, AC Output Voltage 50 mV/div, AC Output Current 50 mA/div, AC Inductor Current 50 mA/div, AC 0 0.1 0.2 0.3 0.4 0.5 0.6 t – Time – ms 0.7 0.8 0.9 1 0 1 2 3 Figure 21 4 5 6 t – Time – ms 7 8 9 10 Figure 22 CONVERTER STARTUP AFTER ENABLE LOAD TRANSIENT RESPONSE Enable, 2 V/div,DC Input Voltage 100 mV/div, AC Output Voltage, 1 V/div,DC Input Current, 200 mA/div,DC V(SW), 2 V/div,DC Output Voltage 50 mA/div, AC 0 1 2 3 4 5 6 t – Time – ms 7 8 9 10 0 1 2 3 4 5 6 t – Time – ms 7 8 9 10 Figure 24 Figure 23 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 layout considerations As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path as indicated in bold in Figure 24. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node as shown in Figure 24 to minimize the effects of ground noise. The compensation circuit and the feedback divider should be placed as close as possible to the IC. To layout the control ground, it is recommended to use short traces as well, separated from the power ground traces. Connect both grounds close to the ground pin of the IC as indicated in the layout diagram in Figure 24. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. U1 L1 SW Battery VOUT R4 C1 VBAT LBO C4 LBO R2 R1 R3 R5 LBI FB R6 ADEN COMP C2 EN GND Figure 25. Layout Diagram 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 C3 OUTPUT TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION U1 L1 SW VOUT R4 C1 VBAT Battery LBO C4 C5 LBO OUTPUT R5 FB LBI R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS6101 (1–6) C1, C4, C5 10 µF X5R Ceramic, TDK C3216X5R0J106 L1 10 µH SUMIDA CDRH5D18–100 Figure 26. 1,8 mm Maximum Height Power Supply With Single Battery Cell Input using Low Profile Components U1 IOUT ≥ 250 mA L1 SW Battery VOUT R4 C1 VBAT LBO C4 LBO OUTPUT R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS6101 (1–6) C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226 L1 10 µH SUMIDA CDRH6D38 Figure 27. 250-mA Power Supply With Two Battery Cell Input POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION U1 L1 SW Battery VOUT 3.3-V I/O Supply R4 C1 VBAT LBO U2 LDO C4 LBO R5 GND FB LBI 1.5-V Core Supply C6 R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 U2 TPS76915 C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226 L1 10 µH SUMIDA CDRH6D38 Figure 28. Dual Output Voltage Power Supply for DSPs 6-V/10-mA Aux Output DS1 C7 C6 U1 L1 SW Battery VOUT 3.3-V/100-mA Main Output R4 C1 VBAT LBO C4 LBO GND R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 DS1 BAT54S C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226, C6 1 µF X5R Ceramic, C7 0.1 µF X5R Ceramic, L1 10 µH SUMIDA CDRH6D38–100 Figure 29. Power Supply With Auxiliary Positive Output Voltage 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION C7 C6 DS1 GND –2.7-V/10-mA Aux Output U1 L1 SW Battery VOUT 3.3-V/100-mA Main Output R4 C1 VBAT LBO C4 LBO GND R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 DS1 BAT54S C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226, C6 1 µF X5R Ceramic, C7 0.1 µF X5R Ceramic, L1 10 µH SUMIDA CDRH6D38–100 Figure 30. Power Supply With Auxiliary Negative Output Voltage POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION L1 SW INPUT OUTPUT VOUT R4 C1 VBAT R5 LBO TPS6101x FB LBI R6 R1 ADEN C2 EN R3 COMP J1 J2 R2 LBO C3 GND GND Figure 31. TPS6101x EVM Circuit Diagram Figure 32. TPS6101x EVM Component Placement (actual size: 55,9 mm x 40,6 mm) 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 C4 C5 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION Figure 33. TPS6101x EVM Top Layer Layout (actual size: 55,9 mm x 40,6 mm) Figure 34. TPS6101x EVM Bottom Layer Layout (actual size: 55,9 mm x 40,6 mm) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 APPLICATION INFORMATION Other devices in this family are: PART NUMBER DESCRIPTION TPS61000/1/2/3/4/5/6/7 Nonsynchronous, high efficient single cell boost converter with start-up into full load UCC2941-3/ -5/ -ADJ UCC3941-3/ -5/ -ADJ 1-V synchronous boost converter with secondary output UCC29411/ 2/ 3 UCC39411/ 2/ 3 1-V low power synchronous boost converter with secondary output THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component. Three basic approaches for enhancing thermal performance are: Improving the power dissipation capability of the PWB design Improving the thermal coupling of the component to the PWB Introducing airflow in the system The maximum junction temperature (TJ) of the TPS6101x devices is 125°C. The thermal resistance of the 10-pin MSOP package (DSG) is RθJA = 294°C/W. Specified regulator operation is assured to a maximum ambient temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 130 mW. More power can be dissipated if the maximum ambient temperature of the application is lower. P D(MAX) 26 T J(MAX) – T A R JA 125°C 85°C 136 mW 294°CW POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 (8) TPS61010, TPS61011, TPS61012, TPS61013, TPS61014, TPS61015, TPS61016 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS SLVS314A – SEPTEMBER 2000 – REVISED NOVEMBER 2000 MECHANICAL DATA DGS (S-PDSO-G10) PLASTIC SMALL-OUTLINE PACKAGE 0,27 0,17 0,50 10 0,25 M 6 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°–6° 5 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073272/A 03/98 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. 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