Databook.fxp 1/13/99 2:09 PM Page B-53 B-53 01/99 J176, J177 P-Channel Silicon Junction Field-Effect Transistor Absolute maximum ratings at TA = 25¡C ¥ Choppers ¥ Commutators ¥ Analog Switches Reverse Gate Source & Reverse Gate Drain Voltage Continuous Forward Gate Current Continuous Device Power Dissipation Power Derating At 25°C free air temperature: J176 Static Electrical Characteristics Min Gate Source Breakdown Voltage V(BR)GSS Gate Reverse Current IGSS Gate Source Cutoff Voltage VGS(OFF) Drain Saturation Current (Pulsed) IDSS Drain Cutoff Current ID(OFF) Max 30 Min Process PJ99 Max 30 1 4 –2 0.8 1 nA VGS = 20V, VDS = ØV 2.25 V VDS = – 15V, ID = – 10 nA – 35 – 1.5 – 20 mA VDS = – 15V, VGS = ØV –1 nA VDS = – 15V, VGS = 10V Ω VGS = Ø, VDS < = 0.1V f = 1 kHz –1 Max 250 300 Typ Typ Dynamic Electrical Characteristics Test Conditions IG = 1 µA, VDS = ØV Max rds(on) Unit V 1 Dynamic Electrical Characteristics Drain Source ON Resistance J177 – 30 V 50 mA 360 mW 3.27 mW/°C Drain Gate Capacitance Cgd 5.5 5.5 pF VDS = ØV, VGS = 10V f = 1 MHz Source Gate Capacitance Cgs 5.5 5.5 pF VDS = ØV, VGS = 10V f = 1 MHz Drain Gate + Source Gate Capacitance Cgd + Cgs 32 32 pF VDS = VGS = ØV f = 1 MHz td(on) 15 20 ns Rise Time tr 20 25 ns Turn OFF Delay Time td(off) 15 20 ns Fall Time tf 20 25 ns Switching Characteristics Turn ON Delay Time TOÐ226AA Package Surface Mount Dimensions in Inches (mm) SMPJ176, SMPJ177 VDD VGS(OFF) RL VGS(ON) J176 J177 –6 6 5.6 k Ø –6 3 10 k Ø V V Ω V Pin Configuration 1 Drain, 2 Gate, 3 Source www.interfet.com 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375