Databook.fxp 1/13/99 2:09 PM Page B-18 B-18 01/99 2N5020, 2N5021 P-Channel Silicon Junction Field-Effect Transistor Absolute maximum ratings at TA = 25¡C ¥ Analog Switches Reverse Gate Source & Reverse Gate Drain Voltage Continuous Forward Gate Current Continuous Device Power Dissipation Power Derating Storage Temperature Range At 25°C free air temperature: 2N5020 Static Electrical Characteristics Min Gate Source Breakdown Voltage V(BR)GDO Gate Reverse Current IGSS Gate Source Cutoff Voltage VGS(OFF) Drain Saturation Current (Pulsed) IDSS Max 25 2N5021 Min Process PJ32 Unit 25 1.5 – 0.3 – 1.2 Test Conditions V IG = 1µA, VDS = ØV 1 nA VGS = 15V, VDS = ØV 0.5 2.5 V VDS = – 15V, ID = 1 nA –1 – 3.5 mA VDS = – 15V, VGS = ØV 1.5 6 mS VDS = – 15V, VGS = ØV 1 0.3 Max – 50 V 50 mA 500 mW 4 mW/°C – 65°C to + 200°C Dynamic Electrical Characteristics Common Source Forward Transconductance gfs Common Source Output Conductance gos 20 20 µS VDS = – 15V, VGS = ØV Common Source Input Capacitance Ciss 25 25 pF VDS = – 15V, VGS = ØV f = 1 MHz Common Source Reverse Transfer Capacitance Crss 7 7 pF VDS = – 15V, VGS = ØV f = 1 MHz 1 3.5 TOÐ18 Package Surface Mount Dimensions in Inches (mm) SMP5020, SMP5021 Pin Configuration 1 Source 1, 2 Gate & Case, 3 Drain 1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375 www.interfet.com