IRF530S, SiHF530S D FEATURES D2PAK (TO-263) • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • 175 °C Operating Temperature • Fast Switching • Ease of Paralleling • Compliant to RoHS Directive 2002/95/EC G S N-Channel MOSFET DESCRIPTION PRODUCT SUMMARY The D2PAK (TO-263) is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. VDS (V) 100 RDS(on) () VGS = 10 V 0.16 Qg (Max.) (nC) 26 Qgs (nC) 5.5 Qgd (nC) 11 Configuration Single ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free D2PAK (TO-263) SiHF530S-GE3 IRF530SPbF SiHF530S-E3 D2PAK (TO-263) SiHF530STRL-GE3a IRF530STRLPbFa SiHF530STL-E3a D2PAK (TO-263) SiHF530STRR-GE3a IRF530STRRPbFa SiHF530STR-E3a Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current SYMBOL VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e Single Pulse Avalanche Energyb Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Maximum Power Dissipation (PCB Mount)e Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) ID IDM EAS IAR EAR TC = 25 °C TA = 25 °C PD dV/dt TJ, Tstg for 10 s LIMIT 100 ± 20 14 10 56 0.59 0.025 69 14 8.8 88 3.7 5.5 - 55 to + 175 300d UNIT V A W/°C mJ A mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 °C, L = 528 μH, Rg = 25 , IAS = 14 A (see fig. 12). c. ISD 14 A, dI/dt 140 A/μs, VDD VDS, TJ 175 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). 2014-8-28 1 www.kersemi.com IRF530S, SiHF530S THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 1.7 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VDS VGS = 0, ID = 250 μA 100 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.12 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V nA IGSS IDSS RDS(on) gfs VGS = ± 20 V - - ± 100 VDS = 100 V, VGS = 0 V - - 25 VDS = 80 V, VGS = 0 V, TJ = 150 °C - - 250 - - 0.16 5.1 - - S - 670 - - 250 - - 60 - - - 26 - - 5.5 ID = 8.4 Ab VGS = 10 V VDS = 50 V, ID = 8.4 Ab μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 14 A, VDS = 80 V, see fig. 6 and 13b pF nC Gate-Drain Charge Qgd - - 11 Turn-On Delay Time td(on) - 10 - - 34 - - 23 - - 24 - - 4.5 - - 7.5 - - - 14 - - 56 - - 2.5 V - 150 280 ns - 0.85 1.7 μC Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 50 V, ID = 14 A, Rg = 12 , RD = 3.6 , see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact ns D nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 14 A, VGS = 0 Vb TJ = 25 °C, IF = 14 A, dI/dt = 100 A/μsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. 2014-8-28 2 www.kersemi.com IRF530S, SiHF530S TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 101 25 °C ID, Drain Current (A) ID, Drain Current (A) Top 4.5 V 100 175 °C 101 100 20 µs Pulse Width TC = 25 °C 10-1 100 20 µs Pulse Width VDS = 50 V 101 4 VDS, Drain-to-Source Voltage (V) 91020_01 ID, Drain Current (A) Top 101 4.5 V 100 20 µs Pulse Width TC = 175 °C 10-1 91020_02 100 101 VDS, Drain-to-Source Voltage (V) 91020_04 Fig. 2 - Typical Output Characteristics, TC = 175 °C 2014-8-28 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 6 VGS, Gate-to-Source Voltage (V) 91020_03 Fig. 1 - Typical Output Characteristics, TC = 25 °C 5 3.5 3.0 ID = 14 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60- 40 - 20 0 20 40 60 80 100 120 140 160 180 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 3 www.kersemi.com IRF530S, SiHF530S 1400 Capacitance (pF) 1200 1000 ISD, Reverse Drain Current (A) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss 800 600 Coss 400 Crss 200 175 °C 101 25 °C 100 VGS = 0 V 0 100 0.4 101 VDS, Drain-to-Source Voltage (V) 91020_05 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 1.2 2.0 1.6 Fig. 7 - Typical Source-Drain Diode Forward Voltage 103 ID = 14 A 5 VDS = 80 V 16 VDS = 50 V VDS = 20 V 12 8 4 5 10 µs 2 100 µs 10 1 ms 5 10 ms 2 1 TC = 25 °C TJ = 175 °C Single Pulse 2 0.1 0 5 10 15 20 25 0.1 QG, Total Gate Charge (nC) 91020_08 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 2014-8-28 102 5 For test circuit see figure 13 0 91020_06 Operation in this area limited by RDS(on) 2 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 20 0.8 VSD, Source-to-Drain Voltage (V) 91020_07 2 5 1 2 5 10 2 5 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area 4 www.kersemi.com IRF530S, SiHF530S RD VDS 14 VGS ID, Drain Current (A) 12 D.U.T. Rg + - VDD 10 10 V 8 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 6 Fig. 10a - Switching Time Test Circuit 4 2 VDS 0 25 50 75 100 125 150 90 % 175 TC, Case Temperature (°C) 91020_09 10 % VGS Fig. 9 - Maximum Drain Current vs. Case Temperature td(on) td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 0 - 0.5 0.2 PDM 0.1 0.1 0.05 t1 0.02 0.01 t2 Single Pulse (Thermal Response) Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-5 91020_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 2014-8-28 5 www.kersemi.com IRF530S, SiHF530S L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V 0.01 Ω tp IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 200 ID 5.7 A 9.9 A Bottom 14 A Top 160 120 80 40 0 VDD = 25 V 25 91020_12c 50 75 100 125 175 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform 2014-8-28 Fig. 13b - Gate Charge Test Circuit 6 www.kersemi.com IRF530S, SiHF530S Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop ISD Ripple ≤ 5 % Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel 2014-8-28 7 www.kersemi.com IRF530S, SiHF530S TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail “A” Rotated 90° CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. 2014-8-28 8 www.kersemi.com