2SK2796(L), 2SK2796(S) Silicon N Channel MOS FET High Speed Power Switching REJ03G1034-0500 (Previous: ADE-208-534C) Rev.5.00 Sep 07, 2005 Features • Low on-resistance RDS(on) = 0.12 Ω typ. • 4 V gate drive devices. • High speed switching Outline RENESAS Package code: PRSS0004ZD-A (Package name: DPAK(L)-(1)) RENESAS Package code: PRSS0004ZD-C (Package name: DPAK(S)) 4 4 D 1. Gate 2. Drain 3. Source 4. Drain G 1 1 2 3 Rev.5.00 Sep 07, 2005 page 1 of 8 2 3 S 2SK2796(L), 2SK2796(S) Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Symbol VDSS VGSS ID Ratings 60 ±20 5 20 5 5 2.14 20 150 –55 to +150 ID(pulse)Note1 IDR IAP Note3 EAR Note3 Pch Note2 Tch Tstg Unit V V A A A A mJ W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Zero gate voltage drain current Gate to source leak current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Note: 4. Pulse test Rev.5.00 Sep 07, 2005 page 2 of 8 Symbol V(BR)DSS V(BR)GSS IDSS IGSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF trr Min 60 ±20 — — 1.0 — — 2.5 — — — — — — — — — Typ — — — — — 0.12 0.16 4.0 180 90 30 9 25 35 55 1.0 40 Max — — 10 ±10 2.0 0.16 0.25 — — — — — — — — — — Unit V V µA µA V Ω Ω S pF pF pF ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VDS = 60 V, VGS = 0 VGS = ±16 V, VDS = 0 ID = 1 mA, VDS = 10 V ID = 3 A, VGS = 10 V Note4 ID = 3 A, VGS = 4 V Note4 ID = 3 A, VDS = 10 V Note4 VDS = 10V, VGS = 0, f = 1MHz VGS = 10 V, ID = 3 A, RL = 10 Ω IF = 5A, VGS = 0 IF = 5A, VGS = 0 diF/ dt =50 A/ µs 2SK2796(L), 2SK2796(S) Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 100 20 PW 3 1 (1 sh ot ) ) °C 5 10 20 50 100 Typical Output Characteristics Typical Transfer Characteristics 10 V 6 V 5 5V 4V 3.5 V 25°C Pulse Test Drain Current ID (A) –25°C 2 2.5 V 1 4 Tc = 75°C 3 2 1 VDS = 10 V Pulse Test VGS = 2 V 2 4 6 8 0 10 2 4 6 8 10 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 2.0 Pulse Test 1.6 1.2 0.8 ID = 5 A 0.4 2A 1A 2 4 6 8 10 Gate to Source Voltage VGS (V) Rev.5.00 Sep 07, 2005 page 3 of 8 Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) s Drain to Source Voltage VDS (V) 3 0 m Case Temperature TC (°C) 3V 0 µs s 25 Ta = 25°C 0.1 0.2 0.5 1 2 200 µs = 150 10 0 m c (T 4 100 = n io 5 50 10 1 t ra Operation in this area is limited by RDS(on) 0.3 0 Drain Current ID (A) 10 pe 10 10 30 O Drain Current ID (A) 30 C D Channel Dissipation Pch (W) 40 5 Pulse Test 2 1 0.5 VGS = 4 V 0.2 0.1 0.05 0.1 10 V 0.3 1 3 10 30 Drain Current ID (A) 100 Forward Transfer Admittance vs. Drain Current Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance RDS (on) (Ω) 2SK2796(L), 2SK2796(S) 0.5 Pulse Test 0.4 1A 2A ID = 5 A 0.3 VGS = 4 V 0.2 5A 0.1 1, 2 A 10 V 0 –40 0 40 80 120 160 25°C 2 75°C 1 0.5 0.2 0.1 0.1 VDS = 10 V Pulse Test 0.5 0.2 1 2 5 Drain Current ID (A) Body to Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 10 1000 VGS = 0 f = 1 MHz 500 Capacitance C (pF) 200 100 50 20 10 100 0.2 1 5 50 Coss Crss 0 10 10 20 30 40 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 20 ID = 5 A VDD = 10 V 25 V 50 V 16 12 VDS VGS 40 20 0 2 100 Reverse Drain Current IDR (A) 80 60 0.5 Ciss 10 8 4 VDD = 50 V 25 V 10 V 2 4 6 8 Gate Charge Qg (nc) Rev.5.00 Sep 07, 2005 page 4 of 8 0 10 50 100 Switching Time t (ns) 5 0.1 200 20 di / dt = 50 A / µs VGS = 0, Ta = 25°C Gate to Source Voltage VGS (V) Reverse Recovery Time trr (ns) Tc = –25°C 5 Case Temperature TC (°C) 500 Drain to Source Voltage VDS (V) 10 td(off) 50 tf 20 tr td(on) 10 5 VGS = 10 V, VDD = 30 V PW = 5 µs, duty < 1 % 2 1 0.1 0.2 0.5 1 2 Drain Current ID (A) 5 10 2SK2796(L), 2SK2796(S) 8 6 Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) (A) 10 Reverse Drain Current IDR Reverse Drain Current vs. Source to Drain Voltage 5V 10 V V GS = 0, –5 V 4 2 Pulse Test 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 2.5 IAP = 5 A VDD = 25 V duty < 0.1 % Rg > 50 Ω 2.0 1.5 1.0 0.5 0 25 VSD (V) 50 75 100 125 150 Channel Temperature Tch (°C) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C D=1 1 0.5 0.3 0.2 0.1 0.05 0.1 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 6.25°C/W, Tc = 25°C 0.02 e uls 1 0.0 0.03 PDM P ot D= h 1s PW T PW T 0.01 10 µ 100 µ 1m 10 m Pulse Width 100 m 10 PW (S) Avalanche Test Circuit VDS Monitor 1 Avalanche Waveform L EAR = 1 2 • L • IAP2 • VDSS VDSS – VDD IAP Monitor V(BR)DSS IAP Rg D. U. T VDS VDD ID Vin 15 V 50 Ω 0 Rev.5.00 Sep 07, 2005 page 5 of 8 VDD 2SK2796(L), 2SK2796(S) Switching Time Test Circuit Switching Time Waveforms Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vout Vin 10 V 50 Ω VDD = 30 V 10% 10% 90% td(on) Rev.5.00 Sep 07, 2005 page 6 of 8 10% tr 90% td(off) tf 2SK2796(L), 2SK2796(S) Package Dimensions RENESAS Code Package Name MASS[Typ.] PRSS0004ZD-A DPAK(L)-(1) / DPAK(L)-(1)V 0.42g 1.7 ± 0.5 JEITA Package Code 2.3 ± 0.2 0.55 ± 0.1 5.5 ± 0.5 6.5 ± 0.5 5.4 ± 0.5 Unit: mm 3.1 ± 0.5 1.15 ± 0.1 0.8 ± 0.1 2.29 ± 0.5 16.2 ± 0.5 1.2 ± 0.3 2.29 ± 0.5 RENESAS Code Package Name MASS[Typ.] SC-63 PRSS0004ZD-C DPAK(S) / DPAK(S)V 0.28g 6.5 ± 0.5 5.4 ± 0.5 (0.1) Unit: mm 2.3 ± 0.2 0.55 ± 0.1 0 – 0.25 2.5 ± 0.5 (1.2) 1.0 Max. 2.29 ± 0.5 Rev.5.00 Sep 07, 2005 page 7 of 8 (5.1) (5.1) (0.1) 1.2 Max 5.5 ± 0.5 1.5 ± 0.5 JEITA Package Code 0.55 ± 0.1 0.8 ± 0.1 2.29 ± 0.5 0.55 ± 0.1 2SK2796(L), 2SK2796(S) Ordering Information Part Name 2SK2796L-E 2SK2796STL-E Quantity 3200 pcs 3000 pcs Shipping Container Box (Sack) Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Sep 07, 2005 page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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