IRMCK099M High Performance Sensorless Motor Control IC Description IRMCK099 is a low cost, high performance OTP memory based motion control ASIC designed primarily for appliance applications. IRMCK099 is designed to implement high performance control solutions for advanced inverterized appliance motor control. IRMCK099 contains the flexible Tiny Motion Control Engine (TinyMCE) for sensorless control of permanent magnet motors over the full speed range. The TinyMCE implements sensorless Field Oriented Control using single or leg shunt current feedback by a combination of hardware and IR-supplied firmware elements. Key components of the complex sensorless control algorithms, such as the Angle Estimator, are provided as complete pre-defined control blocks. The ASIC is designed to eliminate external components and reduce cost by including an A/D converter, analog amplifiers, an overcurrent comparator, watchdog timer and internal oscillator. Strong startup and configuration tools get the motor running quickly without any programming. A standby power mode can help to increase overall system efficiency. IRMCK099 comes in a 5mmx5mm, 32 pin QFN package. Features Product Summary TinyMCE (Tiny Motion Control Engine) Dedicated computation engine for high efficiency sinusoidal sensorless motor control Internal Oscillator – no clock required Built-in hardware peripheral for single or two shunt current feedback reconstruction and analog circuits Supports both interior and surface permanent magnet motor sensorless control Loss minimization Space Vector PWM Internal ITRIP comparator Two-channel analog output (Sigma Delta D/A) JTAG programming port for debugging UART and I2C serial interface Factory Calibrated Analog Inputs Capture input Watchdog timer with independent internal clock Standby low power mode Internal 16 Kbyte OTP memory CRC Memory Check 3.3V single supply Base Part Number Package Type IRMCK099M QFN32 1 www.irf.com Internal clock frequency (SYSCLK) TM MCE computation time TM MCE computation data range OTP Memory MCE Data RAM MCE Program RAM FAULT latency (digital filtered) PWM carrier frequency A/D input channels A/D converter resolution A/D converter conversion speed Analog output (PWM) resolution UART baud rate (typ) Number of digital I/O (max) Package (lead free) Typical 3.3V operating current Standyby mode power consumption Integrated Temperature Sensor(typ) Standard Pack 100MHz 1 SYSCLK 16 bit signed 16KB 1.5KB 12KB 2 μsec 1 – 20kHz 6 12 bits 2 μsec 8 bits 57.6 Kbps 8 QFN 5x5 32L < 30mA 3.5mW ±5degC Orderable Part Number Form Quantity Tape and Reel 3000 IRMCK099MTR Tray 2450 IRMCK099M © 2014 International Rectifier December 18, 2014 IRMCK099M Table of Contents 1 OVERVIEW .................................................................................................................................................................... 5 2 PINOUT ......................................................................................................................................................................... 6 3 IRMCK099 BLOCK DIAGRAM AND MAIN FUNCTIONS .................................................................................................... 8 4 APPLICATION CONNECTION AND PIN FUNCTION .......................................................................................................... 9 4.1 4.2 4.3 4.4 4.5 5 MCE PERIPHERAL INTERFACE GROUP..................................................................................................................................... 9 MOTION PERIPHERAL INTERFACE GROUP .............................................................................................................................. 10 ANALOG INTERFACE GROUP ............................................................................................................................................... 10 POWER INTERFACE GROUP ................................................................................................................................................. 11 TEST INTERFACE GROUP .................................................................................................................................................... 11 DC CHARACTERISTICS.................................................................................................................................................. 12 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 6 ABSOLUTE MAXIMUM RATINGS .......................................................................................................................................... 12 SYSTEM CLOCK FREQUENCY AND POWER CONSUMPTION ......................................................................................................... 12 DIGITAL I/O DC CHARACTERISTICS ...................................................................................................................................... 13 ANALOG I/O DC CHARACTERISTICS...................................................................................................................................... 14 A/D ACCURACY AND LINEARITY........................................................................................................................................... 14 UNDER VOLTAGE LOCKOUT DC CHARACTERISTICS ................................................................................................................... 15 ITRIP COMPARATOR DC CHARACTERISTICS ............................................................................................................................. 15 WAKE-UP THRESHOLD DC CHARACTERISTICS .......................................................................................................................... 15 INTEGRATED TEMPERATURE SENSOR .................................................................................................................................... 15 AC CHARACTERISTICS .................................................................................................................................................. 16 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 INTERNAL OSCILLATOR AC CHARACTERISTICS ......................................................................................................................... 16 ANALOG TO DIGITAL CONVERTER AC CHARACTERISTICS ........................................................................................................... 16 OP AMP AC CHARACTERISTICS ............................................................................................................................................ 17 SYNC TO SVPWM AND A/D CONVERSION AC TIMING .......................................................................................................... 18 FAULT TO SVPWM AC TIMING ........................................................................................................................................ 19 ITRIP AC TIMING............................................................................................................................................................. 19 2 I C AC TIMING ................................................................................................................................................................ 20 UART AC TIMING ............................................................................................................................................................ 21 CAPTURE INPUT AC TIMING ............................................................................................................................................. 22 JTAG AC TIMING ......................................................................................................................................................... 23 7 I/O STRUCTURE........................................................................................................................................................... 24 8 PIN LIST ....................................................................................................................................................................... 26 9 PACKAGE DIMENSIONS ............................................................................................................................................... 27 10 PART MARKING INFORMATION ............................................................................................................................... 28 11 QUALIFICATION INFORMATION............................................................................................................................... 28 2 www.irf.com © 2014 International Rectifier December 18, 2014 IRMCK099M List of Tables TABLE 1 REMAP FUNCTIONS AVAILABLE ON GPIO ..................................................................................................................... 7 TABLE 2. ABSOLUTE MAXIMUM RATINGS.................................................................................................................................. 12 TABLE 3. SYSTEM CLOCK FREQUENCY AND POWER CONSUMPTION ...................................................................................... 12 TABLE 4. DIGITAL I/O DC CHARACTERISTICS .......................................................................................................................... 13 TABLE 5. ANALOG I/O DC CHARACTERISTICS.......................................................................................................................... 14 TABLE 6. UVCC 3.3V DC CHARACTERISTICS .......................................................................................................................... 15 TABLE 7. ITRIP DC CHARACTERISTICS ..................................................................................................................................... 15 TABLE 8. W AKE-UP THRESHOLD DC CHARACTERISTICS ......................................................................................................... 15 TABLE 9. INTERNAL OSCILLATOR AC CHARACTERISTICS ........................................................................................................ 16 TABLE 10.A/D CONVERTER AC CHARACTERISTICS ................................................................................................................ 16 TABLE 11 CURRENT SENSING OP AMP AC CHARACTERISTICS .............................................................................................. 17 TABLE 12. SYNC AC CHARACTERISTICS ................................................................................................................................ 18 TABLE 13. FAULT TO SVPWM AC TIMING............................................................................................................................. 19 TABLE 14. ITRIP AC TIMING ...................................................................................................................................................... 19 2 TABLE 15. I C AC TIMING ......................................................................................................................................................... 20 TABLE 16. UART AC TIMING.................................................................................................................................................... 21 TABLE 17. CAPTURE AC TIMING ........................................................................................................................................... 22 TABLE 18. JTAG AC TIMING .................................................................................................................................................... 23 TABLE 19. PIN LIST ................................................................................................................................................................... 26 3 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M List of Figures FIGURE 1. TYPICAL APPLICATION BLOCK DIAGRAM USING IRMCK099 ................................................................................... 5 FIGURE 2. PINOUT OF IRMCK099 ............................................................................................................................................. 6 FIGURE 3. IRMCK099 BLOCK DIAGRAM.................................................................................................................................... 8 FIGURE 4. IRMCK099 LEG SHUNT CONNECTION DIAGRAM ..................................................................................................... 9 FIGURE 5. VOLTAGE DROOP AND S/H HOLD TIME .................................................................................................................... 16 FIGURE 6. OP AMP OUTPUT CAPACITOR ................................................................................................................................... 17 FIGURE 7. SYNC TIMING........................................................................................................................................................... 18 FIGURE 8. FAULT TIMING ........................................................................................................................................................... 19 FIGURE 9. ITRIP TIMING ........................................................................................................................................................... 19 2 FIGURE 10. I C TIMING ............................................................................................................................................................. 20 FIGURE 11. UART TIMING......................................................................................................................................................... 21 FIGURE 12. CAPTURE TIMING ................................................................................................................................................ 22 FIGURE 13. JTAG TIMING ......................................................................................................................................................... 23 FIGURE 14. DIGITAL I/O STRUCTURE ....................................................................................................................................... 24 FIGURE 15. ANALOG I/O STRUCTURE ...................................................................................................................................... 24 FIGURE 16 ANALOG ANALOG INPUT STRUCTURE FOR AIN0/STBY ....................................................................................... 24 FIGURE 17. VSS PIN I/O STRUCTURE....................................................................................................................................... 25 FIGURE 18. VDDCAP PIN I/O STRUCTURE .............................................................................................................................. 25 FIGURE 19. VDD1 PIN I/O STRUCTURE .................................................................................................................................... 25 4 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 1 Overview IRMCK099 is a new generation International Rectifier integrated circuit device primarily designed as a one-chip solution for inverterized appliance motor control applications. Unlike a traditional microcontroller or DSP, the IRMCK099 provides a built-in closed loop sensorless control algorithm using the unique flexible Tiny Motion TM Control Engine (TinyMCE) for permanent magnet motors. The MCE consists of a collection of control elements, motion peripherals, a dedicated motion control sequencer and internal memory to map internal signal nodes. IRMCK099 also employs a unique single shunt current reconstruction circuit in addition to two leg shunt current sensing circuit to eliminate additional analog/digital circuitry. Integrated op-amps and A/D converter enable a direct shunt resistor interface to the IC. Four analog inputs and up to eight digital I/O provide resources for application specific functions. Figure 1 shows a typical application schematic using the IRMCK099. IRMCK099 contains 16 Kbytes of OTP program memory and comes in a compact 5mm x 5mm 32-pin QFN package. Host Communication (RS232C) Appliance PM motor Drive Galvanic isolation 15V Passive EMI Fillter PM motor IPM or SPM Gate signal Gate Drive IRMCK099 Power Supply 3.3V Optional EEPROM Digital I/O Analog Input 2 8 5 Figure 1. Typical Application Block Diagram Using IRMCK099 5 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M TDO/GPIO14/GPIO15 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 2 Pinout 32 31 30 29 28 27 26 25 TDI/GPIO14/GPIO15 1 24 GPIO0 TCK 2 23 GPIO13 TMS/GPIO14 3 22 GPIO12 AIN3 4 AIN2 5 AIN1/VBUS 6 19 GPIO9 AIN0/VSP 7 18 GPIO8 IFB2O 8 17 VSS IRMCK099 21 GPIO11 20 GPIO10 14 15 16 VPP IFB1- 13 VDD1 12 VDDCAP 11 IFB1+ 10 IFB1O IFB2- 9 IFB2+ (Top View) Figure 2. Pinout of IRMCK099 6 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M Pin Number Pin Name Main Function (After Reset) (1) 1 TDI/GPIO14/GPIO15 TDI TMS/GPIO14 TMS 3 18 GPIO8 19 GPIO9 20 GPIO10 21 GPIO11 22 GPIO12 23 GPIO13 24 GPIO0 GATEKILL PWMUL PWMUH PWMVL PWMVH PWMWL PWMWH AOPWM0 AOPWM1 RXD TXD SDA SCL CAPTURE (1) 25 GPIO1 26 GPIO2 27 GPIO3 28 GPIO4 29 GPIO5 30 GPIO6 31 GPIO7 32 TDO/GPIO14/GPIO15 Remap(1) (2) TDO Table 1 Remap functions available on GPIO Note (1)-Function availability depends on the provided firmware and for more information refer to the Application pin out section of the IRMCK099 application guide. Note (2)-Only one pin can be remapped to one of the provided functions at the same time, for more information refer to the Application pin out section of the IRMCK099 application guide. 7 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 3 IRMCK099 Block Diagram and Main Functions IRMCK099 block diagram for leg shunt mode is shown in Figure 3. 100 MHz Internal Oscillator I2C SCL SDA UART RXD TXD Motion Hardware Accelerators AOPWM0 D/A AOPWM1 CAP Capture 8 GPIO Ports Emulator Debugger 4 JTAG 16-bit Motion Control Bus 6 Motion Control Sequencer PWM Outputs Motion Peripherals GATEKILL IFB1 3 IFB2 3 AIN0/VSP Analog Interface AIN1/VBUS To gate drive Overcurrent Protection From shunt resistor(s) Analog Input AIN2 AIN3 MCE Program RAM 6kbyte A/D Converter Watchdog Timer Data RAM 1.5kbyte Temperature Sensing OTP Memory Tiny Motion Control Engine (TinyMCE) Figure 3. IRMCK099 Block Diagram IRMCK099 contains the following functions for sensorless permanent magnet motor control applications: Tiny Motion Control Engine (TinyMCE) Sensorless FOC (complete sensorless field oriented control) o PI Speed Regulator o 2-channel PI Current regulators (q & d quadratures) o Angle estimator (sensorless control) o Clark/Inverse Clark transformation o Vector rotator o No parking o Torque at low to zero speed o Multiply-divide (signed and unsigned) o Divide (signed and unsigned) o ATAN (arc tangent) Hardware PWM shutdown pin (GK) Up to 20kHz PWM Frequency 8 www.irf.com One 16 bit watchdog timer One 16 bit capture timer Up to 8 discrete digital I/Os Six-channel 12 bit A/D o Buffered (current sensing) two channels (0 – 1.2V input) o Unbuffered four channels (0 – 1.2V input) JTAG port (4 pins) Two channels analog output (8 bit PWM) UART 2 I C port Standby Low Power Mode 1.5K byte data RAM 12K byte program RAM 16K byte OTP memory © 2014International Rectifier December 18, 2014 IRMCK099M 4 Application connection and Pin function Figure 4 shows the application connections in leg shunt mode. PWMUH Internal Oscillator Host Microcontroller (RS232C) TXD RXD SDA Serial EEPROM (I2C) SCL System clock PWMUL FOC Block PWMVH Low Loss Space Vector PWM RS232C IC Current Sensing Logic Motion Control Sequencer GPIO3 GPIO PORT IR High Voltage Gate Drive IC AVREF GPIO5 GATEKILL Angle Estimator GPIO2 GPIO4 PWMWL Fault Detection 2 GPIO1 Digital I/O Control PWMVL PWMWH GPIO6 GPIO7 IFB1+ S/H GPIO8 IFB1- AOPWM0 MCE Memory (12kByte) PWM0 Analog Output AOPWM1 TDI TMS TDO 12bit A/D & MUX PWM1 Data RAM (1.5kByte) TCLK JTAG Control (OTP programming & Emulation) +1.8V IFB1O JTAG Interface IFB0+ S/H IFB0IFBV0 Temperature sensing Motor AIN3 AIN2 AIN1 OTP Programming Voltage (6.5V) VPP 3.3V RESET OTP Memory (16kByte) AIN0 System Reset Standby Mode Undervoltage Lockout VDD1 Watchdog Timer Enable/ Disable 0.3V Analog/Digital Core voltage 3.3V 3.3V VSS 1.8V Voltage Regulator VDDCAP 1.8V IRMCK099 Figure 4. IRMCK099 Leg Shunt Connection Diagram 4.1 MCE Peripheral Interface Group UART Interface TXD RXD Output, Transmit data from IRMCK099, can be configured to GPIO pins Input, Receive data to IRMCK099, can be configured to GPIO pins Discrete I/O Interface GPIO0 - GPIO15 Digital Input/Output Ports 9 www.irf.com © 2014 International Rectifier December 18, 2014 IRMCK099M Analog Output Interface AOPWM1 Input/output, can be configured as 8-bit PWM output 1 with programmable carrier frequency AOPWM2 Input/output, can be configured as 8-bit PWM output 2 with programmable carrier frequency 2 I C Interface SCL SDA Output, I C clock output, can be configured to GPIO pins 2 Input/output, I C Data line, can be configured to GPIO pins Capture Interface CAP Capture Input, can be configured to GPIO pins 4.2 Motion Peripheral Interface Group PWM PWMUH PWMUL PWMVH PWMVL PWMWH PWMWL GATEKILL GK 4.3 2 Output, PWM phase U high side gate signal, tri-state at power up until configured by firmware Output, PWM phase U low side gate signal, tri-state at power up until configured by firmware Output, PWM phase V high side gate signal, tri-state at power up until configured by firmware Output, PWM phase V low side gate signal, tri-state at power up until configured by firmware Output, PWM phase W high side gate signal, tri-state at power up until configured by firmware Output, PWM phase W low side gate signal, tri-state at power up until configured by firmware Input, upon assertion this sets all six PWM signals to off state according to setting of active_pol register, pulled up by 49kOhm internal resistor Analog Interface Group IFB1+ IFB1O Input, Operational amplifier positive input for single or leg shunt resistor current sensing Input, Operational amplifier negative input for single or leg shunt resistor current sensing Output, Operational amplifier output for single or leg shunt resistor current sensing IFB2+ IFB2IFB2O Input, Operational amplifier positive input for 2 leg shunt resistor current sensing nd Input, Operational amplifier negative input for 2 leg shunt resistor current sensing nd Output, Operational amplifier output for 2 leg shunt resistor current sensing AIN0/VSP AIN1/VBUS AIN2 AIN3 Input, Analog input channel 0 (0 – 1.2 V), also used for Standby Mode wake-up Input, Analog input channel 1 (0 – 1.2 V), typically configured for DC bus voltage input Input, Analog input channel 2 (0 – 1.2 V), needs to be pulled down to VSS if unused Input, Analog input channel 3 (0 – 1.2 V), needs to be pulled down to VSS if unused IFB1- 10 www.irf.com nd © 2014International Rectifier December 18, 2014 IRMCK099M 4.4 Power Interface Group VDD1 VDDCAP VSS 4.5 Digital and analog power (3.3V) Internal 1.8V output, require capacitors connected to the pin. Note: The internal 1.8V supply is not designed to power any external circuits or devices. Only capacitors should be connected to this pin. Digital and Analog common Test Interface Group TMS TDO TDI TCK 11 JTAG test mode input or input digital port JTAG data output JTAG data input, or input digital port JTAG test clock www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 5 DC Characteristics 5.1 Absolute Maximum Ratings Symbol VDD1 VIA VID TA TS Parameter Supply Voltage Analog Input Voltage Digital Input Voltage Ambient Temperature Storage Temperature Min Typ Max -0.3 V 3.6 V -0.3 V 1.98 V -0.3 V 3.6 V -40 ˚C 125 ˚C -65 ˚C 150 ˚C Table 2. Absolute Maximum Ratings Condition Respect to VSS Respect to VSS Respect to VSS Caution: Stresses beyond those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and function of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. 5.2 System Clock Frequency and Power Consumption VDD1=3.3V, Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max Unit MHz SYSCLK System Clock 100 1) mW PD Power Consumption 100 Standby Power mW PSTBY 3.5 Consumption Table 3. System Clock Frequency and Power Consumption Note 1) The value is based on the condition of MCE clock=100MHz with an actual motor running by a typical TinyMCE application program. 12 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 5.3 Digital I/O DC Characteristics Symbol VDD1 VIL VIH CIN IL IOL IOH Parameter Supply Voltage Input Low Voltage Input High Voltage Input capacitance Input leakage current Low level output current High level output current Min 3.0 V 2.0 V - Typ 3.3 V - Condition Recommended Recommended Recommended 14.1mA 1.6 pF ±10 nA 22.9mA Max 3.6 V 0.8 V ±1 μA 31.8mA 21.8mA 44.2mA 73.5mA VOH = 2.4 V (1) VO = 3.3 V or 0 V VOL = 0.4 V (1) (1) Table 4. Digital I/O DC Characteristics Note: (1) Data guaranteed by design. 13 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 5.4 Analog I/O DC Characteristics - OP amps for current sensing (IFB1+,IFB1-,IFB1O, IFB2+,IFB2-,IFB2O) VDD1=3.3V, Unless specified, Ta = 25˚C. Symbol Parameter VOFFSET Input Offset Voltage VI Input Voltage Range VOUTSW OP amp output operating range CIN Input capacitance RFDBK OP amp feedback resistor OP GAINCL Min -20mV 0V 50 mV Typ 3mV - Max 20mV 1.25 V 1.7 V 5 k 3.6 pF - 20 k (1) Operating Open loop 80 db Gain Common Mode 80 db Rejection Ratio Op amp output source 1 mA current Op amp output sink 100 μA current Table 5. Analog I/O DC Characteristics CMRR ISRC ISNK Condition VVDD1 = 3.3 V Recommended VVDD1 = 3.3 V Requested between IFBO and IFB(1) (1) VOUT = 0.6 V VOUT = 0.6 V Note: (1) Data guaranteed by design. 5.5 A/D Accuracy and Linearity Unless specified, Ta = 25˚C. A/D accuracy for current sensing (IFB1+,IFB1-,IFB1O, IFB2+,IFB2-,IFB2O), Vdc (AIN1) sensing and analog input channels (AIN0,AIN2, AIN3) Symbol ADCerror ADCINL ADCDNL Parameter Error is the difference between ideal counts and compensated counts for any applied voltage in 0-1.2V range Integral Non Linearity Differential Non Linearity Min 0 Typ ±10Counts Max ±20counts ±4 counts ±1.4 counts Condition (1) (1) (2) (1) (2) Full 12bit range Full 12bit range Table 5. A/D Accuracy Note: (1) Characterization only (2) The value is based on the condition of MCE clock=100MHz with an actual motor running by a typical TinyMCE application program. 14 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 5.6 Under Voltage Lockout DC characteristics Unless specified, Ta = 25˚C. Symbol Parameter UVCC3.3+ UVcc positive going Threshold UVCC3.3UVcc negative going Threshold UVCC3.3H UVcc Hysteresys Min 2.55V Typ 2.78V Max 3.00V 2.40V 2.65V 2.85V 100mV Table 6. UVcc 3.3V DC Characteristics Condition (1) Note: (1) Data guaranteed by design. 5.7 Itrip comparator DC characteristics Unless specified, VDD1=3.3V, Ta = 25˚C. Symbol Parameter Min Typ Max Itrip+ Itrip positive going 1.282V 1.342V 1.402V Threshold ItripItrip negative going 1.05V 1.124V 1.25V Threshold ItripH Itrip Hysteresys 0.05V 0.218V 0.3V Table 7. Itrip DC Characteristics Note: (1) Data guaranteed by design. (2) Characterization only. 5.8 (1) Wake-up threshold DC characteristics Unless specified, VDD1=3.3V, Ta = 25˚C. Symbol Parameter Min Typ Max VWK Exit from Standby 0.285V 0.315V 0.345V Threshold Table 8. Wake-up threshold DC Characteristics 5.9 Condition VDD1 = 3.3 V, (2) Ta=0-85C VDD1 = 3.3 V Condition VDD1 = 3.3 V Integrated Temperature Sensor Unless specified, VDD1=3.3V Symbol Parameter Tsense Integrated Tsense Error Min - Typ ±5˚C Max - Condition VDD1 = 3.3 V Ta = - 40˚C, 25˚C, 125˚C Table 8. Wake-up threshold DC Characteristics 15 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6 AC Characteristics 6.1 Internal Oscillator AC Characteristics Unless specified, Ta = 25˚C. VDD1 = 3.3V Symbol Parameter FCLK Clock Frequency Min 99MHz (1) 95.8MHz Typ 100.0MHz Max 101MHz (1) 104.4MHz Condition Ta=-40C – 125C Note: (1) Characterization only Table 9. Internal Oscillator AC Characteristics 6.2 Analog to Digital Converter AC Characteristics Unless specified, Ta = 25˚C. Symbol Parameter TCONV Conversion time THOLD Sample/Hold maximum hold time Min - Typ - Max 2.05 μsec 10 μsec Condition (1) Voltage droop ≤ 15 LSB (see figure below) Table 10.A/D Converter AC Characteristics Note: (1) Data guaranteed by design. Input Voltage Voltage droop S/H Voltage tSAMPLE THOLD Figure 5. Voltage droop and S/H hold time 16 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.3 Op amp AC Characteristics Unless specified, Ta = 25˚C. Symbol Parameter OPSR OP amp slew rate OPIMP TSET OP input impedance Settling time Min - Typ 10 V/μsec Max - - 10 Ω 400 ns 8 - Condition VDD1 = 3.3 V, CL (1) = 33 pF (1) (2) VDD1 = 3.3 V, CL (1) = 33 pF Table 11 Current Sensing OP Amp AC Characteristics Note: (1) Data guaranteed by design. (2) To guarantee stability of the operational amplifier, it is recommended to load the output pin by a capacitor of 100pF, see Figure 6. Here only the single shunt current amplifier is shown but all op amp outputs should be loaded with this capacitor value. IRMCK099 IC AVREF External components IFB+ IFBIFBO 100pF Figure 6. Op amp output capacitor 17 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.4 SYNC to SVPWM and A/D Conversion AC Timing twSYNC SYNC tdSYNC1 IU,IV,IW tdSYNC2 AINx tdSYNC3 PWMUx,PWMVx,PWMWx Figure 7. SYNC timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max twSYNC SYNC pulse width 32 tdSYNC1 SYNC to current feedback 100 conversion time tdSYNC2 SYNC to AIN0-3 200 tdSYNC3 SYNC to PWM output delay 2 time Table 12. SYNC AC Characteristics Unit SYSCLK (1) Note: (1) Characterization only 18 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.5 FAULT to SVPWM AC Timing twGK GATEKILL tdGK PWMUx,PWMVx,PWMWx Figure 8. Fault timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ Max twGK FAULT pulse width 32 tdGK FAULT to PWM output 100 delay Table 13. FAULT to SVPWM AC Timing 6.6 Unit SYSCLK SYSCLK ITRIP AC Timing Itrip TdITRIP = tITRIP + gatekill_const_1 *10 ns PWMUH,PWMUL, PWMVH,PWMVH, PWMWH,PWMWL Figure 9. ITRIP timing Unless specified, Ta = 25˚C. Symbol Parameter tITRIP Itrip propagation delay Min Typ 470ns Table 14. Itrip AC Timing Max - Unit (1) ns Note: (1) Characterization only 19 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.7 I2C AC Timing TI2CLK TI2CLK SCL tI2ST1 tI2WSETUP tI2WHOLD tI2RSETUP tI2EN1 tI2RHOLD tI2ST2 tI2EN2 SDA 2 Figure 10. I C Timing Unless specified, Ta = 25˚C. Symbol Parameter 2 TI2CLK I C clock period 2 tI2ST1 I C SDA start time 2 tI2ST2 I C SCL start time 2 tI2WSETUP I C write setup time 2 tI2WHOLD I C write hold time 2 tI2RSETUP I C read setup time 2 tI2RHOLD I C read hold time Min Typ 10 0.25 0.25 0.25 0.25 2 (1) I C filter time 1 2 Table 15. I C AC Timing Max - Unit SYSCLK TI2CLK TI2CLK TI2CLK TI2CLK SYSCLK SYSCLK Note: 2 2 (1) I C read setup time is determined by the programmable filter time applied to I C communication. 20 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.8 UART AC Timing TBAUD TXD Data and Parity Bit Start Bit Stop Bit RXD TUARTFIL Figure 11. UART timing Unless specified, Ta = 25˚C. Symbol Parameter TBAUD Baud Rate Period TUARTFIL UART sampling filter (1) period Min - Typ 57600 1/16 Max - Unit bit/sec TBAUD Table 16. UART AC Timing Note: (1) Each bit including start and stop bit is sampled three times at center of a bit at an interval of 1/16 T BAUD. If three sampled values do not agree, then UART noise error is generated. 21 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 6.9 CAPTURE Input AC Timing TCAPCLK tCAPHIGH P1.4/CAP tCAPLOW tCRDELAY CREV(H,L) Internal register tCLDELAY CLAST(H,L) Internal register tINTDELAY Interrupt Vector Fetch Interrupt Figure 12. CAPTURE timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ TCAPCLK CAPTURE input period 8 tCAPHIGH CAPTURE input high time 4 tCAPLOW CAPTURE input low time 4 tCRDELAY CAPTURE falling edge to capture register latch time tCLDELAY CAPTURE rising edge to capture register latch time tINTDELAY CAPTURE input interrupt latency time Table 17. CAPTURE AC Timing 22 www.irf.com Max 4 Unit SYSCLK SYSCLK SYSCLK SYSCLK 4 SYSCLK 4 SYSCLK © 2014International Rectifier December 18, 2014 IRMCK099M 6.10 JTAG AC Timing 1/fJCLK TCK tJHIGH tJLOW tCO TDO tJSETUP tJHOLD TDI/TMS Figure 13. JTAG timing Unless specified, Ta = 25˚C. Symbol Parameter Min Typ fJCLK TCK Frequency tJHIGH TCK High Period 10 tJLOW TCK Low Period 10 tCO TCK to TDO propagation delay 0 time tJSETUP TDI/TMS setup time 4 tJHOLD TDI/TMS hold time 0 Table 18. JTAG AC Timing 23 www.irf.com Max 10 5 Unit MHz nsec nsec nsec - nsec nsec © 2014International Rectifier December 18, 2014 IRMCK099M 7 I/O Structure The following figure shows the I/O structure for all digital pins. At power up, the programmable pull up transistor is off. VDD1 (3.3V) 49k Digital I/O PIN VSS Figure 14. Digital I/O Structure The following figure shows the analog input/output structure, except for AIN0/STBY. VDDCAP(1.8V) Analog I/O PIN 200 Analog Circuit AVSS Figure 15. Analog I/O Structure The following figure shows all the input structure for AIN0/STBY pin. AIN0/STBY PIN 200 Analog Circuit AVSS Figure 16 Analog Analog Input Structure for AIN0/STBY 24 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M The following figure shows the VSS pin I/O structure VDD1 PIN Figure 17. VSS pin I/O structure The following figure shows the,VDDCAP pin I/O structure PIN VSS Figure 18. VDDCAP pin I/O structure The following figure shows the,VDD1 pin I/O structure PIN VSS Figure 19. VDD1 pin I/O structure 25 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 8 Pin List Pin Number 1 Pin Name TDI/GPIO14/GPIO15 Internal Pull-up (1) 49 KΩ pull up 2 3 TCK TMS/GPIO14 49 KΩ pull up (1) 49 KΩ pull up 4 AIN3 I 5 AIN2 I 6 AIN1/VBUS I 7 AIN0/STBY I 8 IFB2O O 9 IFB2- I 10 IFB2+ I 11 IFB1O O 12 IFB1- I 13 IFB1+ I 14 VDDCAP P 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 VDD1 VPP VSS GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 TDO/GPIO14/GPIO15 (1) Programmable internal pull up 26 (1) (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up (1) 49 KΩ pull up Pin Type I I I/O P P P I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O Description JTAG test data input or Discrete programmable I/O JTAG test clock JTAG test mode input or Discrete programmable I/O Analog input channel 3, 0-1.2V range, needs to be pulled down to VSS if unused Analog input channel 2, 0-1.2V range, needs to be pulled down to VSS if unused Analog input channel 1, 0-1.2V range, used for DC Bus Voltage Input Analog input channel 0, 0-1.2V range, exit standby if >300mV nd Operational amplifier output for 2 leg shunt resistor current sensing nd Operational amplifier negative input for 2 leg shunt resistor current sensing nd Operational amplifier positive input for 2 leg shunt resistor current sensing Operational amplifier output for single or leg shunt resistor current sensing Operational amplifier negative input for single or leg shunt resistor current sensing Operational amplifier positive input for single or leg shunt resistor current sensing Internal 1.8V output, Capacitor(s) to be connected 3.3V digital and analog power OTP Programming voltage (6.75V) Digital common Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O JTAG test data output or Discrete programmable I/O Table 19. Pin List www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 9 Package Dimensions 27 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M 10 Part Marking Information 11 Qualification Information †† Qualification Level Industrial (per JEDEC JESD47) Moisture Sensitivity Level MSL2 (per IPC/JEDEC J-STD-020) ††† Machine Model Class B (per JEDEC standard JESD22-A115) Human Body Model Class 2 (per ANSI/ESDA/JEDEC JS-001) Charged Device Model Class C2 (per JEDEC standard JESD22-C101) Latch-Up Class I, Level B (per JEDEC standard JESD78) ESD RoHS Compliant Yes † Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ †† Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. 28 www.irf.com © 2014International Rectifier December 18, 2014 IRMCK099M Revision History Data and Specifications are subject to change without notice IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information 29 www.irf.com © 2014International Rectifier December 18, 2014