CLA30E1200NPZ

CLA30E1200NPZ
High Efficiency Thyristor
VRRM
=
1200 V
I TAV
=
30 A
VT
=
1,27 V
Two Quadrants Operation QI & QII
Single Thyristor with two gate polarities
Part number
CLA30E1200NPZ
Backside: anode
Three Quadrants Operation
T2
Positive Half Cycle
+
(-) IGT
(+) IGT
T1
REF
IGT -
T2
T2
4
T1
QII QI
QIII QIV
REF
1
± IGT
+ IGT
3
(-) IGT
T1
REF
Negative Half Cycle
Note: All Polarities are referenced to T1
Features / Advantages:
Applications:
Package: TO-263 (D2Pak-HV)
● Thyristor for line frequency
● Planar passivated chip
● Long-term stability
● Two gate current polarities usable
- positive -> quadrant I
- negative -> quadrant II
● Thyristor can be used as Triac
- anti-parallel combination with AGT
- Anode-Gated-Thyristor covers quadrant III
- AGT-counterpart: CLB30I1200PZ
● Line rectifying 50/60 Hz
● Softstart AC motor control
● DC Motor control
● Power converter
● AC power control
● Lighting and temperature control
● Industry standard outline
● RoHS compliant
● Epoxy meets UL 94V-0
Terms Conditions of usage:
The data contained in this product data sheet is exclusively intended for technically trained staff. The user will have to evaluate the suitability of the product for the intended application and
the completeness of the product data with respect to his application. The specifications of our components may not be considered as an assurance of component characteristics. The
information in the valid application- and assembly notes must be considered. Should you require product information in excess of the data given in this product data sheet or which concerns
the specific application of your product, please contact the sales office, which is responsible for you.
Due to technical requirements our product may contain dangerous substances. For information on the types in question please contact the sales office, which is responsible for you.
Should you intend to use the product in aviation, in health or live endangering or life support applications, please notify. For any such application we urgently recommend
- to perform joint risk and quality assessments;
- the conclusion of quality agreements;
- to establish joint measures of an ongoing product survey, and that we may make delivery dependent on the realization of any such measures.
IXYS reserves the right to change limits, conditions and dimensions.
© 2015 IXYS all rights reserved
Data according to IEC 60747and per semiconductor unless otherwise specified
20150827b
CLA30E1200NPZ
Ratings
Thyristor
Conditions
Symbol
VRSM/DSM
Definition
max. non-repetitive reverse/forward blocking voltage
TVJ = 25°C
VRRM/DRM
max. repetitive reverse/forward blocking voltage
TVJ = 25°C
1200
I R/D
reverse current, drain current
VT
forward voltage drop
TVJ = 25°C
10
µA
2
mA
TVJ = 25°C
1,30
V
1,59
V
1,27
V
IT =
30 A
IT =
60 A
IT =
30 A
IT =
60 A
I T(RMS)
RMS forward current
180° sine
VT0
threshold voltage
rT
slope resistance
R thJC
thermal resistance junction to case
TVJ = 125 °C
for power loss calculation only
thermal resistance case to heatsink
total power dissipation
I TSM
max. forward surge current
value for fusing
V
TVJ = 125°C
TC = 115 °C
RthCH
max. Unit
1300
V
VR/D = 1200 V
average forward current
Ptot
typ.
VR/D = 1200 V
I TAV
I²t
min.
1,65
V
T VJ = 150 °C
30
A
47
A
TVJ = 150 °C
0,86
V
13,2
mΩ
0,5 K/W
K/W
0,25
TC = 25°C
250
W
t = 10 ms; (50 Hz), sine
TVJ = 45°C
300
A
t = 8,3 ms; (60 Hz), sine
VR = 0 V
325
A
t = 10 ms; (50 Hz), sine
TVJ = 150 °C
255
A
t = 8,3 ms; (60 Hz), sine
VR = 0 V
275
A
t = 10 ms; (50 Hz), sine
TVJ = 45°C
450
A²s
t = 8,3 ms; (60 Hz), sine
VR = 0 V
440
A²s
t = 10 ms; (50 Hz), sine
TVJ = 150 °C
325
A²s
315
A²s
t = 8,3 ms; (60 Hz), sine
VR = 0 V
CJ
junction capacitance
VR = 400 V f = 1 MHz
TVJ = 25°C
PGM
max. gate power dissipation
t P = 30 µs
T C = 150 °C
13
t P = 300 µs
PGAV
average gate power dissipation
(di/dt) cr
critical rate of rise of current
TVJ = 150 °C; f = 50 Hz
repetitive, IT =
t P = 200 µs; di G /dt = 0,3 A/µs;
90 A
IG =
30 A
(dv/dt)cr
critical rate of rise of voltage
V = ⅔ VDRM
VGT
gate trigger voltage
I GT
gate trigger current
VGD
gate non-trigger voltage
I GD
gate non-trigger current
IL
latching current
0,3 A; V = ⅔ VDRM
non-repet., I T =
pF
10
W
5
W
0,5
W
150 A/µs
500 A/µs
TVJ = 150°C
500 V/µs
VD = 6 V
TVJ = 25 °C
1,3
TVJ = -40 °C
1,6
V
VD = 6 V
TVJ = 25 °C
± 30
mA
TVJ = -40 °C
± 50
mA
TVJ = 150°C
0,2
V
±1
mA
TVJ = 25 °C
90
mA
R GK = ∞; method 1 (linear voltage rise)
VD = ⅔ VDRM
tp =
10 µs
IG =
0,3 A; di G /dt =
V
0,3 A/µs
IH
holding current
VD = 6 V R GK = ∞
TVJ = 25 °C
60
mA
t gd
gate controlled delay time
VD = ½ VDRM
TVJ = 25 °C
2
µs
tq
turn-off time
IG =
0,3 A; di G /dt =
0,3 A/µs
VR = 100 V; I T = 30 A; V = ⅔ VDRM TVJ =125 °C
di/dt = 10 A/µs dv/dt =
IXYS reserves the right to change limits, conditions and dimensions.
© 2015 IXYS all rights reserved
150
µs
20 V/µs t p = 200 µs
Data according to IEC 60747and per semiconductor unless otherwise specified
20150827b
CLA30E1200NPZ
Package
Ratings
TO-263 (D2Pak-HV)
Symbol
I RMS
Definition
Conditions
RMS current
per terminal
min.
TVJ
virtual junction temperature
T op
operation temperature
Tstg
storage temperature
-40
max.
35
Unit
A
-40
150
°C
-40
125
°C
150
°C
1,5
Weight
FC
20
mounting force with clip
d Spp/App
typ.
Product Marking
C
L
A
30
E
1200
N
PZ
IXYS Zyyww
Logo
Assembly Line
Date Code
N
4,2
mm
terminal to backside
4,7
mm
Part description
XXXXXXXXX
Part No.
60
terminal to terminal
creepage distance on surface | striking distance through air
d Spb/Apb
g
000000
=
=
=
=
=
=
=
=
Thyristor (SCR)
High Efficiency Thyristor
(up to 1200V)
Current Rating [A]
Single Thyristor
Reverse Voltage [V]
Three Quadrants operation: QI - QIII
TO-263AB (D2Pak) (2HV)
Assembly Code
Ordering
Standard
Ordering Number
CLA30E1200NPZ
Equivalent Circuits for Simulation
I
V0
R0
* on die level
Delivery Mode
Tape & Reel
Quantity
800
Code No.
516330
T VJ = 150 °C
Thyristor
V 0 max
threshold voltage
0,86
R0 max
slope resistance *
10
IXYS reserves the right to change limits, conditions and dimensions.
© 2015 IXYS all rights reserved
Marking on Product
CLA30E1200NPZ
V
mΩ
Data according to IEC 60747and per semiconductor unless otherwise specified
20150827b
CLA30E1200NPZ
Outlines TO-263 (D2Pak-HV)
Dim.
W
A
Supplier
Option
D1
L1
c2
A1
H
D
E
1
4
3
L
D2
A2
e1
A
A1
A2
b
b2
c
c2
D
D1
D2
E
E1
e
e1
H
L
L1
c
2x e
2x b2
10.92
(0.430)
W
E1
Inches
min
max
0.160 0.190
typ. 0.004
0.095
0.020 0.039
0.045 0.055
0.016 0.029
0.045 0.055
0.330 0.370
0.315 0.350
0.091
0.380 0.410
0.245 0.335
0,100 BSC
0.169
0.575 0.625
0.070 0.110
0.040 0.066
typ.
0.002
0.0008
All dimensions conform with
and/or within JEDEC standard.
1.78
(0.07)
3.05
(0.120)
3.81
(0.150)
9.02
(0.355)
mm (Inches)
2x b
Millimeter
min
max
4.06
4.83
typ. 0.10
2.41
0.51
0.99
1.14
1.40
0.40
0.74
1.14
1.40
8.38
9.40
8.00
8.89
2.3
9.65
10.41
6.22
8.50
2,54 BSC
4.28
14.61 15.88
1.78
2.79
1.02
1.68
typ.
0.040
0.02
2.54 (0.100)
Recommended min. foot print
4
1
± IGT
3
IXYS reserves the right to change limits, conditions and dimensions.
© 2015 IXYS all rights reserved
Data according to IEC 60747and per semiconductor unless otherwise specified
20150827b
CLA30E1200NPZ
Thyristor
60
280
50
1000
50 Hz, 80% VRRM
VR = 0 V
240
40
IT
TVJ = 45°C
ITSM 200
2
It
TVJ = 45°C
30
[A]
[A] 160
20
[A2s]
TVJ = 125°C
TVJ = 150°C
125°C
10
TVJ = 125°C
100
120
TVJ = 25°C
0
0,5
1,0
1,5
80
0,001
2,0
0,01
VT [V]
B
IGT: TVJ = 25°C
2
[V]
1
3
4 5 6 7 8 910
t [ms]
Fig. 3 I t versus time (1-10 s)
40
C
IGT: TVJ = -40°C
IGT: TVJ = 0°C
B
2
2
102
B
VG
1
Fig. 2 Surge overload current
ITSM: crest value, t: duration
IGD: TVJ = 125°C
3
1
t [s]
Fig. 1 Forward characteristics
4
0,1
30
TVJ = 125°C
101
tgd
IT(AV)M
[µs]
[A]
dc =
1
0.5
0.4
0.33
0.17
0.08
20
lim.
100
10
IGD: TVJ = 25°C
typ.
A
10-1
10-2
0
0
25
50
75
10-1
100
0
101
0
40
IG [A]
IG [mA]
Fig. 4 Gate voltage & gate current
Fig. 5 Gate controlled delay time tgd
Triggering: A = no; B = possible; C = safe
60
80
120
160
Tcase [°C]
Fig. 6 Max. forward current at
case temperature
0,6
dc =
1
0.5
0.4
0.33
0.17
0.08
50
40
P(AV)
RthHA
0.6
0.8
1.0
2.0
4.0
8.0
0,5
0,4
ZthJC
30
0,3
[W]
i Rthi (K/W)
1
0.08
2
0.06
3
0.2
4
0.05
5
0.11
[K/W]
20
0,2
10
0,1
0
ti (s)
0.01
0.001
0.02
0.2
0.11
0,0
0
10
20
30
40 0
IT(AV) [A]
50
100
150
Fig. 7a Power dissipation versus direct output current
Fig. 7b and ambient temperature
IXYS reserves the right to change limits, conditions and dimensions.
© 2015 IXYS all rights reserved
1
10
100
1000
10000
t [ms]
Tamb [°C]
Fig. 7 Transient thermal impedance junction to case
Data according to IEC 60747and per semiconductor unless otherwise specified
20150827b