CMOS area image sensors S11661 S11662 APS (active pixel sensor) type with high near infrared sensitivity The S11661 and S11662 are APS type CMOS area image sensors with a high sensitivity in the near infrared region. The S11661 is SXGA format type (1280 x 1024 pixels), and the S11662 is VGA format type (640 x 480 pixels). Both types include a timing generator, a bias generator and an A/D converter, and offer digital input/output for easy handling. Features Applications S11661: 1280 × 1024 pixels S11662: 640 × 480 pixels Security (infrared camera, palm vein certification) Position and shape recognition of infrared spot light Pixel size: 7.4 × 7.4 μm Rolling/global shutter readout 3.3 V single power supply operation High-speed partial readout function Structure Parameter Image size (H × V) Pixel size Pixel pitch Number of total pixels (H × V) Number of effective pixels (H × V) S11661 9.472 × 7.578 S11662 4.736 × 3.552 7.4 × 7.4 7.4 1320 × 1064 1280 × 1024 680 × 520 640 × 480 Upper and left parts: 8 each Lower and right parts: 32 each 33 Ceramic Borosilicate glass (without anti-reflective coating) Number of light-shielded lines Fill factor Package Window material*1 *2 Unit mm μm μm pixels pixels lines % - *1: Resin sealing *2: Reflactive index=1.523 Absolute maximum ratings Parameter Supply voltage Input voltage*3 Vcp_out terminal voltage Operating temperature*4 Storage temperature*4 Reflow soldering conditions*5 Symbol Vdd(A), Vdd(D) Vi Vcp_out Topr Tstg Tsol Condition Ta=25 °C Ta=25 °C Ta=25 °C Value -0.3 to +4.2 -0.3 to +4.2 -0.3 to +6.5 -10 to +65 -10 to +85 Peak temperature 260 °C, 3 times (see P.8) Unit V V V °C °C - *3: SPI_data, SPI_clk, SPI_enable, MCLK, Vref1 to 9, Vr, Vcp_in, All_reset, MST, SPI_reset *4: No condensation *5: JEDEC level 3 (S11661), JEDEC level 2a (S11662) Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings. www.hamamatsu.com 1 CMOS area image sensors S11661, S11662 Recommended terminal voltage (Ta=25 °C) Parameter Supply voltage I/O supply voltage Digital input terminal High level voltage Low level Symbol Vdd(A), Vr Vdd(D), Vcp_in Vsigi(H) Vsigi(L) Min. 3.0 3.0 Vdd(D) - 0.25 0 Typ. 3.3 Vdd(A) Vdd(D) - Max. 3.6 3.6 Vdd(D) + 0.25 0.4 Unit V V Typ. 1/2 × f(MCLK) Vdd(D) 0 47 25 (S11661) 19 (S11662) Max. 25 M Unit Hz Hz V Electrical characterisitics [Ta=25 °C, Vdd(A)=Vdd(D)=3.3 V] Parameter Master clock pulse frequency Video data rate High level Digital output voltage Low level Analog terminal*7 6 Current consumption* Digital terminal*8 Symbol f(MCLK) VR Vsigo(H) Vsigo(L) I1 Min. 1M Vdd(D) - 0.25 - I2 - 0.25 55 45 (S11661) 35 (S11662) V mA *6: Master clock pulse frequency: 25 MHz, frame rate: 8 frames/s (S11661), 30 frames/s (S11662), load capacitance of each output terminal: 5 pF *7: Sum of Vdd(A) and Vr terminals *8: Sum of Vdd(D) and Vcp_in terminals Electrical and optical characterisitics [Ta=25 °C, Vdd(A)=Vdd(D)=3.3 V, Gain=1 times] Parameter Spectral response range Peak sensitivity wavelength Photosensitivity*9 Photoresponse nonuniformity*10 Dark output*11 *12 Saturation output voltage Saturation exposure Linearity Image lag Rolling shutter mode Random noise*12 Global shutter mode Rolling shutter mode Dynamic range Global shutter mode White spots Point defect*13 Black spots Blemish Cluster defect*14 Line defect*15 Symbol λ λp Sw PRNU Vdark Vsat Lsat LR Lag RN(RS) RN(GS) DR(RS) DR(GS) WS BS ClsD DL Min. 10 1.4 0.1 59 55 - Typ. 400 to 1000 760 13 60 1.6 0.12 1000 1500 64 60 - Max. 4 180 ±10 0.1 1500 2250 10 10 0 0 Unit nm nm V/lxăs % mV/s V lxăs % % μV rms μV rms dB dB pixels pixels pieces lines *9: White light 2856 K *10: Photoresponse nonuniformity (PRNU) is the output nonuniformity that occurs when the photosensitive area is uniformly illuminated by white light which is approx. 50% of the saturation level. PRNU is calculated using the pixels excluding the pixels of the 10 outermost lines and defective pixels, and is defined as follows: PRNU= ∆X/X × 100 (%) X: average output of all pixels, ∆X: standard deviation of pixel output *11: Average value of all effective pixels (excluding defective pixels). Rolling shutter mode *12: Analog video output value The final output from the image sensor is a 12-bit digital signal. When the gain is set to 1, the conversion voltage range (0 to 2 V) is A/D converted into 4096 gradation steps. So, 1 DN (digital number) is equal to 0.488 mV (=2000 mV/4096 DN). *13: White spot=Pixels whose dark output exceeds 1800 mV/s Black spot=Pixels whose sensitivity is less than 50% of the average sensitivity of adjacent pixels when the image sensor is illuminated with uniform white light that is approximately 50% of the saturation (excluding the outermost 10 lines in the effective pixel area) *14: A defect consisting of two or more contiguous defective pixels *15: Column defect and row defect Column defect=A defect consisting of 10 or more contiguous defective pixels in one column Row defect=A defect consisting of 10 or more contiguous defective pixels in one row 2 CMOS area image sensors S11661, S11662 Electrical and optical characterisitics [A/D converter, Ta=25 °C, Vdd(A)=Vdd(D)=3.3 V] Parameter Resolution Conversion time Conversion voltage range*16 Symbol RESO tCON - Value 12 2/f(MCLK) 0 to 2 Unit bits s V *16: Gain=1 Spectral response (typical example) Spectral transmittance characteristics of window material (Ta=25 °C) 25 (Typ. Ta=25 °C) 20 80 Transmittance (%) Photosensitivity [TV/(W∙s)] 100 15 10 60 40 5 20 0 400 500 600 700 800 900 1000 1100 1200 0 200 300 400 500 600 700 800 900 1000 1100 1200 Wavelength (nm) KMPDB0363EC Wavelength (nm) KMPDB0423EA Contrast transfer function vs. spatial frequency (typical example) (White light, Ta=25 °C) Contrast transfer function 1.0 0.8 0.6 0.4 0.2 0 0 5 10 15 20 25 Spatial frequency (line pairs/mm) KMPDB0424EA 3 CMOS area image sensors S11661, S11662 Vertical shift register (S11661: 1064 lines, S11662: 520 lines) Booster circuit Block diagram 12 ( Photodiode array S11661: 1280 × 1024 pixels S11662: 640 × 480 pixels ) Dout [11-0] 12-bit A/D converter Vsync Hsync Pclk CDS circuit (S11661: 1320 lines, S11662: 680 lines) Horizontal shift register (S11661: 1320 lines, S11662: 680 lines) Amplifier Bias circuit Timing generator Serial/parallel interface SPI_reset SPI_data SPI_clk SPI_enable MCLK All_reset (MST) KMPDC0409EA Dimensional outlines (unit: mm) S11661 +0.30 16.51-0.15 1.05 ± 0.2*1 16.23 ± 0.2 7.2 ± 0.2 34 1.27 23 22 33 22 34 12 44 Index mark 7.578 Scan direction (vertical) 0.9 ± 0.2* Photosensitive surface 23 33 12.7 ± 0.13 2 7.9 ± 0.2 Center of photosensitive area 1 ch 12 44 11 1 9.472 11 1.4 ± 0.14 1 0.635 ± 0.13 1.27 ± 0.13 0.55 ± 0.05 Scan direction (horizontal) Angle accuracy of effective pixels: ±2.4 ° Weight: 1.4 g *1: Distance from upper surface of window to photosensitive surface *2: Distance from package bottom to photosensitive surface KMPDA0286EB 4 CMOS area image sensors S11661, S11662 S11662 +0.20 10.67-0.13 1.05 ± 0.2*1 0.9 ± 0.2* 0.7 25 24 36 24 37 13 48 Index mark 3.552 37 Photosensitive surface 25 36 4.22 ± 0.2 Scan direction (vertical) 10.2 ± 0.1 7.7 ± 0.1 2 5.16 ± 0.2 Center of photosensitive area 1 ch 13 48 1 12 1 12 4.736 1.4 ± 0.14 0.4 ± 0.05 0.8 ± 0.18 0.55 ± 0.05 Scan direction (horizontal) Angle accuracy of effective pixels: ±3.15 ° Weight: 0.5 g *1: Distance from upper surface of window to photosensitive surface *2: Distance from package bottom to photosensitive surface KMPDA0287EB Land pattern examples (unit: mm) S11662 0.65 0.4 1.27 0.7 2.0 2.27 S11661 7.7 10.67 KMPDC0528EA 12.7 16.24 KMPDC0527EA 5 CMOS area image sensors S11661, S11662 Pin connections S11661 Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Symbol GND SPI_data SPI_clk SPI_enable MCLK Vdd(A) Dout11 Dout10 Dout9 Dout8 Dout7 Vdd(D) Dout6 Dout5 Dout4 Dout3 Dout2 Dout1 Dout0 Vref1 Vref2 Vref3 Vref4 Vref5 Vr GND Vcp_in Vdd(A) Vcp_out Vr Vref6 NC Vref7 Vref8 Vref9 All_reset MST Pclk Hsync Vsync Vdd(D) Vdd(A) NC SPI_reset Description Ground Data signal for serial/parallel interface Clock signal for serial/parallel interface Enable signal for serial/parallel interface Master clock signal Supply voltage (3.3 V) Video output signal (MSB) Video output signal Video output signal Video output signal Video output signal Supply voltage (3.3 V) Video output signal Video output signal Video output signal Video output signal Video output signal Video output signal Video output signal (LSB) Bias voltage for A/D converter*17 Bias voltage for A/D converter*17 Bias voltage for A/D converter*17 Bias voltage for A/D converter*17 Bias voltage for A/D converter*17 Supply voltage (3.3 V)*18 *19 Ground Supply voltage (3.3 V)*18 *20 Supply voltage (3.3 V) Bias voltage for booster circuit*21 Supply voltage (3.3 V)*18 *19 Bias voltage for CDS circuit*17 No connection Bias voltage for CDS circuit*17 Bias voltage for amplifier*17 Bias voltage for amplifier*17 All reset pulse signal Master start signal Pixel output synchronization signal Line synchronization signal Frame synchronization signal Supply voltage (3.3 V) Supply voltage (3.3 V) No connection Reset signal for serial/parallel interface I/O I I I I I I O O O O O I O O O O O O O I I I I I I I I I I I I I I I I I O O O I I I *17: Terminal for monitoring the bias voltage generated in the chip. To reduce noise, insert a capacitor of about 1 μF between the ground and each terminal. *18: To reduce noise, insert a capacitor of about 0.1 μF and an electrolytic capacitor of about 22 μF/25 V between the ground and each terminal. *19: Connect this terminal to Vdd(A). *20: Connect this terminal to Vdd(D). *21: Voltage of approx. 5.5 V, which was boosted by the chip's internal booster circuit, appears at the terminal. To maintain the voltage, insert a capacitor of about 1 μF between the ground and Vcp_out. 6 CMOS area image sensors S11661, S11662 S11662 Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Symbol SPI_enable NC Dout11 Dout10 Dout9 Dout8 Dout7 Dout6 Dout5 Dout4 Dout3 Vdd(D) Vdd(A) Dout2 Dout1 Dout0 Vref1 Vref2 Vref3 Vref4 Vref5 GND Vref6 Vref7 Vref8 NC Vcp_in Vr NC NC NC NC GND Vr Vcp_out All_reset MCLK MST Pclk Hsync Vsync Vref9 Vdd(A) Vdd(D) GND SPI_reset SPI_data SPI_clk Description Enable signal for serial/parallel interface No connection Video output signal (MSB) Video output signal Video output signal Video output signal Video output signal Video output signal Video output signal Video output signal Video output signal Supply voltage (3.3 V) Supply voltage (3.3 V) Video output signal Video output signal Video output signal (LSB) Bias voltage for A/D converter*22 Bias voltage for A/D converter*22 Bias voltage for A/D converter*22 Bias voltage for A/D converter*22 Bias voltage for A/D converter*22 Ground Bias voltage for CDS circuit*22 Bias voltage for CDS circuit*22 Bias voltage for amplifier*22 No connection Supply voltage (3.3 V)*23 *24 Supply voltage (3.3 V)*23 *25 No connection No connection No connection No connection Ground Supply voltage (3.3 V)*23 *25 Bias voltage for booster circuit*26 All reset pulse signal Master clock signal Master start signal Pixel output synchronization signal Line synchronization signal Frame synchronization signal Bias voltage for amplifier*22 Supply voltage (3.3 V) Supply voltage (3.3 V) Ground Reset signal for serial/parallel interface Data signal for serial/parallel interface Clock signal for serial/parallel interface I/O I O O O O O O O O O I I O O O I I I I I I I I I I I I I I I I I O O O I I I I I I I *22: Terminal for monitoring the bias voltage generated in the chip. To reduce noise, insert a capacitor of about 1 μF between the ground and each terminal. *23: To reduce noise, insert a capacitor of about 0.1 μF and an electrolytic capacitor of about 22 μF/25 V between the ground and each terminal. *24: Connect the terminal to Vdd(D). *25: Connect the terminal to Vdd(A). *26: Voltage of approx. 5.5 V, which was boosted by the chip's internal booster circuit, appears at the terminal. To maintain the voltage, insert a capacitor of about 1 μF between the ground and Vcp_out. 7 CMOS area image sensors S11661, S11662 Precautions (1) Electrostatic countermeasures This device has a built-in protection circuit against static electrical charges. However, to prevent destroying the device with electrostatic charges, take countermeasures such as grounding yourself, the workbench and tools to prevent static discharges. Also protect this device from surge voltages which might be caused by peripheral equipment. (2) Incident window If dust or dirt gets on the light incident window, it will show up as black blemishes on the image. When cleaning, avoid rubbing the window surface with dry cloth or dry cotton swab, since doing so may generate static electricity. Use soft cloth, paper or a cotton swab moistened with alcohol to wipe dust and dirt off the window surface. Then blow compressed air onto the window surface so that no spot or stain remains. (3) Soldering by hand To prevent damaging the device during soldering, take precautions to prevent excessive soldering temperatures and times. Soldering should be performed within 5 seconds at a soldering temperature below 260 °C. (4) Reflow soldering Soldering conditions may differ depending on the board size, reflow furnace, etc. Check the conditions before soldering. A sudden temperature rise and cooling may be the cause of trouble, so make sure that the temperature change is within 4 °C per second. The bonding portion between the ceramic base and the glass may discolor after reflow soldering, but this has no adverse effects on the hermetic sealing of the product. (5) UV exposure This product is not designed to prevent deterioration of characteristics caused by UV exposure, so do not expose it to UV light. Recommended temperature profile for reflow soldering (typical example) 300 °C Peak temperature 260 °C max. Peak temperature - 5 °C 30 s max. Cooling 6 °C/s max. Temperature Heating 3 °C/s max. 217 °C 200 °C 150 °C Preheating 60 to 120 s Soldering 60 to 150 s 25 °C to peak temperature 8 m max. Time KMPDB0405EA ∙ This product supports lead-free soldering. After unpacking, store it in an environment at a temperature of 30 °C or less and a humidity of 60% or less, and perform soldering within 168 hours (S11661) or 4 weeks (S11662). ∙ The effect that the product receives during reflow soldering varies depending on the circuit board and reflow oven that are used. Before actual reflow soldering, check for any problems by tesitng out the reflow soldering methods in advance. Recommended baking conditions Refer to the precautions of ʺSurface mount type products.ʺ 8 CMOS area image sensors S11661, S11662 Related information www.hamamatsu.com/sp/ssd/doc_en.html Precautions ∙ Notice ∙ Image sensor ∙ Surface mount type products Hamamatsu provides technical information of this product. Please contact our sales office. Information described in this material is current as of December, 2014. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix "(Z)" which means developmental specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, Bridgewater, N.J. 08807, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Torshamnsgatan 35 16440 Kista, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.r.l.: Strada della Moia, 1 int. 6, 20020 Arese (Milano), Italy, Telephone: (39) 02-93581733, Fax: (39) 02-93581741 China: Hamamatsu Photonics (China) Co., Ltd.: B1201, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866 Cat. No. KMPD1133E02 Dec. 2014 DN 9