IRF13N50 Series

IRF13N50 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
N-Channel Power MOSFET
(14A, 500Volts)
DESCRIPTION
The Nell IRF13N50 are N-channel enhancement mode
silicon gate power field effect transistors.
D
They are designed, tested and guaranteed to withstand
level of energy in breakdown avalanche made of operation.
They are designed as an extremely efficient and reliable
device for use in a wide variety of applications such as
SMPS, UPS, convertors, motor drivers and drivers for high
power bipolar switching transistors requiring high speed
and low gate drive power.
G
D
TO-220AB
(IRF13N50A)
S
These transistors can be operated directly from
integrated circuits.
D (Drain)
FEATURES
G
(Gate)
RDS(ON) = 0.45Ω @ VGS = 10V
Ultra low gate charge(81nC max.)
Low reverse transfer capacitance
(C RSS = 11pF typical)
S (Source)
Fast switching capability
100% avalanche energy specified
PRODUCT SUMMARY
Improved dv/dt capability
150°C operation temperature
ID (A)
14
VDSS (V)
500
RDS(ON) (Ω)
0.45 @ V GS = 10V
QG(nC) max.
81
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise specified)
SYMBOL
TEST CONDITIONS
PARAMETER
VALUE
VDSS
Drain to Source voltage(Note 1)
T J =25°C to 150°C
V DGR
Drain to Gate voltage
R GS =20KΩ
500
V GS =10V, T C =25°C
±30
14
V GS =10V, T C =100°C
9.1
V GS
ID
Gate to Source voltage
Continuous Drain Current
I DM
Pulsed Drain current (Note 1)
I AR
Repetitive avalanche current (Note 1)
Repetitive avalanche energy(Note 1)
I AR =14A, R GS =50Ω, V GS =10V
E AS
Single pulse avalanche energy (Note 2)
dv/dt
PD
TJ
T STG
TL
500
56
E AR
V
A
14
25
mJ
I AS =14A, L=5.7mH
560
mJ
9.2
V /ns
T C =25°C
250
W
1.9
W /°C
Peak diode recovery dv/dt(Note 3)
Total power dissipation
Derating factor above 25 ° C
Operation junction temperature
-55 to 150
Storage temperature
-55 to 150
Maximum soldering temperature, for 10 seconds
Mounting torque, #6-32 or M3 screw
1.6mm from case
3 . I SD ≤ 14A, di/dt ≤ 250A/µs, V DD ≤ V (BR)DSS , T J ≤ 150°C.
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ºC
300
10 (1.1)
Note: 1. Repetitive rating: pulse width limited by junction temperature.
2 . V DD =50V, L=5.7mH, I AS =14A, R G =25Ω, dV/dt=7.6 V/ns, starting T J =25˚C
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UNIT
lbf . in (N . m)
IRF13N50 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
THERMAL RESISTANCE
SYMBOL
PARAMETER
Rth(j-c)
Thermal resistance, junction to case
Rth(c-s)
Thermal resistance, case to heatsink
Rth(j-a)
Thermal resistance, junction to ambient
Min.
Typ.
Max.
UNIT
0.50
ºC/W
0.5
62
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)
SYMBOL
TEST CONDITIONS
PARAMETER
Min.
Typ.
Max.
UNIT
STATIC
V(BR)DSS
▲V (BR)DSS/▲T J
I DSS
I GSS
Drain to source breakdown voltage
V GS = 0V, I D = 250µA
Breakdown voltage temperature coefficient
I D = 1mA, referenced to 25°C
Drain to source leakage current
Forward transconductance
Output capacitance
C RSS
Reverse transfer capacitance
tr
t d(OFF)
tf
V GS =V DS , I D =250μA
V DS =50V, I D =8.4A
Output capacitance
μA
100
-100
nA
0.45
Ω
4
V
S
1910
290
11
V DS = 1.0V, f =1.0MHz
V GS = 0V
pF
2730
V DS = 400V, f =1.0MHz
82
V DS = 0 to 400V
160
Turn-on delay time
Turn-off delay time
25
250
2
8.1
V DS = 25V, V GS = 0V, f =1MHz
Effective output capacitance (Note 2)
Rise time
V/ºC
0.55
Input capacitance
C OSS
t d(ON)
T C =125°C
V GS = -30V, V DS = 0V
V GS = 10V, l D = 8.4A (Note 1)
Gate threshold voltage
C OSS eff.
V DS =400V, V GS =0V
V GS = 30V, V DS = 0V
Static drain to source on-state resistance
C OSS
T C = 25°C
Gate to source reverse leakage current
V GS(TH)
g fS
DYNAMIC
C ISS
V DS =500V, V GS =0V
Gate to source forward leakage current
R DS(ON)
V
500
15
V DD = 250V, I D = 14A, R G = 7.5Ω,
V GS = 10V, (Note 1)
39
ns
39
Fall time
31
QG
Total gate charge
Q GS
Gate to source charge
Q GD
Gate to drain charge (Miller charge)
81
20
V DS = 400V, V GS = 10V, I D = 14A
nC
36
SOURCE TO DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25°C unless otherwise specified)
SYMBOL
VSD
I s (I SD )
PARAMETER
Diode forward voltage
Continuous source to drain current
TEST CONDITIONS
Min.
Typ.
I SD = 14A, V GS = 0V
Integral reverse P-N junction
diode in the MOSFET
Max.
UNIT
1.5
V
14
D (Drain)
I SM
56
Pulsed source current
A
G
(Gate)
S (Source)
t rr
Reverse recovery time
Q rr
Reverse recovery charge
I RRM
Reverse recovery current
t ON
Forward turn-on time
I SD = 14A, V GS = 0V,
dI F /dt = 100A/µs
550
ns
4.4
6.5
μC
21
31
A
Intrinsic turn-on time is negligible (turn-on is domonated by LS+LD)
Note: 1. Pulse test: Pulse width ≤ 300μs, duty cycle ≤ 2% .
2. C oss eff. is a fixed capacitance that gives the same charging time as Coss while V DS is rising from 0 to 80% V DS
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370
Page 2 of 7
RoHS
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IRF13N50 Series
SEMICONDUCTOR
Nell High Power Products
ORDERING INFORMATION SCHEME
IRF 13N50 A
MOSFET series
N-Channel, IR series
Current & Voltage rating, lD & VDS
14A / 500V
Package type
A = TO-220AB
Fig.1 Typical output characteristics,
T C =25°C
1
4.5V
0.1
20µs pulse width
T C =25°C
0.01
0.1
Drain-to-Source current, l D (A)
100
10
1
10
Drain-to-Source current, l D (A)
10
100
V GS
Top: 15V
10V
8V
7V
6V
5.5V
5V
Bottorm: 4.5V
T J = 25°C
T J =150°C
10
1
V DS =50V
20µs pulse width
0.1
4
100
6
8
10
12
14
16
Drain-to-Source voltage , V DS (V)
Gate-to-Source voltage , V GS (V)
Fig.3 Typical output characteristics,
T C =150°C
Fig.4 Normalized On-Resistance vs. Temperature
V GS
Top: 15V
10V
8V
7V
6V
5.5V
5V
Bottorm: 4.5V
4.5V
1
20µs pulse width
T J =150°C
0.1
0.1
1
10
Drain-to-Source on resistance, R DS(on)
(Normalized)
Drain-to-Source current, l D (A)
100
Fig.2 Typical transfer characteristics
100
Drain-to-Source voltage , V DS (volts)
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3.0
l D =14A
2.5
2.0
1.5
1.0
0.5
V GS =10V
0.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
Junction Temperature,T J (°C)
Page 3 of 7
IRF13N50 Series
SEMICONDUCTOR
RoHS
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Nell High Power Products
Fig.6 Typical source-drain diode forward
voltage
Fig.5 Typical capacitance vs. Drain-to-Source
voltage
100000
Reverse drain current,I SD (A)
10000
Capacitance, (pF)
100
V GS = 0V, f =1MHZ
C iss = C gs +C gd ( C ds = shorted )
C rss = C gd
C oss = C ds +C gd
Ciss
1000
Coss
100
10
Crss
T J = 150°C
10
T J = 25°C
1
V GS = 0V
0
10
1
100
0.1
0.2
1000
Drain-to-Source voltage , V DS (V)
0.8
1.1
1.4
Source-to-drain voltage, V SD (V)
Fig.7 Typical gate charge vs. gate-to-source
voltage
Fig.8 Maximum safe operating area
12
10³
l D = 14A
Operation in This Area is Limited by R DS(ON)
V DS = 400V
V DS = 250V
V DS = 100V
10
Drain-to-Current , l D (A)
Gate-to-source voltage , V GS (volts)
0.5
7
5
10²
10
1mssx
1
2
12
24
36
48
Note:
1. T C = 25°C
2. T J = 150°C
3. Single Pulse
0.1
10
0
0
100µs
60
100
Drain-to-Source voltage, V DS (V)
Total gate charge , Q G (nC)
Fig.9 Maximum drain current vs.
Case temperature
Drain Current , l D (A)
15
12
9
6
3
0
25
50
75
100
125
Case temperature, T C ( ° C)
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10msec
Page 4 of 7
150
1000
IRF13N50 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
Fig.10 Maximum effective transient thermal impedance,
Junction-to-Case
Thermal response (RthJc)
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
Single pulse
(Thermal response)
PDM
0.01
t1
Notes:
1. Duty factor, D = t1/ t2
2. Peak TJ = PDM * Rth(j-c) +TC
0.001
0.00001
0.0001
0.001
0.01
t2
0.1
1
Rectangular Pulse Duration , t 1 (seconds)
Fig.11a. Switching time test circuit
Fig.11b. Switching time waveforms
RD
V DS
V DS
90%
V GS
RG
D.U.T.
+
- V DD
10V
V GS
Pulse width ≤ 1µs
Duty Factor ≤ 0.1%
10%
t d(ON)
t d(OFF)
tR
Fig.12a. Unclamped lnductive test circuit
tF
Fig.12b. Unclamped lnductive waveforms
15 V
BV DSS
L
V DS
RG
D.U.T.
l AS
l AS
+
V
- DD
l D(t)
V DS(t)
A
V DD
20V
tP
0.01Ω
Time
tp
Vary t p to obtain required I AS
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Page 5 of 7
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IRF13N50 Series
SEMICONDUCTOR
Nell High Power Products
Fig.12c. Maximum avalanche energy vs.
Drain current
Single pulse avalanche energy,
E AS (mJ)
1150
lD
6.3A
8.9A
BOTTOM 14A
TOP
920
690
460
230
0
25
50
75
100
125
150
Starting Junction temperature, T J (°C)
Fig.13a. Basic gate charge waveform
Fig.13b. Gate charge test circuit
Current Regulator
Same Type as D.U.T.
V GS
50KΩ
QG
0.2µF
12V
10V
0.3µF
+
Q GD
Q GS
-
D.U.T.
V DS
V GS
3mA
RG
Charge
RD
Current Sampling Resistors
Fig.14 Peak diode recovery dv/dt test circuit for N-Channel MOSFET
D.U.T.
Driver Gate Drive
+
Circuit Layout Considerations
• Low Stray lnductance
• Ground Plane
• Low Leakage lnductance
Current Transformer
P.W.
D=
Period
P.W.
Period
VGS=10V
-
*
D.U.T. I SD Waveform
+
-
-
RG
Reverse
Recovery
Current
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
•
•
•
•
dv/dt controlled by R G
Driver same type as D.U.T.
l SD controlled by Duty Factor " D "
D.U.T. -Device Under Test
Re-Applied
Voltage
+
-
V DD
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
*V GS = 5V for Logic Level Devices and 3V for drive devices
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Page 6 of 7
IRF13N50 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
Case Style
TO-220AB
10.54 (0.415) MAX.
9.40 (0.370)
9.14 (0.360)
4.70 (0.185)
4.44 (0.1754)
3.91 (0.154)
3.74 (0.148)
1.39 (0.055)
1.14 (0.045)
2.87 (0.113)
2.62 (0.103)
3.68 (0.145)
3.43 (0.135)
1
PIN
2
16.13 (0.635)
15.87 (0.625)
3
4.06 (0.160)
3.56 (0.140)
15.32 (0.603)
14.55 (0.573)
8.89 (0.350)
8.38 (0.330)
29.16 (1.148)
28.40 (1.118)
2.79 (0.110)
2.54 (0.100)
1.45 (0.057)
1.14 (0.045)
2.67 (0.105)
2.41 (0.095)
2.65 (0.104)
2.45 (0.096)
14.22 (0.560)
13.46 (0.530)
D (Drain)
0.90 (0.035)
0.70 (0.028)
5.20 (0.205)
4.95 (0.195)
0.56 (0.022)
0.36 (0.014)
G
(Gate)
S (Source)
All dimensions in millimeters(inches)
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Page 7 of 7