Hardware Documentation Data Sheet CUR 3105 Hall-Effect Current Transducer Edition March 24, 2011 DSH000155_002EN CUR 3105 DATA SHEET Copyright, Warranty, and Limitation of Liability Micronas Patents The information and data contained in this document are believed to be accurate and reliable. The software and proprietary information contained therein may be protected by copyright, patent, trademark and/or other intellectual property rights of Micronas. All rights not expressly granted remain reserved by Micronas. Choppered Offset Compensation protected by Micronas patents no. US5260614A, US5406202A, EP0525235B1 and EP0548391B1. Micronas assumes no liability for errors and gives no warranty representation or guarantee regarding the suitability of its products for any particular purpose due to these specifications. Sensor programming with VDD-Modulation protected by Micronas Patent No. EP 0 953 848. Third-Party Trademarks All brand and product names or company names may be trademarks of their respective companies. By this publication, Micronas does not assume responsibility for patent infringements or other rights of third parties which may result from its use. Commercial conditions, product availability and delivery are exclusively subject to the respective order confirmation. Any information and data which may be provided in the document can and do vary in different applications, and actual performance may vary over time. All operating parameters must be validated for each customer application by customers’ technical experts. Any new issue of this document invalidates previous issues. Micronas reserves the right to review this document and to make changes to the document’s content at any time without obligation to notify any person or entity of such revision or changes. For further advice please contact us directly. Do not use our products in life-supporting systems, aviation and aerospace applications! Unless explicitly agreed to otherwise in writing between the parties, Micronas’ products are not designed, intended or authorized for use as components in systems intended for surgical implants into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death could occur. No part of this publication may be reproduced, photocopied, stored on a retrieval system or transmitted without the express written consent of Micronas. 2 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Contents Page Section Title 4 4 5 5 5 5 5 5 6 1. 1.1. 1.2. 1.3. 1.4. 1.5. 1.6. 1.6.1. 1.6.2. Introduction Features Marking Code Operating Junction Temperature Range (TJ) IC Package Codes Solderability and Welding Pin Connections and Short Descriptions TO92UT Package SOIC8 Package 7 7 9 12 12 2. 2.1. 2.2. 2.3. 2.3.1. Functional Description General Function Digital Signal Processing and EEPROM Calibration Procedure General Procedure 14 14 19 19 19 20 20 20 21 22 23 24 24 24 3. 3.1. 3.2. 3.3. 3.4. 3.4.1. 3.4.2. 3.5. 3.6. 3.6.1. 3.7. 3.8. 3.9. 3.10. Specifications Outline Dimensions Dimensions of Sensitive Area Positions of Sensitive Areas Absolute Maximum Ratings Storage and Shelf Life for TO92UT Package Storage and Shelf Life for SOIC8 Package Recommended Operating Conditions Characteristics Definition of Sensitivity Error ES Open-Circuit Detection Power-On Operation Overvoltage and Undervoltage Detection Magnetic Characteristics 25 25 25 25 25 4. 4.1. 4.2. 4.3. 4.4. Application Notes Application Circuit Use of two CUR 3105 in Parallel Ambient Temperature EMC and ESD 26 26 26 28 29 29 32 5. 5.1. 5.2. 5.3. 5.4. 5.5. 5.5.1. Programming of the Current Transducer Definition of Programming Pulses Definition of the Telegram Telegram Codes Number Formats Register Information Programming Information 33 6. Data Sheet History 3 March 24, 2011; 000155_002ENDS Micronas CUR 3105 DATA SHEET 1.1. Features Hall-Effect Current Transducer Release Note: Revision bars indicate significant changes to the previous edition. – high-precision current transducer with ratiometric output and digital signal processing – low output voltage drifts over temperature 1. Introduction – 12-bit analog output The CUR 3105 is a new current transducer based on the Hall effect. The IC can be used for very precise current measurements. The measured current is proportional to the analog output voltage driven by the sensor’s output. Major characteristics like magnetic field range, sensitivity, output quiescent voltage (output voltage at B = 0 mT), and output voltage range are programmable in a non-volatile memory. The transducer has a ratiometric output characteristic, which means that the output voltage is proportional to the current and the supply voltage. It is possible to program different transducers which are in parallel to the same supply voltage individually. The CUR 3105 features a temperature-compensated Hall plate with choppered offset compensation, an A/D converter, digital signal processing, a D/A converter with output driver, an EEPROM memory with redundancy and lock function for the calibration data, an EEPROM for customer serial number, a serial interface for programming the EEPROM, and protection devices at all pins. The internal digital signal processing is of great benefit because analog offsets, temperature shifts, and mechanical stress do not degrade the transducers accuracy. The CUR 3105 is programmable by modulating the supply voltage. No additional programming pin is needed. The easy programmability allows a 2-point calibration by adjusting the output voltage directly to the input signal (current). Individual adjustment of each transducer during the customer’s manufacturing process is possible. With this calibration procedure, the tolerances of the IC and the mechanical positioning can be compensated in the final assembly. This offers a low-cost alternative for all applications that presently need mechanical adjustment or laser trimming for calibrating the system. – multiple programmable magnetic characteristics in a non-volatile memory (EEPROM) with redundancy and lock function – open-circuit (ground and supply line break detection) with 5 k pull-up and pull-down resistor, overvoltage and undervoltage detection – for programming an individual transducer within several ICs in parallel to the same supply voltage, a selection can be done via the output pin – programmable clamping function – programming through modulation of the supply voltage – operates from 40 °C up to 170 °C junction temperature – operates from 4.5 V up to 5.5 V supply voltage in specification and functions up to 8.5 V – operates with static magnetic fields and dynamic magnetic fields up to 1 kHz – overvoltage and reverse-voltage protection at all pins – magnetic characteristics extremely robust against mechanical stress – short-circuit protected push-pull output – EMC and ESD optimized design The calculation of the individual IC characteristics and the programming of the EEPROM memory can easily be done with a PC and the application kit from Micronas. The transducer is designed for industrial, white goods and automotive applications and operates with typically 5 V supply voltage in the wide junction temperature range from 40 °C up to 170 °C. The CUR 3105 is available in the very small leaded packages TO92UT-1 and TO92UT-2, as well as in the small eight-pin SOIC8 SMD package. 4 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 1.2. Marking Code 1.5. Solderability and Welding The CUR 3105 has a marking on the package surface (branded side). This marking includes the name of the IC and the temperature range. Soldering Type CUR 3105 During soldering reflow processing and manual reworking, a component body temperature of 260 °C should not be exceeded. Temperature Range A K I C 3105A 3105K 3105I 3105C 1.3. Operating Junction Temperature Range (TJ) The ICs from Micronas are specified to the chip temperature (junction temperature TJ). A: TJ = 40 °C to +170 °C K: TJ = 40 °C to +140 °C I: TJ = 20 °C to +125 °C C: TJ = 0 °C to +85°C Welding (for TO92UT package only) Device terminals should be compatible with laser and resistance welding. Please note that the success of the welding process is subject to different welding parameters which will vary according to the welding technique used. A very close control of the welding parameters is absolutely necessary in order to reach satisfying results. Micronas, therefore, does not give any implied or express warranty as to the ability to weld the component. 1.6. Pin Connections and Short Descriptions The relationship between ambient temperature (TA) and junction temperature is explained in Section 4.3. on page 25. 1.4. IC Package Codes CURXXXXPA-T Temperature Range: A, K, I, C Package: UT for TO92UT-1/-2 DJ for SOIC8-1 1.6.1. TO92UT Package Pin No. Pin Name Type Short Description 1 VDD IN Supply Voltage and Programming Pin 2 GND 3 OUT Ground OUT Push Pull Output and Selection Pin Type: 3105 1 Example: CUR3105DJ-K VDD Type: 3105 Package: SOIC8-1 Temperature Range: TJ = 40 C to +140 C The ICs are available in a wide variety of packaging versions and quantities. For more detailed information, please refer to the brochure: “Hall Sensors: Ordering Codes, Packaging, Handling”. OUT 3 2 GND Fig. 1–1: Pin configuration TO92UT Micronas March 24, 2011; DSH000155_002EN 5 CUR 3105 DATA SHEET 1.6.2. SOIC8 Package Pin No. Pin Name Type Short Description 1 VDD IN Supply Voltage and Programming Pin 2,5,6,7 ,8 GND Ground 3 NC Not Connected 4 OUT 1 OUT Push-Pull Output and Selection Pin VDD OUT 4 2 GND (5 - 8) 3 NC Fig. 1–2: Pin configuration SOIC8 Note: Note: Pins number 2, 5, 6, 7, and 8 must be connected to GND. 6 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET The CUR3105 is a monolithic integrated circuit which provides an output voltage proportional to the magnetic flux through the Hall plate and proportional to the supply voltage (ratiometric behavior). The external magnetic field component perpendicular to the branded side of the package generates a Hall voltage proportional to the magnetic field. This voltage is converted to a digital value, processed in the Digital Signal Processing Unit (DSP) according to the settings of the EEPROM registers, converted to an analog voltage with ratiometric behavior, and stabilized by a pushpull output transistor stage. The function and the parameters for the DSP are explained in Section 2.2. on page 9. The setting of the LOCK register disables the programming of the EEPROM memory for all time. This register cannot be reset. As long as the LOCK register is not set, the output characteristic can be adjusted by programming the EEPROM registers. The IC is addressed by modulating the supply voltage (see Fig. 2–1). In the supply voltage range from 4.5 V up to 5.5 V, the transducer generates an analog output voltage. After detecting a command, the transducer reads or writes the memory The open-circuit detection provides a defined output voltage if the VDD or GND line is broken. Internal temperature compensation circuitry and the choppered offset compensation enables operation over the full temperature range with minimal changes in accuracy and high offset stability. The circuitry also rejects offset shifts due to mechanical stress from the package. The non-volatile memory consists of redundant and nonredundant EEPROM cells. The non-redundant EEPROM cells are only used to store production information inside the IC. In addition, the IC is equipped with devices for overvoltage and reverse-voltage protection at all pins. VDD 8 7 VOUT (V) 2.1. General Function and answers with a digital signal on the output pin. The analog output is switched off during the communication. Several ICs in parallel to the same supply and ground line can be programmed individually. The selection of each IC is done via its output pin. VDD (V) 2. Functional Description CUR 3105 6 5 digital analog Fig. 2–1: Programming with VDD modulation VDD Internally stabilized Supply and Protection Devices Switched Hall Plate Temperature Dependent Bias Oscillator A/D Converter Digital Signal Processing Open-circuit, Overvoltage, Undervoltage Detection D/A Converter Analog Output 50 Protection Devices 50 OUT EEPROM Memory Supply Level Detection Digital Output Lock Control Open-circuit Detection GND Fig. 2–2: CUR3105 block diagram Micronas March 24, 2011; DSH000155_002EN 7 CUR 3105 DATA SHEET Digital Output 14 bit Digital Signal Processing A/D Converter Digital Filter Mode Register Range Filter 2 bit 1 bit Multiplier Sensitivity 14 bit Adder Limiter D/A Converter VOQ Min-Out Max-Out Lock Micronas 11 bit 8 bit 9 bit 1 bit Register Other: 5 bit EEPROM Memory Lock Control Fig. 2–3: Details of EEPROM and digital signal processing 8 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 2.2. Digital Signal Processing and EEPROM The DSP is the main part of this transducer and performs the signal conditioning. The parameters for the DSP are stored in the EEPROM registers. The details are shown in Fig. 2–3. Terminology: SENSITIVITY: name of the register or register value Sensitivity: name of the parameter The EEPROM registers consist of four groups: Group 1 contains the registers for the adaption of the transducer to the magnetic field generated by the current to be measured: MODE for selecting the magnetic field range and filter frequency to select the bandwidth of the transducer. Group 2 contains the registers for defining the output characteristics: SENSITIVITY, VOQ, CLAMP-LOW, and CLAMP-HIGH. The output characteristic of the transducer is defined by these 4 parameters. – The parameter VOQ (Output Quiescent Voltage) corresponds to the output voltage at B = 0 mT. – The parameter Sensitivity defines the magnetic sensitivity: V OUT Sensitivity = ---------------B – The output voltage can be calculated as: converter offset compensation, and several other special settings. An external magnetic field generates a Hall voltage on the Hall plate. The ADC converts the amplified positive or negative Hall voltage to a digital value. The digital signal is filtered in the internal low-pass filter and manipulated according to the settings stored in the EEPROM. The digital value after signal processing is readable in the D/A-READOUT register. Depending on the programmable magnetic range of the transducer IC, the operating range of the A/D converter is from 30 mT...+30 mT up to 100 mT...+100 mT. During further processing, the digital signal is multiplied with the sensitivity factor, added to the quiescent output voltage and limited according to the clamping voltage. The result is converted to an analog signal and stabilized by a push-pull output transistor stage. The D/A-READOUT at any given magnetic field depends on the programmed magnetic field range, the low-pass filter, TC values and CLAMP-LOW and CLAMP-HIGH. The D/A-READOUT range is min. 0 and max. 16383. Note: During application design, it should be taken into consideration that the maximum and minimum D/A-READOUT should not saturate in the operational range of the specific application. Range The RANGE bits are bit 2 and 3 of the MODE register; they define the magnetic field range of the A/D converter. V OUT Sensitivity B + V OQ The output voltage range can be clamped by setting the registers CLAMP-LOW and CLAMP-HIGH in order to enable failure detection (such as short-circuits to VDD or GND and open connections). Group 3 contains the general purpose register GP. The GP Register can be used to store customer information, like a serial number after manufacturing. Micronas will use this GP REGISTER to store informations like, Lot number, wafer number, x and y position of the die on the wafer, etc. This information can be readout by the customer and stored in it’s on data base or it can stay in the IC as is. Magnetic Field Range RANGE 30mT...30 mT 0 60 mT...60 mT 1 80 mT...80 mT 2 100 mT...100 mT 3 Group 4 contains the Micronas registers and LOCK for the locking of all registers. The Micronas registers are programmed and locked during production. These registers are used for oscillator frequency trimming, A/D Micronas March 24, 2011; DSH000155_002EN 9 CUR 3105 DATA SHEET Filter The FILTER bit is bit number 4 of the MODE register; it defines the 3 dB frequency of the digital low pass filter. 3 dB Frequency FILTER 500 Hz 0 1 kHz 1 Note: Please contact Micronas for further information about Multiplex Analog Output Mode. In Burn-In Mode, the signal path of the transducer DSP is stimulated internally without applied magnetic field. In this mode, the transducer provides a “saw tooth” shape output signal. Shape and frequency of the saw tooth signal depends on the programming of the transducer. This mode can be used for Burn-In test in the customers production line. Sensitivity Bit Time The BITTIME bit is bit number 5 of the MODE register; It defines the protocol bit time for the communication between the IC and the programmer board. Bit Time BITTIME 1:64 (Typ. 1.75 ms) 0 1:128 (Typ. 3.5 ms) 1 The SENSITIVITY register contains the parameter for the multiplier in the DSP. The Sensitivity is programmable between 4 and 4. For VDD = 5 V, the register can be changed in steps of 0.00049. For all calculations, the digital value from the magnetic field of the D/A converter is used. This digital information is readable from the D/A-READOUT register. V out 16383 SENSITIVITY = -------------------------------------------------------2 DA-Readout V DD Output Format The OUTPUTMODE bits are the bits number 6 to 7 of the MODE register; They define the different output modes. Output Format OUTPUTMODE Analog Output (12 bit) 0 Internal Burn-In Mode 2 Multiplex Analog Output (external trigger) VOQ The VOQ register contains the parameter for the adder in the DSP. VOQ is the output voltage without external magnetic field (B = 0 mT) and programmable from VDD up to VDD. For VDD = 5 V, the register can be changed in steps of 4.9 mV. Note: If VOQ is programmed to a negative voltage, the maximum output voltage is limited to: In Analog Output mode, the transducer provides an ratiometric 12-bit analog output voltage between 0 V and 5 V. V OUTmax = V OQ + V DD In Multiplex Analog Output mode, the IC transmits the LSN and MSN of the output value separately. This enables the IC to transmit a 14-bit signal. In external trigger mode the ECU can switch the output of the IC between LSN and MSN by changing current flow direction through IC output. In case the output is pulled up by a 10 k resistor the IC sends the MSN. If the output is pulled down the IC will send the LSN. Maximum refresh rate is about 500 Hz (2 ms). Three pins are sufficient. 10 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Clamping Voltage D/A-READOUT The output voltage range can be clamped in order to detect failures like shorts to VDD or GND or an open circuit. This 14-bit register delivers the actual digital value of the applied magnetic field after the signal processing. This register can be read out and is the basis for the calibration procedure of the IC in the system environment. The CLAMP-LOW register contains the parameter for the lower limit. The lower clamping voltage is programmable between 0 V and VDD/2. For VDD = 5 V, the register can be changed in steps of 9.77 mV. The CLAMP-HIGH register contains the parameter for the upper limit. The upper clamping voltage is programmable between 0 V and VDD. For VDD = 5 V, in steps of 9.77 mV. Note: The MSB and LSB are reversed compared with all the other registers. Please reverse this register after readout. GP Register This register can be used to store some information, like production date or customer serial number. Micronas will store production Lot number, wafer number and x,y coordinates in three blocks of this registers. The total register contains of four blocks with a length of 13 bit each. The customer can read out this information and store it in his own production data base for reference or he can change them and store own production information. Note: To enable programming of the GP register bit 0 of the MODE register has to be set to 1. This register is not a guarantee for trace-ability. LOCKR By setting the first bit of this 2-bit register, all registers will be locked, and the IC will no longer respond to any supply voltage modulation. This bit is active after the first power-off and power-on sequence after setting the LOCK bit. Warning: This register cannot be reset! Micronas March 24, 2011; DSH000155_002EN 11 CUR 3105 DATA SHEET 2.3. Calibration Procedure 2.3.1. General Procedure For calibration in the system environment, the application kit from Micronas is recommended. It contains the hardware for the generation of the serial telegram for programming (Programmer Board Version 5.1) and the corresponding software (PC3105) for the input of the register values. For the individual calibration of each transducer in the customer application, a two point adjustment is recommended. The calibration shall be done as follows: Step 1: Input of the registers which need not be adjusted individually The magnetic range (depending on the maximum field strength generated by the current), the filter frequency, the output mode and the GP Register value are given for this application. Therefore, the values of the following registers should be identical for all transducers of the customer application. – FILTER (according to the maximum signal frequency) – RANGE (according to the maximum magnetic field at the IC position) – OUTPUTMODE Note: For inverted output characteristics it is necessary to change SensitivityINITIAL to -0.5. Please contact your application support team for further details. Step 3: Define Calibration Points The calibration points 1 and 2 can be set inside the specified range. The corresponding values for VOUT1 and VOUT2 result from the application requirements. Lowclampingvoltage V OUT1,2 Highclampingvoltage For highest accuracy of the transducer, calibration points near the minimum and maximum input signal are recommended. The difference of the output voltage between calibration point 1 and calibration point 2 should be more than 3.5 V. Step 4: Calculation of VOQ and Sensitivity Set the system to calibration point 1 and read the register D/A-READOUT. The result is the value D/AREADOUT1. – GP (if the customer wants to store own production information. It is not necessary to change this register) Now, set the system to calibration point 2, read the register D/A-READOUT again, and get the value D/AREADOUT2. As the clamping voltages are given. They have an influence on the D/A-Readout value and have to be set therefore after the adjustment process. With these values and the target values VOUT1 and VOUT2, for the calibration points 1 and 2, respectively, the values for Sensitivity and VOQ are calculated as: Write the appropriate settings into the CUR3105 registers. 1 Vout2 – Vout1 16384 Sensitivity = --- --------------------------------------------------------------------------------- --------------2 D/A-Readout2 – D/A-Readout1 5 Step 2: Initialize DSP As the D/A-READOUT register value depends on the settings of SENSITIVITY, VOQ and CLAMPLOW/HIGH, these registers have to be initialized with defined values, first: – VOQINITIAL = 2.5 V 1 Vout2 16384 V OQ = ------ ------------------------------------- – 16 5 5 D/A-Readout2 – 8192 Sensitivity 2 -----------1024 – SensitivityINITIAL = 0.5 – Clamp-Low = 0 V – Clamp-High = 4.999 V 12 This calculation has to be done individually for each IC. March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Next, write the calculated values for Sensitivity and VOQ into the IC for adjusting the transducer. At that time it is also possible to store the application specific values for Clamp-Low and Clamp-High into the ICs EEPROM. The transducer is now calibrated for the customer application. However, the programming can be changed again and again if necessary. Note: For a recalibration, the calibration procedure has to be started at the beginning (step 1). A new initialization is necessary, as the initial values from step 1 are overwritten in step 4. Step 5: Locking the Transducer The last step is activating the LOCK function by programming the LOCK bit. Please note that the LOCK function becomes effective after power-down and power-up of the Hall IC. The IC is now locked and does not respond to any programming or reading commands. Warning: This register can not be reset! Micronas March 24, 2011; DSH000155_002EN 13 CUR 3105 DATA SHEET 3. Specifications 3.1. Outline Dimensions Fig. 3–1: TO92UT-2 Plastic Transistor Standard UT package, 3 leads Weight approximately 0.12 g 14 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Fig. 3–2: TO92UT-1 Plastic Transistor Standard UT package, 3 leads, spread Weight approximately 0.12 g Micronas March 24, 2011; DSH000155_002EN 15 CUR 3105 DATA SHEET Fig. 3–3: TO92UA/UT-2: Dimensions ammopack inline, not spread 16 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Fig. 3–4: TO92UA/UT: Dimensions ammopack inline, spread Micronas March 24, 2011; DSH000155_002EN 17 CUR 3105 DATA SHEET Fig. 3–5: SOIC8-1: Plastic Small Outline IC package, 8 leads, gullwing bent, 150 mil Ordering code: DJ Weight approximately 0.084 g 18 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 3.2. Dimensions of Sensitive Area 0.25 mm x 0.25 mm 3.3. Positions of Sensitive Areas TO92UT-1/-2 SOIC8-1 x n.a. 0 mm nominal y 1.5 mm nominal 0.197 mm nominal A4 0.3 mm nominal 0.38 mm nominal Bd 0.3 mm 0.3 mm D1 4.05 0.05 mm n.a. H1 min. 22.0 mm, max. 24.1 mm n.a. 3.4. Absolute Maximum Ratings Stresses beyond those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these conditions is not implied. Exposure to absolute maximum rating conditions for extended periods will affect device reliability. This device contains circuitry to protect the inputs and outputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than absolute maximum-rated voltages to this circuit. All voltages listed are referenced to ground (GND). Symbol Parameter Pin No. Min. Max. Unit Condition VDD Supply Voltage 1 8.5 8.5 V t < 96 h not additive VDD Supply Voltage 1 16 16 V 1) IDD Reverse Supply Current 1 501) mA VOUT Output Voltage 3 or 4 53) 53) 8.52) 161) V VOUT VDD Excess of Output Voltage over Supply Voltage 3 or 4 ,1 2 V IOUT Continuous Output Current 3 or 4 10 10 mA tSh Output Short Circuit Duration 3 or 4 10 min 1) 2) 5) not additive t<1h not additive t < 1 h, not additive as long as TJmax is not exceeded as long as TJmax is not exceeded, output is not protected to external 16 V) internal protection resistor = 50 Micronas March 24, 2011; DSH000155_002EN 19 CUR 3105 DATA SHEET 3.4.1. Storage and Shelf Life for TO92UT Package The permissible storage time (shelf life) of the sensors is unlimited, provided the sensors are stored at a maximum of 30 °C and a maximum of 85% relative humidity. At these conditions, no Dry Pack is required. Solderability is guaranteed for one year from the date code on the package. 3.4.2. Storage and Shelf Life for SOIC8 Package and the time frame “Time for Mounting after opening the MBB”. The dry-bag shelf life capability of sealed dry-bags is minimum 12 months starting from the “Bag seal date” printed on each bag. The SOIC8 package is a moisture-sensitive Surface Mount Device. The Moisture Sensitivity Level (MSL) is defined according to JEDEC J-STD-020 (Moisture/ Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices). The device is packed acc. to IPC/JEDEC J-STD-033: Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices. By using these procedures, safe and damage-free reflow can be achieved. If moisture-sensitive components have been exposed to ambient air for longer than the specified time according to their MSL, or the humidity indicator card indicates too much moisture after opening a Moisture Barrier Bag (MBB), the components have to be baked prior to the assembly process. Please refer to IPC/ JEDEC J-STD-033 for details. Please be aware that packing materials may not withstand higher baking temperatures. Please follow the instructions printed on each Moisture Barrier Bag. These instructions contain information about the Moisture Sensitivity Level “MSL”, the maximum reflow temperature “Peak Package Body Temp.” 3.5. Recommended Operating Conditions Functional operation of the device beyond those indicated in the “Recommended Operating Conditions/Characteristics” is not implied and may result in unpredictable behavior, reduce reliability and lifetime of the device. All voltages listed are referenced to ground (GND). Symbol Parameter Pin No. Min. Typ. Max. Unit VDD Supply Voltage 1 4.5 5 5.5 V IOUT Continuous Output Current 3 or 4 1.2 1.2 mA RL Load Resistor 3 or 4 5.0 10 k CL Load Capacitance 3 or 4 0.33 10 1000 nF NPRG Number of EEPROM Programming Cycles 100 Cycles 0°C < Tamb < 55°C TJ Junction Operating Temperature 1) 40 40 40 125 150 170 °C for 8000 h (not additive) for 2000 h (not additive) <1000 h (not additive) 1) 20 Remarks Can be pull-up or pulldown resistor Depends on the temperature profile of the application. Please contact Micronas for life time calculations March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 3.6. Characteristics at TJ = 40 °C to +170 °C (for temperature type A), VDD = 4.5 V to 5.5 V, GND = 0 V after programming and locking, at Recommended Operation Conditions if not otherwise specified in the column “Conditions”. Typical Characteristics for TJ = 25 °C and VDD = 5 V. For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the temperature range (Example: For K-Type this table is limited to TJ = 40 °C to +140 °C). Symbol Parameter Pin No. Min. Typ. Max. Unit IDD Supply Current over Temperature Range 1 7 10 mA Resolution 3 or 4 12 bit Differential Non-Linearity of D/A Converter 3 or 4 2.0 0 2.0 LSB DNL Conditions ratiometric to VDD 1) Only at 25 °C ambient temperature Production test limit INL 0.5 3 or 4 ER Ratiometric Error of Output over Temperature (Error in VOUT / VDD) 3 or 4 0.5 0 0.5 % VOUT1 - VOUT2> 2 V during calibration procedure Voffset Offset Drift over Temperature Range VOUT(B = 0 mT)25°C VOUT(B = 0 mT)max 3 or 4 0 0.15 0.25 % VDD VDD = 5 V; 60 mT range, 3 dB frequency = 500 Hz, 0.6 < sensitivity < 0.6 TK Temperature Coefficient of Sensitivity 3 or 4 0 ppm/k Variation see parameter ES ES Error in Magnetic Sensitivity over Temperature Range 3 or 4 2 0 2 % VDD = 5 V; 60 mT range, 3 db frequency = 500 Hz (see Section 3.6.1. on page 22) VOUTCL Accuracy of Output Voltage at Clamping Low Voltage over Temperature Range 3 or 4 45 0 45 mV RL = 5 k, VDD = 5 V VOUTCH Accuracy of Output Voltage at Clamping High Voltage over Temperature Range 3 or 4 45 0 45 mV RL = 5 k, VDD = 5 V VOUTH Upper Limit of Signal Band3) 3 or 4 4.65 4.8 V VDD = 5 V, 1 mA IOUT 1mA VOUTL Lower Limit of Signal Band 3) 3 or 4 0.2 0.35 V VDD = 5 V, 1 mA IOUT 1mA fADC Internal ADC Frequency over Temperature Range 128 kHz tr(O) Step Response Time of Output 3 or 4 2 1 3 2 ms ms 3 dB Filter frequency = 500 Hz 3 dB Filter frequency = 1 kHz CL = 10 nF, time from 10% to 90% of final output voltage for a step like signal Bstep from 0 mT to Bmax td(O) Delay Time of Output 3 or 4 0.1 0.5 ms CL = 10 nF tPOD Power-Up Time (Time to Reach Stabilized Output Voltage) 1.5 1.7 1.9 ms CL = 10 nF, 90% of VOUT BW Small Signal Bandwidth (3 dB) 3 or 4 1 kHz BAC < 10 mT; 3 dB Filter frequency = 1 kHz VOUTn RMS Noise on Output Voltage 3 or 4 6 15 mV magnetic range = 60 mT 3 dB Filter frequency = 500 Hz Sensitivity 0.7; C = 4.7 nF (VDD & VOUT to GND) ROUT Output Resistance over Recommended Operating Range 3 or 4 1 10 VOUTLmax VOUT VOUTHmin 1) 0.5 % For Vout = 0.35 V ... 4.65 V; VDD = 5 V Output DAC full scale = 5 V ratiometric, Output DAC offset = 0 V, Output DAC LSB = VDD/4096 2) if 3) 0 % of supply voltage2) Non-Linearity of Output Voltage over Temperature more than 50% of the selected magnetic field range is used and the temperature compensation is suitable Signal Band Area with full accuracy is located between VOUTL and VOUTH. The sensor accuracy is reduced below VOUTL and above VOUTH Micronas March 24, 2011; DSH000155_002EN 21 CUR 3105 Symbol DATA SHEET Parameter Pin No. Min. Typ. Max. Unit Conditions TO92UT Packages Thermal Resistance Rthja Junction to Air 235 K/W Measured with a 1s0p board Rthjc Junction to Case 61 K/W Measured with a 1s0p board Rthjs Junction to Solder Point 128 K/W Measured with a 1s1p board 180 K/W Measured with a 1s0p board 113 K/W Measured with a 1s1p board 73 K/W Measured with a 1s0p board 46 K/W Measured with a 1s1p board SOIC8 Package Thermal Resistance Rthja Rthjc Junction to Air Junction to Case 2.200 0.600 1.270 5.200 Fig. 3–1: Recommended pad size SOIC8 package 3.6.1. Definition of Sensitivity Error ES ES is the maximum of the absolute value of 1 minus the quotient of the normalized measured value1) over the normalized ideal linear2) value: ES = max abs meas ------------ – 1 ideal Tmin, Tmax In the below example, the maximum error occurs at °C: 10 ES = 1.001 ------------- – 1 = 0.8% 0.993 1) normalized to achieve a least-square-fit straight-line that has a value of 1 at 25 °C 2) normalized to achieve a value of 1 at 25 °C 22 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET ideal 200 ppm/k 1.03 relative sensitivity related to 25 °C value least-square-fit straight-line of normalized measured data measurement example of real sensor, normalized to achieve a value of 1 of its least-square-fit straight-line at 25 °C 1.02 1.01 1.001 1.00 0.993 0.99 0.98 50 25 -10 0 25 50 75 100 temperature [°C] 125 150 175 Fig. 3–2: ES definition example 3.7. Open-Circuit Detection at TJ = 40 °C to +170 °C (A-Type), Typical Characteristics for TJ = 25 °C, after locking the sensor. For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the temperature range (Example: For K-Type this table is limited to TJ = 40 °C to +140 °C). Symbol Parameter Pin No. Min. Typ. Max. Unit Comment VOUT Output Voltage at Open VDD Line 3 or 4 0 0 0.15 V VDD = 5 V RL = 10 kto 200 k 0 0 0.2 V VDD = 5 V RL = 5 kto 10 k 4.85 4.9 5.0 V VDD = 5 V 10 kRL 200 k 4.8 4.9 5.0 V VDD = 5 V 5 kRL < 10 k VOUT Output Voltage at Open GND Line 3 or 4 RL: Can be pull-up or pull-down resistor Micronas March 24, 2011; DSH000155_002EN 23 CUR 3105 DATA SHEET 3.8. Power-On Operation at TJ = 40 °C to +170 °C (A-Type), after programming and locking. Typical Characteristics for TJ = 25 °C For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the temperature range (Example: For K-Type this table is limited to TJ = 40 °C to +140 °C). Symbol Parameter Min. Typ. Max. Unit PORUP Power-On Reset Voltage (UP) 3.4 V PORDOWN Power-On Reset Voltage (DOWN) 3.0 V 3.9. Overvoltage and Undervoltage Detection at TJ = 40 °C to +170 °C (A-Type), Typical Characteristics for TJ = 25 °C, after programming and locking For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the temperature range (Example: For K-Type this table is limited to TJ = 40 °C to +140 °C). Symbol Parameter Pin No. Min. Typ. Max. Unit Test Conditions VDD,UV Undervoltage Detection Level 1 4.2 4.3 V 1) VDD,OV Overvoltage Detection Level 1 8.5 8.9 10.0 V 1) 1) If the supply voltage drops below VDD,UV or rises above VDD,OV, the output voltage is switched to VDD (97% of VDD at RL = 10 k to GND). The CLAMP-LOW register has to be set to a voltage 200 mV. Note: The over- and undervoltage detection is activated only after locking the sensor! 3.10. Magnetic Characteristics at TJ = 40 °C to +170 °C (A-Type), VDD = 4.5 V to 5.5 V, GND = 0 V after programming and locking, at Recommended Operation Conditions if not otherwise specified in the column “Conditions”. Typical Characteristics for TJ = 25 °C and VDD = 5 V. For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the temperature range (Example: For K-Type this table is limited to TJ = 40 °C to +140 °C). Symbol Parameter Pin No. Min. Typ. Max. Unit Test Conditions BOffset Magnetic Offset 3 or 4 0.5 0 0.5 mT B = 0 mT, IOUT = 0 mA, TJ = 25 °C, unadjusted sensor BOffset/T Magnetic Offset Change due to TJ 3 or 4 10 0 10 T/K B = 0 mT, IOUT = 0 mA 24 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 4. Application Notes 4.3. Ambient Temperature 4.1. Application Circuit Due to the internal power dissipation, the temperature on the silicon chip (junction temperature TJ) is higher than the temperature outside the package (ambient temperature TA). For EMC protection, it is recommended to connect one ceramic 100 nF capacitor each between ground and the supply voltage, respectively the output voltage pin. In addition, the input of the controller unit should be pulled-down with a 10 k resistor and a ceramic 4.7 nF capacitor. Please note that during programming, the sensor will be supplied repeatedly with the programming voltage of 12.5 V for 100 ms. All components connected to the VDD line at this time must be able to resist this voltage. T J = T A + T At static conditions and continuous operation, the following equation applies: VDD 4.7 nF T = I DD V DD R thJ OUT C HAL82x 4.7 nF 4.7 nF 10 k GND For typical values, use the typical parameters. For worst case calculation, use the max. parameters for IDD and RthJ, and the max. value for VDD from the application. For VDD = 5.5 V, RthjA = 235 K/W, and IDD = 10 mA, the temperature difference T = 12.93 K. Fig. 4–1: Recommended application circuit 4.2. Use of two CUR3105 in Parallel Two different CUR3105 current transducers which are operated in parallel to the same supply and ground line can be programmed individually. In order to select the IC which should be programmed, both ICs are inactivated by the “Deactivate” command on the common supply line. Then, the appropriate IC is activated by an “Activate” pulse on its output. Only the activated sensor will react to all following read, write, and program commands. If the second IC has to be programmed, the “Deactivate” command is sent again, and the second IC can be selected. Note: The multi-programming of two transducers works only if the outputs of the two IC’s are pulled to GND with a 10 k pull-down resistor. VDD For all sensors, the junction temperature TJ is specified. The maximum ambient temperature TAmax can be calculated as: T Amax = T Jmax – T 4.4. EMC and ESD The CUR3105 is designed for a stabilized 5 V supply. Interferences and disturbances conducted along the 12 V on board system (product standard ISO 7637 part 1) are not relevant for these applications. For applications with disturbances by capacitive or inductive coupling on the supply line or radiated disturbances, the application circuit shown in Fig. 4–1 is recommended. OUT A & Select A 100 nF CUR3105 Sensor A 100 nF CUR3105 Sensor B OUT B & Select B 100 nF GND Fig. 4–2: Parallel operation of two CUR3105 Micronas March 24, 2011; DSH000155_002EN 25 CUR 3105 DATA SHEET – Read a register (see Fig. 5–3) After evaluating this command, the transducer answers with the Acknowledge Bit, 14 Data Bits, and the Data Parity Bit on the output. 5. Programming of the Current Transducer 5.1. Definition of Programming Pulses The transducer is addressed by modulating a serial telegram on the supply voltage. The transducer answers with a serial telegram on the output pin. The bits in the serial telegram have a different bit time for the VDD-line and the output. The bit time for the VDD-line is defined through the length of the Sync Bit at the beginning of each telegram. The bit time for the output is defined through the Acknowledge Bit. A logical “0” is coded as no voltage change within the bit time. A logical “1” is coded as a voltage change between 50% and 80% of the bit time. After each bit, a voltage change occurs. – Programming the EEPROM cells (see Fig. 5–4) After evaluating this command, the transducer answers with the Acknowledge Bit. After the delay time tw, the supply voltage rises up to the programming voltage. – Activate a transducer (see Fig. 5–5) If more than one transducer is connected to the supply line, selection can be done by first deactivating all transducers. The output of all transducers will be pulled to ground by the internal 10 k resistors. With an Activate pulse on the appropriate output pin, an individual transducer can be selected. All following commands will only be accepted from the activated transducer. 5.2. Definition of the Telegram tr Each telegram starts with the Sync Bit (logical 0), 3 bits for the Command (COM), the Command Parity Bit (CP), 4 bits for the Address (ADR), and the Address Parity Bit (AP). tf VDDH tp0 logical 0 tp0 or VDDL There are 4 kinds of telegrams: – Write a register (see Fig. 5–2) After the AP Bit, follow 14 Data Bits (DAT) and the Data Parity Bit (DP). If the telegram is valid and the command has been processed, the transducer answers with an Acknowledge Bit (logical 0) on the output. tp1 VDDH tp0 logical 1 VDDL or tp0 tp1 Fig. 5–1: Definition of logical 0 and 1 bit Table 5–1: Telegram parameters Symbol Parameter Pin Min. Typ. Max. Unit VDDL Supply Voltage for Low Level during Programming 1 5 5.6 6 V VDDH Supply Voltage for High Level during Programming 1 6.8 8.0 8.5 V tr Rise Time 1 0.05 ms tf Fall Time 1 0.05 ms tp0 Bit Time on VDD 1 1.7 1.8 1.9 ms tp0 is defined through the Sync Bit tpOUT Bit Time on Output Pin 3 2 3 4 ms tpOUT is defined through the Acknowledge Bit tp1 Voltage Change for Logical 1 1, 3 50 65 80 % % of tp0 or tpOUT VDDPROG Supply Voltage for Programming the EEPROM 1 12.4 12.5 12.6 V tPROG Programming Time for EEPROM 1 95 100 105 ms 26 March 24, 2011; DSH000155_002EN Remarks Micronas CUR 3105 DATA SHEET Table 5–1: Telegram parameters, continued Symbol Parameter Pin Min. Typ. Max. Unit trp Rise Time of Programming Voltage 1 0.2 0.5 1 ms tfp Fall Time of Programming Voltage 1 0 1 ms tw Delay Time of Programming Voltage after Acknowledge 1 0.5 0.7 1 ms Vact Voltage for an Activate Pulse 3 3 4 5 V tact Duration of an Activate Pulse 3 0.05 0.1 0.2 ms Vout,deact Output Voltage after Deactivate Command 3 0 0.1 0.2 V Remarks WRITE Sync COM CP ADR AP DAT DP VDD Acknowledge VOUT Fig. 5–2: Telegram for coding a Write command READ Sync COM CP ADR AP VDD Acknowledge DAT DP VOUT Fig. 5–3: Telegram for coding a Read command trp tPROG tfp VDDPROG ERASE and PROM Sync COM CP ADR AP VDD Acknowledge VOUT tw Fig. 5–4: Telegram for coding the EEPROM programming VACT tr tACT tf VOUT Fig. 5–5: Activate pulse Micronas March 24, 2011; DSH000155_002EN 27 CUR 3105 DATA SHEET 5.3. Telegram Codes Address Parity Bit (AP) Sync Bit This parity bit is “1” if the number of zeros within the 4 Address bits is uneven. The parity bit is “0” if the number of zeros is even. Each telegram starts with the Sync Bit. This logical “0” pulse defines the exact timing for tp0. Data Bits (DAT) Command Bits (COM) The 14 Data Bits contain the register information. The Command code contains 3 bits and is a binary number. Table 5–2 shows the available commands and the corresponding codes for the CUR3105. The registers use different number formats for the Data Bits. These formats are explained in Section 5.4. Command Parity Bit (CP) In the Write command, the last bits are valid. If, for example, the TC register (10 bits) is written, only the last 10 bits are valid. This parity bit is “1” if the number of zeros within the 3 Command Bits is uneven. The parity bit is “0”, if the number of zeros is even. In the Read command, the first bits are valid. If, for example, the TC register (10 bits) is read, only the first 10 bits are valid. Address Bits (ADR) Data Parity Bit (DP) The Address code contains 4 bits and is a binary number. Table 5–3 shows the available addresses for the CUR3105 registers. This parity bit is “1” if the number of zeros within the binary number is even. The parity bit is “0” if the number of zeros is uneven. Acknowledge After each telegram, the output answers with the Acknowledge signal. This logical “0” pulse defines the exact timing for tpOUT. Table 5–2: Available commands Command Code Explanation READ 2 read a register WRITE 3 write a register PROM 4 program all nonvolatile registers (except the lock bits) ERASE 5 erase all nonvolatile registers (except the lock bits) 28 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET VOQ 5.4. Number Formats – The register range is from 1024 up to 1023. Binary number: – The register value is calculated by: The most significant bit is given as first, the least significant bit as last digit. V OQ VOQ = ----------- 1024 V DD Example: 101001 represents 41 decimal. SENSITIVITY Signed binary number: The first digit represents the sign of the following binary number (1 for negative, 0 for positive sign). Example: – The register value is calculated by: 0101001 represents +41 decimal 1101001 represents 41 decimal Two’s complementary number: SENSITIVITY = Sensitivity 2048 MODE The first digit of positive numbers is “0”, the rest of the number is a binary number. Negative numbers start with “1”. In order to calculate the absolute value of the number, calculate the complement of the remaining digits and add “1”. Example: – The register range is from 8192 up to 8191. 0101001 represents +41 decimal 1010111 represents 41 decimal – The register range is from 0 up to 255 and contains the settings for FILTER and RANGE: MODE = OUTPUTMODE 32 + BITRATE 16 + FILTER 8 + RANGE 2 + EnableProgGPRegisters D/A-READOUT 5.5. Register Information – This register is read only. – The register range is from 0 up to 16383. CLAMP-LOW – The register range is from 0 up to 255. DEACTIVATE – The register value is calculated by: – This register can only be written. LowClampingVoltage 2 CLAMP-LOW = --------------------------------------------------------------- 255 V DD – The register has to be written with 2063 decimal (80F hexadecimal) for the deactivation. – The transducer can be reset with an Activate pulse on the output pin or by switching off and on the supply voltage. CLAMP-HIGH – The register range is from 0 up to 511. – The register value is calculated by: HighClampingVoltage CLAMP-HIGH = ------------------------------------------------------ 511 V DD Micronas March 24, 2011; DSH000155_002EN 29 CUR 3105 DATA SHEET Table 5–3: Available register addresses Register Code Data Bits Format Customer Remark CLAMP-LOW 1 8 binary read/write/program Low clamping voltage CLAMP-HIGH 2 9 binary read/write/program High clamping voltage VOQ 3 11 two compl. binary read/write/program SENSITIVITY 4 14 signed binary read/write/program Range, filter, output mode, interface bit time settings MODE 5 8 binary read/write/program Range and filter settings LOCKR 6 2 binary read/write/program Lock Bit GP REGISTERS 1..3 8 13 binary read/write/program It is only possible to program this register if the mode register bit zero is set to 1. D/A-READOUT 9 14 binary read Bit sequence is reversed during read sequence. GP REGISTER 0 12 13 binary read/write/program It is only possible to program this register if the mode register bit zero is set to 1. DEACTIVATE 15 12 binary write Deactivate the transducer 30 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET Table 5–4: Data formats Char DAT3 DAT2 DAT1 DAT0 Register Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 CLAMP LOW Write Read V V V V V V V V V V V V V V V V CLAMP HIGH Write Read V V V V V V V V V V V V V V V V V V VOQ Write Read V V V V V V V V V V V V V V V V V V V V V V SENSITIVITY Write Read V V V V V V V V V V V V V V V V V V V V V V V V V V V V MODE Write Read V V V V V V V V V V V V V V V V LOCKR Write Read V V V V GP 1..3 Registers Write Read V V V V V V V V V V V V V V V V V V V V V V V V V V D/AREADOUT Read V V V V V V V V V V V V V V GP 0 Register Write Read V V V V V V V V V V V V V V V V V V V V V V V V V V DEACTIVATE Write 1 0 0 0 0 0 0 0 1 1 1 1 V: valid, : ignore, bit order: MSB first Micronas March 24, 2011; DSH000155_002EN 31 CUR 3105 DATA SHEET 5.5.1. Programming Information If the content of any register (except the lock registers) is to be changed, the desired value must first be written into the corresponding RAM register. Before reading out the RAM register again, the register value must be permanently stored in the EEPROM. Permanently storing a value in the EEPROM is done by first sending an ERASE command followed by sending a PROM command. The address within the ERASE and PROM commands must be zero. ERASE and PROM act on all registers in parallel. Note: To store data in the GP register it is necessary to set bit number 0 of the MODE register to one, before sending an ERASE and PROM command. Otherwise the data stored in the GP register will not be changed. If all registers of CUR3105 are to be changed, all writing commands can be sent one after the other, followed by sending one ERASE and PROM command at the end. During all communication sequences, the customer has to check if the communication with the transducer was successful. This means that the acknowledge and the parity bits sent by the transducer have to be checked by the customer. If the Micronas programmer board is used, the customer has to check the error flags sent from the programmer board. Note: For production and qualification tests, it is mandatory to set the LOCK bit after final adjustment and programming of CUR3105. The LOCK function is active after the next power-up of the transducer. The success of the Lock Process should be checked by reading at least one transducer register after locking and/or by an analog check of the transducers output signal. Electrostatic Discharges (ESD) may disturb the programming pulses. Please take precautions against ESD. 32 March 24, 2011; DSH000155_002EN Micronas CUR 3105 DATA SHEET 6. Data Sheet History 1. Data Sheet: “CUR 3105 Hall-Effect Current Transducer”, Oct. 12, 2009, DSH000155_001EN. First release of the data sheet. 2. Data Sheet: “CUR 3105 Hall-Effect Current Transducer”, March 24, 2011, DSH000155_002EN. Second release of the data sheet. Major Changes: – SOIC8 package added – TO92UT package drawings updated Micronas GmbH Hans-Bunte-Strasse 19 D-79108 Freiburg P.O. Box 840 D-79008 Freiburg, Germany Tel. +49-761-517-0 Fax +49-761-517-2174 E-mail: [email protected] Internet: www.micronas.com 33 March 24, 2011; DSH000155_002EN Micronas