RW1067 - NewHaven Display

RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
RW1067 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS
technology.
It can display 4 lines x 16 (5 x 8 dot format) or 2 lines x 16 (5 x 8 dot format). It is ideal for multilanguage application. Standard code RW1067-0C can support up to 25 different languages. With the
extended CGROM, maximum 1008 fonts can be included. Customized codes are available.
FUNCTIONS
- Character type dot matrix LCD driver & controller
- Internal drivers: 34 common and 80 segment or 18 common and 80 segment output
- Easy interface with 4-bit or 8-bit MPU or standard 4 lines / 3 lines serial peripheral interface (SPI )
- 5 x 8 dot matrix possible
- Bi-directional shift function
- All character reverse display
- Display shift per line
- Voltage converter for LCD drive voltage: 8 V max (2 times / 3 times)
- Various instruction functions
- Automatic power on reset
FEATURES
- Internal Memory
- Character Generator ROM (CGROM): 9,600 bits x 1+10,240 bits x 3 (240+256 x 3 characters x 5 x
8 dot)
- Character Generator RAM (CGRAM): 64 x 8 bits (8 characters x 5 x 8 dot)
- Icon RAM (SEGRAM): 16 x 8 bits (80 icons max.)
- Display Data RAM (DDRAM): 80 x 10 bits (80 characters max.)
- Low power operation
- Power supply voltage range: 2.7 ~ 5.5 V (VDD)
- LCD Drive voltage range: 3.0 ~ 7.2 V (V0 – Vss)
- CMOS process
- Programmable duty cycle: 1/17, 1/33 (refer to Table 1.)
- Internal oscillator with an external resistor
- Low power consumption
- Bare chip available
1
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RW1067 Serial Revision History
Version
Date
Description
1.1
Modify Time Characteristics 、
2006/04/11 AC Characteristics、
、DC Characteristics 
1.2
2006/07/05 Pad Configuration add Substrate connects to VSS
Add CHIP LAYOUT
1.3
、3-PIN SPI Circuit and initializing by
2006/07/14 Add 4-PIN、
instruction
1.4
2006/09/01 Add 4-line display mode circuit
1.5
2006/10/25 Add the Hebrew language
1.6
2007/1/22
1.7
2007/4/23
1.8
2007/9/10
1.9
2008/9/25
Correct typing mistake for DDRAM. Add explanation to
DDRAM section
Add I/O pad configuration and modify MPU interface
circuit
Modify Voltage converter for LCD drive voltage and LCD
Drive voltage range
Add Serial interface AC characteristics and Modify
standard Circuit
2
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Programmable duty cycles
(Table 1)
Display Line
Numbers
2
4
Single-chip Operation
Duty Ratio
1/17
1/33
Displayable characters
2 lines of 16 characters ( 5
x 8 dots )
4 lines of 16 characters ( 5
x 8 dots )
3
RockWorks Technology Corp.
Possible icons
80
80
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
OSC1
OSC2
Power on Reset
Oscillator
(POR)
XRESET
Timing Generator
PSB
//34 bit Sh
RS
E
8
Instruction
Register
(IR)
Register
34 bit Shift
System
Register
Interface
Serial
34 bit
Shift
4 bit
Register
8 bit
Instruction
Decoder
E / SCLK
Display Data
RAM (DDRAM)
80 x 10 bit
Address
Counter
RW
34 bit Shift
Register
Common
Driver
COM1 ~
COM33
ICON
7
7
10
DB7/SID
DB6/SCLK
DB5/CSB
8
84 bit
Shift
Register
8
Data
Regist
er
(DR)
Segment
Driver
8
Input /
Output
Buffer
DB4 ~DB0
Busy
Flag
7
3
Segment
RAM
(SEGRAM)
16 bytes
8
10
Character
Generator
ROM
(CGROM)
9600 bits x 4
Character
Generator
RAM
(CGRAM)
64 bytes
Cursor
and Blink
controller
VR
C1N
C1P
C2N
84 bit
Latch
Circuit
LCD
Driver
Voltage
Selector
Voltage Converter
5/6
5/6
C2P
Vout
VDD
Parallel / Serial Converter
GND
(VSS)
4
RockWorks Technology Corp.
V0 ~ V4
SEG1~
SEG80
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
114 SEG27
115 SEG28
116 SEG29
117 SEG30
118 SEG31
119 SEG32
120 SEG33
121 SEG34
122 SEG35
123 SEG36
124 SEG37
125 SEG38
126 SEG39
127 SEG40
128 SEG41
129 SEG42
130 SEG43
131 SEG44
132 SEG45
133 SEG46
134 SEG47
135 SEG48
136 SEG49
137 SEG50
138 SEG51
139 SEG52
140 SEG53
141 SEG54
142 SEG55
PAD CONFIGURATION
+
SEG56
1
113
SEG26
SEG57
2
112
SEG25
SEG58
3
111
SEG24
SEG59
4
110
SEG23
SEG60
5
109
SEG22
SEG61
6
108
SEG21
SEG62
7
107
SEG20
SEG63
8
106
SEG19
SEG64
9
105
SEG18
SEG65
10
104
SEG17
SEG66
11
103
SEG16
SEG67
12
102
SEG15
SEG68
13
101
SEG14
SEG69
14
100
SEG13
SEG70
15
99
SEG12
SEG71
16
SEG72
17
SEG73
18
96
SEG9
SEG74
19
95
SEG8
SEG75
20
SEG76
21
SEG77
22
92
SEG5
SEG78
23
91
SEG4
SEG79
24
SEG80
25
MARK
C0501
Y
(0, 0)
X
COM32 26
Chip size: 4856 x 3455
Pad Pitch: 105~130
Pad size: 90 x 90
Chip thickness: 482.6
Unit: µm
COM31 27
COM30 28
COM29 29
COM28 30
COM27 31
COM26 32
Substrate connects to VSS
COM25 33
98
SEG11
97
SEG10
94
SEG7
93
SEG6
90
SEG3
89
SEG2
88
SEG1
87
COM24
86
COM23
85
COM22
84
COM21
83
COM20
82
COM19
81
COM18
COM16 34
80
COM17
COM15 35
79
COM8
COM14 36
78
COM7
COM13 37
77
COM6
COM12 38
76
COM5
COM11 39
75
COM4
COM10 40
74
COM3
COM09 41
73
COM2
ICON1
72
COM1
66
67
68
69
70
71
V1
V2
V3
V4
ICON 2
59
DB6/SCLK
V0
58
DB5/CSB
65
57
DB4
VOUT
56
DB3
64
55
DB2
C1N
54
DB1
63
53
DB0
C1P
52
E
62
51
RW
C2N
50
RS
61
49
VSS
C2P
48
VR
DB7/SID 60
47
45
OSC1
PSB
44
XRESET 46
43
VDD
42
OSC2
5
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CHIP LAYOUT
PIN 1
Analog
6
RockWorks Technology Corp.
ROM
ROM
ROM
ROM
RAM
Digital
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD LOCATION
UNIT: (µm )
PAD
NUMB
ER
PAD
NAME
COORDINATE
X
Y
1
SEG56
-2203
-1623
2
SEG57
-2073
-1623
3
SEG58
-1953
-1623
4
SEG59
-1843
-1623
5
SEG60
-1738
-1623
6
SEG61
-1632
-1623
7
SEG62
-1527
-1623
8
SEG63
-1422
-1623
9
SEG64
-1316
-1623
10
SEG65
-1211
-1623
11
SEG66
-1106
-1623
12
SEG67
-1000
-1623
13
SEG68
-895
-1623
14
SEG69
-790
-1623
15
SEG70
-685
-1623
16
SEG71
-579
-1623
17
SEG72
-474
-1623
18
SEG73
-369
-1623
19
SEG74
-263
-1623
20
SEG75
-158
-1623
21
SEG76
-53
-1623
22
SEG77
53
-1623
23
SEG78
158
-1623
24
SEG79
263
-1623
25
SEG80
369
-1623
26
COM32
474
-1623
27
COM31
579
-1623
28
COM30
684
-1623
29
COM29
790
-1623
30
COM28
895
-1623
31
COM27
1000
-1623
32
COM26
1106
-1623
33
COM25
1211
-1623
34
COM16
1316
-1623
35
COM15
1422
-1623
36
COM14
1527
-1623
37
COM13
1632
-1623
38
COM12
1738
-1623
39
COM11
1843
-1623
40
COM10
1953
-1623
41
COM9
2073
-1623
42
ICON1
2203
-1623
43
VDD
2323
-1503
44
OSC2
2323
-1373
45
OSC1
2323
-1253
46
XRESET
2323
-1143
47
PSB
2323
-1039
48
VR
2323
-935
* “RW1067“Marking: easy to find the PAD No: 1
PAD
NU
MBE
R
PAD
NAME
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
VSS
RS
RW
E
DB0
DB1
DB2
DB3
DB4
DB5 / CSB
DB6 / SCLK
DB7 / SID
C2P
C2N
C1P
C1N
VOUT
V0
V1
V2
V3
V4
ICON2
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
COORDINATE
X
Y
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2323
2203
2073
1953
1843
1738
1632
1527
1422
1316
1211
1106
1000
895
790
684
579
474
369
263
158
53
-53
-158
-263
-369
-831
-727
-623
-519
-415
-312
-208
-104
0
104
208
312
416
519
623
727
831
935
1039
1143
1253
1373
1503
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
7
RockWorks Technology Corp.
PAD
NU
MBE
R
PAD
NAME
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
COORDINATE
X
Y
-474
-580
-685
-790
-895
-1000
-1106
-1211
-1316
-1422
-1527
-1632
-1738
-1843
-1953
-2073
-2203
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
-2323
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1623
1503
1373
1253
1143
1039
935
831
727
623
519
416
312
208
104
0
-104
-208
-312
-415
-519
-623
-727
-831
-935
-1039
-1143
-1253
-1373
-1503
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DESCRIPTION
PAD
INPUT/OU
TPUT
DESCRIPTION
VDD
VSS
INTERFACE
For logical circuit(+3V,+5V)
-
Power supply
V0-V4
0V (GND)
Power supply
Bias voltage level for LCD driving
VR
Input
Reference
input voltage
SEG1-SEG80
Output
Segment
output
Segment signal output for LCD drive
LCD
ICON1、ICON2
Output
Common
output
Common signal output for LCD drive
LCD
COM1-COM32
Output
Common
output
Common signal output for LCD drive
LCD
Oscillator
When use internal oscillator, connect external
Rf resistor.
If external clock is used, connect it to OSC1、
OSC2 is floating.
External
Capacitance
input
To use the voltage converter (2 times/ 3
times), these pins must be connected to the
external capacitance.
(Please see page 36 for more detail)
OSC1,OSC2
C1N,C1P
C2N,C2P
Input
(OSC1),
Output
(OSC2)
Input
XRESET
Input
VOUT
Output
Reset pin
Two / Three
times
converter
output
Reference voltage input to generate V0
Initialized to Low
Voltage converter output voltage
8
RockWorks Technology Corp.
-
External
resistor/oscillator
(OSC1)
External
Capacitance
-
-
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DESCRIPTION (continued)
DESCRIPTION
PAD
INPUT/OU
TPUT
PSB
Input
Interface
mode
selection
RS
Input
Register select
E
Input
Read. Write
enable
Input
Read.
Write
Input.
Output
Data bus 0~3
Input.
Output
Data bus 4
In 8-bit bus mode, used as high order bi-directional data bus.
In case of 4-bit bus mode, used as both high and low order.
MPU
Input.
Output
Data bus 5 /
Chip select
In 8-bit bus mode, used as high order bi-directional data bus.
In case of 4-bit bus mode, used as both high and low order.
In serial mode, used as chip selection input.
When CSB = “Low”, selected
When CSB = “High”, not selected. ( Low access enable )
MPU
DB6/SCLK
Input.
Output
Data bus 6 /
Serial clock
In 8-bit bus mode, used as high order bi-directional data bus.
In case of 4-bit bus mode, used as both high and low order.
In serial mode, used as serial clock input pin.
MPU
DB7/SID
Input.
Output
Data bus 7 /
Serial input
data
In 8-bit bus mode, used as high order bi-directional data bus.
In case of 4-bit bus mode, used as both high and low order.
DB7 used for Busy Flag output.
In serial mode, used for data input pin.
MPU
RW
DB0-DB3
DB4
DB5/CSB
INTERFACE
Select Interface mode with the MPU.
When PSB = “Low” : Serial mode,
When PSB = “High”: 4 -bit / 8 -bit bus mode.
MPU
In bus mode, used as register selection input.
When RS = “High”, Date register is selected.
When RS = “Low”, Instruction register is selected.
MPU
In bus mode, used as read write enable signal.
MPU
In bus mode, used as read / write selection input.
When RW =”High”, read operation.
When RW =”Low”, write operation.
MPU
In 8-bit bus mode, used as low order bi-directional data bus.
During 4-bit bus mode or serial mode, open these pins.
.
9
RockWorks Technology Corp.
MPU
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INSTRUCTION DESCRIPTION
Instruction
Instruction Code
RE
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Description
Execution
Time
( fosc = 270
kHz )
Clear
Display
x
0
0
0
0
0
0
0
0
0
1
Write “20H” to DDRAM. and set
DDRAM address to “00H” from AC.
1.53ms
Return
Home
0
0
0
0
0
0
0
0
0
1
X
Set DDRAM address to “00H” from
AC and return cursor to its original
position if shifted.
The contents of DDRAM are not
changed.
1.53ms
1
0
0
0
0
0
0
0
0
1
PD
Set power down mode bit.
PD = “1” : power down mode set,
PD = “0”: power down mode
disable.
S
Assign cursor moving direction.
I/D = “1”: increment
I/D = “0”: decrement
And display shift enable bit.
S = “1”: make display shift of the
enabled lines by the DS4
- DS1 bits in the Shift Enable
instruction.
S = “0”: display shift disable
Power
Down
Mode
Entry
Mode
Set
0
1
Display
ON/OFF
Control
Extended
Function
set
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
D
1
0
10
RockWorks Technology Corp.
I/D
1
C
B/W
BID
37µs
37µs
Segment bi-direction function.
BID = “1”: Seg80→Seg1
BID = “0”: Seg1→Seg80
B
Set display / cursor / blink on/off
D = “1”: display on,
D = “0”: display off,
C = “1”: cursor on,
C = “0”: cursor off,
B = “1”: blink on,
B = “0: blink off.
37µs
NW
Assign black/white inverting of
cursor, and 4-line display mode
control bit.
B/W = “1”: black/white inverting of
cursor enable,
B/W = “0”: black/white inverting of
cursor disable
NW =”1”: 4-line display mode,
NW =”0”: 2-line display mode.
37µs
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Instruction
Cursor or
Display
shift
Shift Enable
Instruction Code
RE
0
Description
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
1
S/C
R/L
X
X
1
0
0
0
0
0
1
DS4
DS3
DS2
DS1
1
0
0
0
0
0
1
X
X
CB1
CB0
Cursor or display shift.
S/C = “1” : display shift,
S/C = “0” : cursor shift,
R/L = “1” : shift to right,
R/L = “0”: shift to left.
(when DC = “1“ )
Determine the line for display shift.
DS1 = “1/0”: 1st line display shift
enable/disable
DS2 = “1/0”: 2nd line display shift
enable/disable
DS3 = “1/0”: 3rd line display shift
enable/disable
DS4 = “1/0: “4th line display shift
enable/disable.
Execution
Time
( fosc = 270
kHz )
37µs
37µs
(when DC = “0“ )
Code Bank
Selection
Function
Set
0
0
0
0
0
1
IF
X
RE(0)
DC
REV
1
0
0
0
0
1
IF
X
RE(1)
BE
0
11
RockWorks Technology Corp.
(CB1, CB0) = ( 0, 0 ) ROM code Bank 0 selected
( 0, 1 ) ROM code Bank 1 selected
( 1, 0 ) ROM code Bank 2 selected
( 1, 1 ) ROM code Bank 3 selected
37µs
Set interface data length
(IF =”1”: 8-bit, IF =”0”: 4-bit ),
extension register, RE(“0”),
shift enable.
DC=”1”: enable display shift per line.
DC=”0”: enable the selection of code bank.
Reverse bit
REV =”1”: reverse display,
REV =”0”: normal display.
37µs
Set IF,N, RE(“1”) and CGRAM/SEGRAM
blink enable (BE)
BE = “1/0”: CGRAM/SEGRAM blink
enable/disable.
37µs
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Instruction
Instruction Code
RE
Description
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Execution
Time
( fosc = 270
kHz )
Set
CGRAM
Address
0
0
0
0
1
AC5
AC4
AC3
AC2
AC1
AC0
Set CGRAM address in address
counter.
Set
SEGRAM
Address
1
0
0
0
1
X
X
AC3
AC2
AC1
AC0
Set SEGRAM address in address
counter
Set
DDRAM
Address
0
0
0
1
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Set DDRAM address in address
counter
37µs
Set Data
Length
1
0
0
1
SD6
SD5
SD4
SD3
SD2
SD1
SD0
Set data length for 3 line SPI
37µs
Can know internal operation is ready
or not by reading BF.
The contents of address counter
can also be read.
BF = “1” : busy state,
BF =”0”: ready state.
0µs
Read Busy
flag and
Address
X
0
1
BF
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write Data
X
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write data into internal RAM.
(DDRAM / CGRAM / SEGRAM).
Read Data
X
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data from internal RAM.
(DDRAM / CGRAM / SEGRAM).
37µs
37µs
43µs
43µs
Note : 1. When an MPU program with Busy Flag(DB7) checking is made, 1/ 2 FOSC ( is necessary ) for executing
the next instruction by the “ E “ signal after the Busy Flag ( DB7) goes to “ Low ”.
2.
“ X ” Don’t care
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RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4 lines x 16 (5 x 8 dot format)
2 lines x 16 (5 x 8 dot format)
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RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FUNCTION DESCRIPTION
SYSTEM INTERFACE
This chip has all three kinds interface type with MPU: serial, 4-bit bus and 8-bit bus. Serial and bus (4bit/8-bit) is selected by PSB input, and 4-bit bus and 8-bit bus is selected by IF bit in the instruction
register. During read or write operation, two 8-bit registers are used. One is data register (DR), the
other is instruction register (IR). The data register (DR) is used as temporary data storage place for
being written into or read from DDRAM/CGRAM/SEGRAM, target RAM is selected by RAM address
setting instruction. Each internal operation, reading from or writing into RAM, is done automatically.
So to speak, after MPU reads DR data, the data in the next DDRAM/CGRAM/SEGRAM address is
transferred into DR automatically. Also after MPU writes data to DR, the data in DR is transferred into
DDRAM/CGRAM/SEGRAM automatically.
The Instruction register (IR) is used only to store instruction code transferred from MPU. MPU cannot
use it to read instruction data. To select register, use RS input pin in 4-bit/8-bit bus mode (PSB =
"High") or RS bit in serial mode (PSB= "Low").
RS
0
0
1
1
R/W
0
1
0
1
Operation
Instruction write operation (MPU writes Instruction code into IR)
Read busy flag (DB7) and address counter (DB0 - DB6)
Data write operation (MPU writes data into DR)
Data read operation (MPU reads data from DR)
BUSY FLAG (BF)
When BF = "High", it indicates that the internal operation is being processed. So during this time the
next instruction cannot be accepted. BF can be read, when RS = Low and R / W = High (Read
Instruction Operation), through DB7 Before executing the next instruction, be sure that BF is not High.
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RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
DISPLAY DATA RAM (DDRAM)
DDRAM stores display data of maximum 80 x 10 bits (80 characters). DDRAM address is set in the
address counter (AC) as a hexadecimal number. (refer to Figure 1.)
MSB
AC6
LSB
AC5
AC4
AC3
AC2
AC1
AC0
Figure 1. DDRAM Address
Since DDRAM has 10 bits data. It is possible to access 1024 CGROM/CGRAM fonts. Please first set
the code bank which is described in page 27 (2bits) then use “data write”(8 bits data). Total 10 bits of
data will be stored in DDRAM by this way. Code bank data doesn’t need to be set repeatedly if
selected characters are in the same bank. Please also be noted that CGRAM only exit in bank 0
locations.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5-dot 2-line Display
In case of 2-line display with 5-dot font, the address range of DDRAM is 00H-27H, 40H-67H
(refer to Figure 2.)
1
2
3
4
5
6
7
8
9
10
COM1
COM8
00
01
02
03
04
05
06
07
08
09 0A 0B 0C 0D 0E 0F ← DDRAM Address
COM9
COM16
40
41
42
43
44
45
46
47
48
49 4A 4B 4C 4D 4E 4F
1
01
2
02
3
03
4
04
5
05
6
06
7
07
8
08
9 10 11 12 13 14 15
09 0A 0B 0C 0D 0E 0F
16
10
41
42
43
44
45
46
47
48
49 4A 4B 4C 4D 4E 4F
50
COM1
COM8
COM9
COM16
11
12
13
14
15
16 ← Display Position
(After Shift Left)
1
2
3
4
5
6
7
9
10
11
COM1
COM8
8
27
00
01
02
03
04
05 060 07
08
09 0A 0B 0C 0D 0E
COM9
COM16
67
40
41
42
43
44
45
48
49 4A 4B 4C 4D 4E
46
47
12
13
14
15
(After Shift Right)
( Figure 2) 2 - line X 16ch. Display ( 5-dot Font Width )
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RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5-dot 4-line Display
In case of 4-line display with 5-dot font, the address range of DDARM is 00H-13H, 20H-33H, 40H-53H,
60H-73H.
(refer to Figure 3)
1
COM1
COM8
COM9
COM16
COM17
COM24
COM25
COM32
2
3
4
5
6
7
COM9
COM16
COM17
COM24
COM25
COM32
11
12
13
14
15
16 ← Display Position
0F ← DDRAM Address
20 21 22 23 24 25 26 27 29 29 2A 2B 2C 2D 2E
2F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E
4F
60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E
6F
1
COM8
10
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E
RW1067
SEG1
COM1
8 9
2
3
4
5
6
7
8
9
SEG80
10
11
12
13
14
15
16
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
10
21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F
30
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
50
61 62
70
63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F
(After Shift Left)
1
COM1
COM8
COM9
COM16
COM17
COM24
COM25
COM32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
13 00 01 02 03 04 05 06 07 08
09
0A 0B 0C 0D 0E
33 20 21 22 23 24 25 26 27 28
29
2A 2B 2C 2D 2E
53 40 41 42 43 44 45 46 47 48
49
4A 4B 4C 4D 4E
73 60 61 62 63 64 65 66 67 68
69
6A 6B 6C 6D 6E
(After Shift Right)
( Figure 3) 4 - line X 32ch. Display ( 5-dot Font Width )
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RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
TIMING GENERATION CIRCUIT
Timing generation circuit generates clock signals for the internal operations.
ADDRESS COUNTER (AC)
Address Counter (AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR.
After writing into (reading from) DDRAM/CGRAM/SEGRAM, AC is automatically increased (decreased)
by 1.
When RS = "Low" and R/W = "High", AC can be read through DB0-DB6
CURSOR/BLINK CONTROL CIRCUIT
It controls cursor/blink ON/OFF and black/white inversion at cursor position.
LCD DRIVER CIRCUIT
LCD Driver circuit has 34 common and 80 segment signals for LCD driving.
Data from SEGRAM/CGRAM/CGROM is transferred to 80 bit segment latch serially,
and then it is stored to 80 bit shift latch. When each COM is selected by 34bit common register,
segment data also output through segment driver from 80 bit segment latch. In case of 2 line (5 dots
width) display mode, COM0-COM17 have 1/17 duty, In 4-line mode, COM0-COM33 have 1/33 duty
ratio.
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RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CGROM (CHARACTER GENERATOR ROM)
CGROM has 9,600 bits x 1+10,240 bits x 3 (240+256 x 3 characters x 5 x 8 dot)
CGRAM (CHARACTER GENERATOR RAM)
CGRAM has up to 5 × 8 dots 8 characters. By writing font data to CGRAM, user defined character
can be used ( refer to Table 2 ).
5 x 8dots Character Pattern
Table 2. Relationship between Character Code (DDRAM) and Character Pattern (CGRAM)
Character Code (DDRAM data)
CGRAM Address
CGRAM Data
D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0
0
0
0
0 0 0
0
0
0
0
0
0
0
0 B1 B0 X 0
1
1
1
0
0
0
1
1
0
0
0
1
.
.
0
1
0
.
1
0
0
0
1
.
.
0
1
1
.
1
1
1
1
1
.
.
1
0
0
.
1
0
0
0
1
.
.
1
0
1
.
1
0
0
0
1
1
1
0
1
0
0
0
1
1
1
1
0
0
0
0
0
.
.
.
.
.
.
.
.
0
0
0
0 0 1
1
1
1
1
1
0
0
0 B1 B0 X 1
0
0
0
1
0
0
1
1
0
0
0
1
0
1
0
1
0
0
0
1
.
.
0
1
1
.
1
1
1
1
1
.
.
1
0
0
.
1
0
0
0
1
.
.
1
0
1
.
1
0
0
0
1
.
.
1
1
0
.
1
0
0
0
1
1
1
1
0
0
0
0
0
Pattern
Number
Pattern 1
Pattern 8
1. When BE (Blink Enable bit) = "High", blink is controlled by B1 and B0 bit.
In case of 6-dot font width, when B1 = "1", enabled dots of P0-P5 will blink, and when B1 = "0" and B0 = "1",
enabled dots of P5 will blink, when B1 = "0" and B0 = "0", blink will not happen.
2. "X": Don't care
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
SEGRAM (SEGMENT ICON RAM)
SEGRAM has segment control data and segment pattern data. There are 2 ICON pins act as the
COM line to display the icon SEGRAM data. The outputs of these 2 ICON pins are exactly the same.
The higher 2-bits of SEGRAM data are blinking control data, and lower 6-bits are pattern data (refer to
Table 3 and Figure 4).
Table 3. Relationship between SEGRAM Address and Display Pattern
SEGRAM Data Display Pattern
SEGRAM Address
5-dot Font Width
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1.
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D7
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
D6
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
B0
D5
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D4
S1
S6
S11
S16
S21
S26
S31
S36
S41
S46
S51
S56
S61
S66
S71
S76
D3
S2
S7
S12
S17
S22
S27
S32
S37
S42
S47
S52
S57
S62
S67
S72
S77
D2
S3
S8
S13
S18
S23
S28
S33
S38
S43
S48
S53
S58
S63
S68
S73
S78
B1, B0: Blinking control bit
Control Bit
BE
0
1
1
1
B1
X
0
0
1
Blinking Port
5- dot font width
No blink
No blink
D4
D4 - D0
B0
X
0
1
X
2. S1 - S80: Icon pattern ON/OFF in 5- dot font width
3. " X " : Don't care
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D1
S4
S9
S14
S19
S24
S29
S34
S39
S44
S49
S54
S59
S64
S69
S74
S79
D0
S5
S10
S15
S20
S25
S30
S35
S40
S45
S50
S55
S60
S65
S70
S75
S80
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5 Dot Font Width
Figure 4. Relationship between SEGRAM and Segment Display
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RockWorks Technology Corp.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INSTRUCTION DESCRIPTION
OUTLINE
To overcome the speed difference between internal clock of RW1067 and MPU clock, RW1067
performs internal operation by storing control information to IR or DR. The internal operation is
determined according to the signal from MPU, composed of read/write and data bus.
Instruction can be divided largely four kinds;
• RW1067 function set instructions (set display methods, set data length, etc.)
• Address set instructions to internal RAM
• Data transfer instructions with internal RAM
• Others
The address of internal RAM is automatically increased or decreased by 1.
NOTE: During internal operation, Busy Flag (DB7) is read high. Busy Flag check must be proceeded the next
instruction.
Busy flag check must be proceeded the next instruction.
When an MPU program with Busy Flag (DB7) checking is made, 1/2 Fosc (is necessary) for executing the
next instruction by the falling edge of the “E” signal after the Busy Flag (DB7) goes to “Low”.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Display Clear
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
0
DB1
0
DB0
1
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM
address to "00H" into AC (address counter). Return cursor to the original status, namely, bring the
cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1").
Return Home: (RE = 0)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
0
DB1
1
DB0
X
Return Home is cursor return home instruction. Set DDRAM address to "00H" into the address counter.
Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM
do not change.
Power Down Mode Set: (RE = 1)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
0
DB1
1
DB0
PD
Power down mode enable bit set instruction.
PD = “High”, it makes RW1067 suppress current consumption except the current needed for data
storage by executing next three functions.
1. Makes the output value of all the COM / SEG ports VSS.
2. Disable voltage converter to remove the current through the divide resistor of power supply.
This instruction can be used as power sleep mode.
When PD = “Low”, power down mode becomes disabled.
Entry Mode Set: (RE = 0)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
1
DB1
I/D
DB0
S
Set the moving direction of cursor and display.
I/D: Increment/decrement of DDRAM address (cursor or blink)
When I/D = "High", cursor/blink moves to right and DDRAM address is increased by 1.
When I/D = "Low", cursor/blink moves to left and DDRAM address is decreased by 1.
CGRAM/SEGRAM operates the same as DDRAM, when read from or write to CGRAM/SEGRAM.
When S = "High", after DDRAM write, the display of enabled line by DS1 – DS2 bits in the shift enable
instruction is shifted to the right (I/D = "0") or to the left (I/D = "1"). But it will seem as if the cursor does
not move. When S = "Low", or DDRAM read, or CGRAM/SEGRAM read/write operation, shift of
display like this function is not performed.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Entry Mode Set: (RE = 1)
RS
R/W
DB7
DB6
DB5
DB4
0
0
0
0
0
0
Set the data shift direction of segment in the application set.
DB3
0
DB2
1
DB1
1
DB0
BID
BID: Data Shift Direction of Segment
When BID = "Low", segment data shift direction is set to normal order from SEG1 to SEG80.
When BID = "High", segment data shift direction is set to reverse from SEG80 to SEG1.
By using this instruction, the efficiency of application board area can be raised.
- The BID setting instruction is recommended to be set at the same time level of function set
instruction.
- DB1 bit must be set to “1”.
Display ON/OFF Control (RE = 0)
RS
R/W
DB7
DB6
DB5
0
0
0
0
0
Control display/cursor/blink ON/OFF 1 bit register.
D:
DB4
0
DB3
1
DB2
D
DB1
C
DB0
B
Display ON/OFF control bit
When D = "High", entire display is turned on.
When D = "Low", display is turned off, but display data is remained in DDRAM.
Cursor ON/OFF control bit
When C = "High", cursor is turned on.
When C = "Low", cursor is disappeared in current display, but I/D register remains its data.
Cursor Blink ON/OFF control bit
When B = "High", cursor blink is on, that performs alternate between all the high data and
display character at the cursor position. If fOSC has 270 kHz frequency, blinking has 370 ms
interval.
When B = "Low", blink is off.
C:
B:
Extended Function Set (RE = 1)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
1
DB2
0
DB1
B/W
DB0
NW
B/W: Black/ white inversion enable bit
When B/W = "High", black/white inversion at the cursor position is set. In this case C/B bit of
display ON/OFF control instruction becomes don't care condition. If fosc has frequency of 270
kHz, inversion has 70 ms intervals.
NW: NW =”1”: 4-line display mode,
NW: NW =”0”: 2-line display mode.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Cursor or Display Shift (RE = 0)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
1
DB3
S/C
DB2
R/L
DB1
-
DB0
-
Without writing or reading of display data, shift right/left cursor position or display. This instruction is
used to correct or search display data (refer to Table 4). During 2-line mode display, cursor moves to
the 2nd line after 40th digit of 1st line.
When 4-line mode, cursor moves to the next line, only after every 20th digit of the current line.
Note that display shift is performed simultaneously in all the line enabled by DS1 - DS4 in the shift
enable instruction. When displayed data is shifted repeatedly, each line shifted individually. When
display shift is performed, the contents of address counter are not changed.
During low power consumption mode, display shift may not be performed normally.
Table 4. Shift Patterns According to S/C and R/L Bits
S/C
0
0
1
1
R/L
0
1
0
1
Shift
Shift
Shift
Shift
Operation
cursor to the left, address counter is decreased by 1
cursor to the right, address counter is increased by 1
all the display to the left, cursor moves according to the display
all the display to the right, cursor moves according to the display
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Code Bank Selection
(DC=0)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
1
DB3
x
DB2
x
DB1
CB1
DB0
CB0
There are 4 different code banks with each 256 fonts of 5 x 8 bits
CB1
0
0
1
1
CB0
0
1
0
1
code bank 0
code bank 1
code bank 2
code bank 3
When writing to DDRAM for each displaying character the code bank must be properly set.
Shift Enable
(DC=1)
RS
0
R/W
0
DB7
0
DB6
0
DB5
0
DB4
1
DB3
DS4
DB2
DS3
DB1
DS2
DB0
DS1
DS: Display Shift per Line Enable
This instruction selects shifted to be according to each line mode in display shift right/left
instruction.
DS1, DS2 indicate each line to be shifted, and each shift is performed individually in each line.
Table 5. Relationship between DS and COM Signal (4 lines)
Enable Bit
Enabled Common Signals during Shift
Operation
DS1
DS2
DS3
DS4
COM1 ~ COM8
COM9 ~ COM16
COM17 ~ COM24
COM25 ~ COM32
The parts of display line the
Corresponds to enabled
Common signal can be shifted.
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RockWorks Technology Corp.
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34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Function Set
(RE = 0)
RS
0
IF:
R/W
0
DB7
0
DB6
0
DB5
1
DB4
IF
DB3
X
DB2
RE(0)
DB1
DC
DB0
REV
Interface data length control bit
When IF = "High", it means 8-bit bus mode with MPU.
When IF = "Low", it means 4-bit bus mode with MPU. So to speak ,IF is a signal to select 8-bit or
4-bit bus mode.
When 4-bit bus mode, it needs to transfer 4-bit data by two times.
RE: Extended function registers enable bit
At this instruction, RE must be "Low".
DC: Display shift enable selection bit
When DC =”High”, enable display shift per line.
When DC =”Low”, enable the selection of code bank.
REV: Reverse enable bit
When REV = “High”, all the display data are reversed. i.e., all the white dots become black and
black dots become white.
When REV =”Low”, the display mode set normal display.
(RE = 1)
RS
0
R/W
0
DB7
0
DB6
0
DB5
1
DB4
IF
DB3
X
DB2
RE(1)
DB1
BE
DB0
0
IF: Interface data length control bit
When IF = "High”, it means 8-bit bus mode with MPU.
When IF = "Low", it means 4-bit bus mode with MPU. So to speak, IF is a signal to select 8-bit or
4-bit bus mode.
When 4-bit bus mode, it needs to transfer 4-bit data by two times.
RE: Extended function registers enable bit
When RE = "High", extended function set registers, SEGRAM address set registers, BID bit, DC
bits of shift enable instruction and BE bits of function set register can be accessed.
BE: CGRAM/SEGRAM data blink enable bit If BE is "High", it makes user font of CGRAM and
segment of SEGRAM blink. The quantity of blink is assigned the highest 2 bit of
CGRAM/SEGRAM.
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RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Set CGRAM Address (RE = 0)
RS
0
R/W
0
DB7
0
DB6
1
DB5
AC5
DB4
AC4
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
Set CGRAM address to AC.
This instruction makes CGRAM data available from MPU.
Set SEGRAM Address (RE = 1)
RS
0
R/W
0
DB7
0
DB6
1
DB5
DB4
X
X
Set SEGRAM address to AC.
This instruction makes SEGRAM data available from MPU.
Set DDRAM Address (RE = 0)
RS
0
R/W
0
DB7
1
DB6
AC6
DB5
AC5
DB4
AC4
Set DDRAM address to AC.
This instruction makes DDRAM data available from MPU.
In 2-line display mode (NW = 0), DDRAM address in the 1st line is from "00H" - "27H", and DDRAM
address in the 2nd line is from "40H" - "67H". In 4-line display mode (NW = 1),
DDRAM address is from "00H" - "13H" in the 1st line, from "20H" - "33H" in the 2nd line, from "40H" "53H" in the 3rd line and from "60H" - "73H" in the 4th line.
Set data length for 3 line SPI (RE = 1)
RS
0
R/W
0
DB7
1
DB6
SD6
DB5
SD5
DB4
SD4
DB3
SD3
DB2
SD2
DB1
SD1
DB0
SD0
In 3 line SPI mode, set Data length command indicates the length of data which, are going to be
received by RW1067. User should set data length before display data sent. Each data length
instruction maximum can set 80 bytes of data. The table below shows how SD bits set the data length.
SD6
0
0
0
0
:
1
SD5
0
0
0
0
:
0
Table 6. Set data length according to SD Bits
SD4
SD3
SD2
SD1
SD0
Function
0
0
0
0
0
Followed by 1 data write
0
0
0
0
1
Followed by 2 data write
0
0
0
1
0
Followed by 3 data write
0
0
0
1
1
Followed by 4 data write
:
:
:
:
:
:
0
1
1
1
1
Followed by 80 data write
28
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Read Busy Flag & Address
RS
0
R/W
1
DB7
BF
DB6
AC6
DB5
AC5
DB4
AC4
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
This instruction shows whether RW1067is in internal operation or not. If the resultant BF is high, it
means the internal operation is in progress and you have to wait until BF to be Low, and then the next
instruction can be performed. In this instruction you can read also the value of address counter.
Write Data to RAM
RS
1
R/W
0
DB7
D7
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.
The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set
instruction:
DDRAM address set, CGRAM address set, SEGRAM address set. RAM set instruction can also
determine the AC direction to RAM. After write operation, the address is automatically
increased/decreased by 1, according to the entry mode.
Read Data from RAM
RS
1
R/W
1
DB7
D7
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM. The selection of RAM is set by the previous
address set instruction. If address set instruction of RAM is not performed before this instruction, the
data that read first is invalid, because the direction of AC is not determined. If you read RAM data
several times without RAM address set instruction before read operation, you can get correct RAM
data from the second, but the first data would be incorrect, because there is no time margin to transfer
RAM data. In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM
address set instruction: it also transfer RAM data to output data register. After read operation address
counter is automatically increased/decreased by 1 according to the entry mode.
After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
In case of RAM write operation, after this AC is increased/decreased by 1 like read operation. In this
time, AC indicates the next address position, but you can read only the previous data by read
instruction.
29
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTERFACE WITH MPU
RW1067 can transfer data in bus mode (4-bit or 8-bit) or serial mode with MPU. User can use any type
4 or 8- bit MPU.
In case of 4-bit bus mode, data transfer is performed by two times to transfer 1 byte data.
• When interfacing data length is 4-bit, only 4 ports, from DB4 - DB7, are used as data bus.
At first higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then
lower 4- bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is
performed by two times. Busy Flag outputs "High" after the second transfer are ended.
• When interfacing data length are 8-bit, transfer is performed at a time through 8 ports, from DB0 DB7.
• If PSB is set to "High”, Parallel bus mode is set 4-bit or 8-bit.
• If PSB is set to "Low", serial transfer mode is set.
30
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTERFACE WITH MPU IN BUS MODE
Interface with 8-bit MPU
If 8-bits MPU is used, RW1067can connect directly with that. In this case, port E, RS, R/W and DB0 to
DB7 need to interface each other. Example of timing sequence is shown below.
Figure 5. Example of 8-bit Bus Mode Timing Sequence
Interface with 4-bit MPU
If 4-bit MPU is used, RW1067can connect directly with this. In this case, port E, RS, R/W and DB4 DB7 need to interface each other. The transfer is performed by two times. Example of timing
sequence is shown below.
Figure 6. Example of 4-bit Bus Mode Timing Sequence
31
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
For serial interface data, bus lines (DB5 to DB7) are used. 4-Pin SPI
If 4-Pin SPI mode is used, CSB (DB5), SID (DB7), SCLK (DB6), and RS are used. They are chip
selection; serial input data, serial clock input, and data/instruction section, relatively. The example of
timing sequence is shown below.
Example of timing sequence
Note: Following is the master SPI clock mode of MPU.
Idle state for clock is a high level，data is clocked into RW1067 on the rising edge of SCLK.
Intel 8051 interface (Serial)
32
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
For serial interface data, bus lines (DB5 to DB7) are used. 3 – Pin SPI
If 3-Pin SPI mode is used, CSB (DB5), SID (DB7), and SCLK (DB6) are used. they
are chip selection, serial input data, and serial clock input, relatively. 3-Pin SPI
mode does not use RS for data/instruction selection. Data length instruction should
be used to realize data/instruction and data length instruction also indicates length
of data. The example of timing sequence is shown below; data length instruction is
followed by data set.
Example of timing sequence
Note: Following is the master SPI clock mode of MPU.
Idle state for clock is a high level，data is clocked into RW1067 on the rising edge of SCLK.
Intel 8051 interface (Serial)
33
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INITIALIZING
INITIALIZING BY INTERNAL RESET CIRCUIT
When the power is turned on, RW1067 is initialized automatically by power on reset circuit. During the
initialization, the following instructions are executed, and BF (Busy Flag) is kept "High"(busy state) to
the end of initialization.
Display Clear Instruction
Write "20H" to all DDRAM
Set Functions Instruction
IF = 1: 8-bit bus mode
RE = 0: Extension register disable
BE = 0: CGRAM/SEGRAM blink OFF
DC = 0: Code bank selection enable
REV = 0: Normal display (Not reversed display)
Control Display ON/OFF Instruction
D = 0: Display OFF
C = 0: Cursor OFF
B = 0: Blink OFF
Set Entry Mode Instruction
I/D = 1: Increment by 1
S = 0: No entire display shift
BID = 0: Normal direction segment port
Set Extension Function Instruction
FW = 0: 5-dot font width character display
B/W = 0: Normal cursor (8th line)
NW =”1”: 4-line display mode,
NW =”0”: 2-line display mode.
Enable Shift Instruction
DS = 0000: Scroll per line disable
Set data length Instruction
SD = 000000
INITIALIZING BY HARDWARE RESET INPUT
When XRESET pin = "Low", RW1067 can be initialized like the case of power on reset. During the
power on reset operation, this pin is ignored.
34
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INITIALIZING BY INSTRUCTION
8-Bit Interface Mode
Power ON
Wait time> 40 ms
RS
0
Function Set
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
1
1
X
X
X
X
C
Wait time> 100 us
RS
0
Function Set
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
1
1
X
X
X
X
Display ON/OFF
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
1
D
C
B
Wait time>100 us
RS
0
Display Clear
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
0
0
0
1
Wait time> 10 ms
RS
0
B
I/D
S
Wait time>100 us
RS
0
D
Entry Mode Set
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
0
1
I/D
S
Initialization end
35
RockWorks Technology Corp.
0
1
0
1
0
1
0
1
0
1
Display OFF
Display ON
Cursor OFF
Cursor ON
Blink OFF
Blink ON
Decrement
Increment
Display shift disable
Display shift enable
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
4 – Bit Interface Mode
Power ON
Wait time> 40ms
RS
0
Function Set
R/W DB7 DB6 DB5 DB4
0
0
0
1
1
Wait time> 100us
RS
0
Function Set
R/W DB7 DB6 DB5 DB4
0
0
0
1
1
D
C
Wait time> 100us
RS
0
B
Function Set
R/W DB7 DB6 DB5 DB4
0
0
0
1
1
I/D
S
Wait time> 100us
RS
0
Function Set
R/W DB7 DB6 DB5 DB4
0
0
0
1
0
Wait time> 100us
(IF= “ 0”)
RS
0
0
RS
0
0
RS
0
0
RS
0
0
Function Set
R/W DB7 DB6 DB5
0
0
0
1
0
X
0
X
Wait time>100us
Display ON/OFF
R/W DB7 DB6 DB5
0
0
0
0
0
1
D
C
Wait time>100us
Display Clear
R/W DB7 DB6 DB5
0
0
0
0
0
0
0
0
Wait time>10ms
Entry Mode Set
R/W DB7 DB6 DB5
0
0
0
0
0
0
1
I/D
DB4
0
0
DB4
0
B
DB4
0
1
DB4
0
S
Initialization end
36
RockWorks Technology Corp.
0
1
0
1
0
1
0
1
0
1
Display OFF
Display ON
Cursor OFF
Cursor ON
Blink OFF
Blink ON
Decrement
Increment
Display shift disable
Display shift enable
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Serial Interface Mode
Power ON
Wait time> 40ms
RS
0
Function Set
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
1
1
X
X
X
X
C
Wait time> 100us
RS
0
Display ON/OFF
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
1
D
C
B
Display Clear
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
0
0
0
1
Wait time> 10ms
RS
0
B
I/D
S
Wait time> 100us
RS
0
D
Entry Mode Set
R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
0
0
0
1
I/D
S
Initialization end
37
RockWorks Technology Corp.
0
1
0
1
0
1
0
1
0
1
Display OFF
Display ON
Cursor OFF
Cursor ON
Blink OFF
Blink ON
Decrement
Increment
Display shift disable
Display shift enable
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Booster efficiency is around 80%
VDD=3.3V、
、select 3-times booster 、Vout is around 9.9V x 0.8=8V
VDD=5V、
、select 2-time booster 、Vout is around 10V x 0.8 =8V
VDD
V0 = 2 ∗ (RA + RB)
RB
38
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Table 7. Duty Ratio and Power Supply for LCD Driving
Item
Number of lines
Duty ratio
Bias
Data
2
1/17
1/6.7
39
RockWorks Technology Corp.
4
1/33
1/6.7
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Timing Characteristics
Writing data from MPU to RW1067(parallel)
VIH1
RS
VIL1
tAS
tAH
RW
tPW
tAH
tf
E
tDSW
tr
tH
Valid data
DB0-DB7
tC
Reading data from RW1067 to MPU(parallel)
VIH1
RS
VIL1
tAS
tAH
RW
tPW
tAH
tf
E
tDDR
tH
tr
Valid data
DB0-DB7
tC
40
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Writing data from MPU to RW1067(serial)
Interface Timing with External Driver
41
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Internal Power Supply Reset
2.7V/4.5V
0.2V
0.2V
0.2V
trcc
tOFF
0.1mS≦trcc≦80mS
tOFF≧1mS
Notes:
tOFF compensates for the power oscillation period caused by momentary power supply oscillations.
Specified at 4.5V for 5V operation,and at 2.7V for 3V operation.
For if 4.5V is not reached during 5V operation,teh internal reset circuit will not operate normally.
42
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
In 6800 interface
(TA = 25℃, VCC =2.7V )
Symbol
Characteristics
Test Condition
Min. Typ. Max.
Unit
Internal Clock Operation
fOSC
OSC Frequency
R =75KΩ
fEX
External Frequency
Duty Cycle
External Clock Operation
-
tR,tF
Rise/Fall Time
-
tC
tPW
tR,tF
190
270
350
KHz
125
45
270
50
410
55
KHz
%
-
-
0.2
µs
-
ns
Write Mode (Writing data from MPU to RW1067)
Pin E
Enable Cycle Time
80
(except clear display)
Enable Pulse Width
Pin E
Enable Rise/Fall Time Pin E
40
-
-
ns
-
-
25
ns
tAS
Address Setup Time
Pins: RS,RW,E
0
-
-
ns
tAH
Address Hold Time
Pins: RS,RW,E
10
-
-
ns
tDSW
Data Setup Time
Pins: DB0 - DB7
20
-
-
ns
tH
Data Hold Time
Pins: DB0 - DB7
10
-
-
ns
Read Mode (Reading Data from RW1067 to MPU)
tC
Enable Cycle Time
Pin E
1200
-
-
ns
tPW
Enable Pulse Width
Pin E
480
-
-
ns
-
-
25
ns
tR,tF
Enable Rise/Fall Time Pin E
tAS
Address Setup Time
Pins: RS,RW,E
0
-
-
ns
tAH
Address Hold Time
Pins: RS,RW,E
10
-
-
ns
tDDR
Data Setup Time
Pins: DB0 - DB7
-
-
320
ns
tH
Data Hold Time
Pins: DB0 - DB7
10
-
-
ns
Interface Mode with LCD Driver(RW1060)
tCWH
Clock Pulse with High Pins: CL1, CL2
800
-
-
ns
tCWL
Clock Pulse with Low Pins: CL1, CL2
800
-
-
ns
tCST
Clock Setup Time
Pins: CL1, CL2
500
-
-
ns
tSU
Data Setup Time
Pin: D
300
-
-
ns
tDH
Data Hold Time
Pin: D
300
-
-
ns
tDM
M Delay Time
Pin: M
0
-
2000
ns
43
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
In 6800 interface
(TA = 25℃, VCC =5V )
Symbol
Characteristics
Test Condition
Min.
Typ. Max.
Unit
Internal Clock Operation
fOSC
OSC Frequency
fEX
External Frequency
R = 91KΩ
190
270
350
KHz
-
125
270
410
KHz
Duty Cycle
-
45
50
55
%
Rise/Fall Time
-
-
-
0.2
µs
-
ns
External Clock Operation
tR,tF
tC
tPW
tR,tF
Write Mode (Writing data from MPU to RW1067)
Pin E
Enable Cycle Time
80
(except clear display)
Enable Pulse Width
Pin E
Enable Rise/Fall Time Pin E
40
-
-
ns
-
-
25
ns
tAS
Address Setup Time
Pins: RS,RW,E
0
-
-
ns
tAH
Address Hold Time
Pins: RS,RW,E
10
-
-
ns
tDSW
Data Setup Time
Pins: DB0 - DB7
20
-
-
ns
tH
Data Hold Time
Pins: DB0 - DB7
10
-
-
ns
Read Mode (Reading Data from RW1067 to MPU)
tC
Enable Cycle Time
Pin E
1200
-
-
ns
tPW
Enable Pulse Width
Pin E
140
-
-
ns
-
-
25
ns
tR,tF
Enable Rise/Fall Time Pin E
tAS
Address Setup Time
Pins: RS,RW,E
0
-
-
ns
tAH
Address Hold Time
Pins: RS,RW,E
10
-
-
ns
tDDR
Data Setup Time
Pins: DB0 - DB7
-
-
100
ns
tH
Data Hold Time
Pins: DB0 - DB7
10
-
-
ns
Interface Mode with LCD Driver(RW1060)
tCWH
Clock Pulse with High Pins: CL1, CL2
800
-
-
ns
tCWL
Clock Pulse with Low Pins: CL1, CL2
800
-
-
ns
tCST
Clock Setup Time
Pins: CL1, CL2
500
-
-
ns
tSU
Data Setup Time
Pin: D
300
-
-
ns
tDH
Data Hold Time
Pin: D
300
-
-
ns
tDM
M Delay Time
Pin: M
0
-
2000
ns
44
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics
In Serial Interface
In 3-SPI Serial Interface (TA = 25℃, VCC = 2.7V )
Symbol
Characteristics
Test Condition
Min. Typ. Max.
Unit
Write Mode (Writing data from MPU to RW1067)
SCLK Cycle Time
SCLK
1200
-
-
ns
tw
SCLK pulse width
SCLK
600
-
-
ns
tR,tF
SCLK Rise/Fall time
SCLK
-
-
25
ns
tSDS
Data setup time
SID
30
-
-
ns
tSDH
Data hold time
SID
30
-
-
ns
tCSS
CSB Setup Time
CSB
50
ns
tCSH
CSB Hold Time
CSB
150
ns
tSCYC
In 3-SPI Serial Interface (TA = 25℃, VCC = 5V )
Symbol
Characteristics
Test Condition
Min.
Typ. Max.
Unit
Write Mode (Writing data from MPU to RW1067)
tSCYC
SCLK Cycle Time
SCLK
1000
-
-
ns
tw
SCLK pulse width
SCLK
500
-
-
ns
tR,tF
SCLK Rise/Fall time
SCLK
-
-
25
ns
tSDS
Data setup time
SID
30
-
-
ns
tSDH
Data hold time
SID
30
-
-
ns
tCSS
CSB Setup Time
CSB
30
ns
tCSH
CSB Hold Time
CSB
110
ns
45
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
In 4-SPI Serial Interface (TA = 25℃, VCC = 2.7V )
Symbol
Characteristics
Test Condition
Min. Typ. Max.
Unit
Write Mode (Writing data from MPU to RW1067)
SCLK Cycle Time
SCLK
1200
-
-
ns
tw
SCLK pulse width
SCLK
600
-
-
ns
tR,tF
SCLK Rise/Fall time
SCLK
-
-
25
ns
tSAS
Address Setup time
RS
80
-
-
ns
tSAH
Address Hold time
RS
30
-
-
ns
tSDS
Data setup time
SID
30
--
-
ns
tSDH
Data hold time
SID
30
-
-
ns
tCSS
CSB Setup Time
CSB
50
ns
tCSH
CSB Hold Time
CSB
150
ns
tSCYC
In 4-SPI Serial Interface (TA = 25℃, VCC = 5V )
Symbol
Characteristics
Test Condition
Min. Typ. Max.
Unit
Write Mode (Writing data from MPU to RW1067)
SCLK Cycle Time
SCLK
1200
-
-
ns
tw
SCLK pulse width
SCLK
600
-
-
ns
tR,tF
SCLK Rise/Fall time
SCLK
-
-
25
ns
tSAS
Address Setup time
RS
60
-
-
ns
tSAH
Address Hold time
RS
30
-
-
ns
tSDS
Data setup time
SID
30
--
-
ns
tSDH
Data hold time
SID
30
-
-
ns
tCSS
CSB Setup Time
CSB
50
ns
tCSH
CSB Hold Time
CSB
150
ns
tSCYC
46
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Absolute Maximum Ratings
Characteristics
Symbol
Value
Power Supply Voltage
VCC
-0.3 to +5.5
LCD Driver Voltage
VLCD
Vss+7.0 to Vss-0.3
Input Voltage
VIN
-0.3 to VCC+0.3
Operating Temperature
TA
-40oC to + 90oC
Storage Temperature
TSTO
-55oC to + 125oC
DC Characteristics
( TA = 25℃ , VCC = 2.7 V – 4.5 V )
Symbol
Characteristics Test Condition
Min. Typ. Max.
Unit
VCC
Operating Voltage
-
2.7
-
4.5
V
VLCD
LCD Voltage
V0 - Vss
3.0
-
7.0
V
IDD
Power Supply Current
fOSC = 270KHz
VCC=3.0V
-
0.45
0.6
mA
-
0.7Vcc
-
VCC
V
-
- 0.3
-
0.6
V
-
0.7Vcc
-
VCC
V
-
-
-
0.2Vcc
V
VIH1
VIL1
VIH2
VIL2
Input High Voltage
(Except OSC1)
Input Low Voltage
(Except OSC1)
Input High Voltage
(OSC1)
Input Low Voltage
(OSC1)
VOH1
Output High Voltage
(DB0 - DB7)
IOH = -0.1mA
0.75
Vcc
-
-
V
VOL1
Output Low Voltage
(DB0 - DB7)
IOL = 0.1mA
-
-
0.2Vcc
V
VOH2
Output High Voltage
(Except DB0 - DB7)
IOH = -0.04mA
0.8VCC
-
VCC
V
VOL2
Output Low Voltage
(Except DB0 - DB7)
IOL = 0.04mA
-
-
0.2VCC
V
RCOM
Common Resistance
VLCD = 4V, Id = 0.05mA
-
2
20
KΩ
RSEG
Segment Resistance
VLCD = 4V, Id = 0.05mA
-
2
30
KΩ
ILEAK
Input Leakage Current
VIN = 0V to VCC
-1
-
1
µA
IPUP
Pull Up MOS Current
VCC = 3V
10
60
120
µA
47
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
DC Characteristics
( TA = 25℃, VCC = 4.5 V - 5.5 V )
Symbol
Characteristics Test Condition
Min. Typ. Max.
Unit
VCC
Operating Voltage
-
4.5
-
5.5
V
VLCD
LCD Voltage
V0 - Vss
3.0
-
7.0
V
IDD
Power Supply Current
fOSC = 270KHz
VCC=5.0V
-
0.5
0.7
mA
VIH1
Input High Voltage
(Except OSC1)
-
2.5
-
VCC
V
VIL1
Input Low Voltage
(Except OSC1)
-
-0.3
-
0.6
V
VIH2
Input High Voltage
(OSC1)
-
VCC-1
-
VCC
V
VIL2
Input Low Voltage
(OSC1)
-
-
-
1.0
V
VOH1
Output High Voltage
(DB0 - DB7)
IOH = -0.1mA
3.9
-
VCC
V
VOL1
Output Low Voltage
(DB0 - DB7)
IOL = 0.1mA
-
-
0.4
V
VOH2
Output High Voltage
(Except DB0 - DB7)
IOH = -0.04mA
0.9VCC
-
VCC
V
VOL2
Output Low Voltage
(Except DB0 - DB7)
IOL = 0.04mA
-
-
0.1VCC
V
RCOM
Common Resistance
VLCD = 4V, Id = 0.05mA
-
2
20
KΩ
RSEG
Segment Resistance
VLCD = 4V, Id = 0.05mA
-
2
30
KΩ
ILEAK
Input Leakage Current
VIN = 0V to VCC
-1
-
1
µA
IPUP
Pull Up MOS Current
VCC = 5V
90
200
330
µA
48
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RW1067 Application Circuit: (4Line x 20Channels) – RW1060*1
RW1067+RW1060 mode is not available in 8 bit parallel interface, only 4 bit parallel interface,
SPI-3/SPI-4 can be used for RW1067+RW1060 mode.
49
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RW1067 Application Circuit: (2Line x 32Channels) – RW1060*2
(2Line x 24Channels – RW1060*1, 2Line x 40Channels – RW1060*3)
RW1067+RW1060*2 mode is not available in 8 bit parallel interface, only 4 bit parallel
interface, SPI-3/SPI-4 can be used for RW1067+RW1060*2 mode.
50
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RW1067 Application Circuit: (4Line x 40Channels)
RW1067*2+RW1060*2 mode is not available in 8 bit parallel interface, only 4 bit parallel
interface, SPI-3/SPI-4 can be used for RW1067*2+RW1060*2 mode.
51
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
THE MPU INTERFACE CIRCUIT
The RW1067Series can be connected to 6800 Series MPUs. Moreover, using the serial interface it is possible to
operate the RW1067 series chips with fewer signal lines.
The display area can be enlarged by using multiple RW1067 Series chips. When this is done, the chip select
signal can be used to select the individual Ics to access.
I/O PAD Configuration
DB7
DB6
DB5
DB4
DB3~DB0
RS
RW
6800 8 bits
Series MPUs
Pull-up
v
Pull-up
v
Pull-up
v
Pull-up
v
Pull-up
v
Pull-up
v
Pull-up
v
6800 4 bits
Series MPUs
Pull-up
v
Pull-up
v
Pull-up
v
Pulldown
v
Floating
Pull-up
v
Pull-up
v
Serial Interface
—For 4 SPI
(PSB=0)
Serial Interface
—For 3 SPI
(PSB=0)
No
Pull-up
v
No
Pull-up
v
No
Pull-up
v
No
Pull-up
v
No
Pull-up
v
No
Pull-up
v
Pulldown
Floating
Pulldown
v
Pulldown
Pull-up
Pulldown
Floating
Pulldown
Pulldown
Pull-up
V: Connected between MCU & RW1067
52
RockWorks Technology Corp.
E
No
Pull-up
v
No
Pull-up
v
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(1) 6800 8 bits Series MPUs
(2) 6800 4 bits Series MPUs
53
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(3) Using the Serial Interface—For 4 SPI
(4) Using the Serial Interface—For 3 SPI
54
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RW1067 Language List
Language
Bank0
Bank1
Bank2
Canadian French
ˇ
ˇ
Canadian Multilingual
ˇ
ˇ
Cyrillic
ˇ
ˇ
ˇ
ˇ
Finnish
ˇ
ˇ
French
ˇ
ˇ
German
ˇ
ˇ
Greek
ˇ
Hungarian
ˇ
Iceland
ˇ
ˇ
Italian
ˇ
ˇ
Latin American
ˇ
ˇ
Netherlands
ˇ
ˇ
Norwegian
ˇ
ˇ
Danish
Estnisch
Bank3
ˇ
ˇ
Polish
ˇ
Portuguese
ˇ
ˇ
ˇ
Russian
Spanish
ˇ
ˇ
Swedish
ˇ
ˇ
Swiss French
ˇ
ˇ
Swiss German
ˇ
ˇ
United Kingdom
ˇ
ˇ
ˇ
ˇ
USA Dvorak
ˇ
Japanese
ˇ
55
RockWorks Technology Corp.
ˇ
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
56
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
57
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
58
RockWorks Technology Corp.
RW1067C-0C-003
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
59
RockWorks Technology Corp.
1
2
3
4
6
5
Note1:R7 Provid a discharge path after IC Powerdown
Note2:For ESD Protection
D
If VDD=5V、use 2X step-up circuit,Place C6、C7、R5 and R8
If VDD=3V or 3.3V、use 3X step-up circuit,Place C5、C6、C7 and R8 ,open R5
D
C9
0.1uF
R2
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
IC1
C8
0.1uF
C4
0.1uF
100K
V1
R1
V2
V3
C3
0.1uF
100k
Note1
R8
0R
R7
200k
Note2
C2P
C5
0.1uF
V4
C2N
Note2
C7
0.1uF
bezel
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
R5
0R
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
JUMPER
1
ICON2
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
DB7/SID
DB6/SCLK
DB5/CSB
DB4
DB3
DB2
DB1
DB0
E
RW
RS
VSS
VRP
PSB
XRESET
OSC1
OSC2
VDD
RW1067
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
D7
D6
D5
D4
D3
D2
D1
D0
E
RW
RS
VSS
VR
PSB
RESET
OSC1
OSC2
VDD
C6
0.1uF
C1N
C14
C
VR
C12
4.7uF
C11
0.1uF
R11
VDD
OSC2
VDD_IN
0R
RT
RA1
NTC thermistor
C1
0.1uF
CON1
VDD
Note2
RA2
VR
VDD
0R
RS
RW
E
D0
D1
D2
D3
D4
D5
D6
D7
R9
0R
R3
1k
RESET
0.1uF
PSB
V0
C2
+
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
VSS_IN
0R
RB
RF1
68K
0.1uF
R10
VSS
OSC1
R6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
4.7uF
C13
RW1067_1
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
2
C1P
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
ICON1
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
+
B
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
+
C
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
1
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
VOUT
C10
1uF
When PSB="Low" :Serial mode
PSB="High" :4 bit / 8 bit bus mode
VSS_IN
VDD_IN
V0
0R
R12
0R
R13
0R
R14
0R
R15
R16
0R
R17
0R
R18
0R
R19
0R
R20
0R
R21
0R
R22
0R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
B
R4
C2、R6、C10 need to be near RW1067
A
A
Title
2lines X 16 Characters
Size
B
Date:
File:
1
2
3
4
5
RockWorks
Number
Revision
RW1067 2 X 16
29-Oct-2008
D:\公公公公\99se\MyDesign.ddb
B
Sheet of
Drawn By:
6
1
2
3
4
6
5
Note1:R7 Provid a discharge path after IC Powerdown
Note2:For ESD Protection
D
D
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
If VDD=5V、use 2X step-up circuit,Place C6、C7、R5 and R8
If VDD=3V or 3.3V、use 3X step-up circuit,Place C5、C6、C7 and R8 ,open R5
VOUT
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
R5
0R
C9
0.1uF
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
IC1
RW1067
V1
V2
V3
100k
C7
0.1uF
V4
C5
0.1uF
C2N
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
D7
D6
D5
D4
D3
D2
D1
D0
E
RW
RS
VSS
VR
PSB
RESET
OSC1
OSC2
VDD
R7
200k
Note2
C2P
Note2
C1P
bezel
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
ICON2
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
DB7/SID
DB6/SCLK
DB5/CSB
DB4
DB3
DB2
DB1
DB0
E
RW
RS
VSS
VRP
PSB
XRESET
OSC1
OSC2
VDD
R1
C6
0.1uF
C1N
1
2
C14
OSC1
RB
C13
RF1
68K
4.7uF
VR
VSS
OSC2
0.1uF
R10
VSS_IN
0R
RT
RA1
NTC thermistor
C1
0.1uF
VDD
C12
4.7uF
C11
0.1uF
R11
VDD_IN
0R
VDD
Note2
B
RA2
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
ICON1
VR
R6
0R
R9
0R
R3
VDD
CON1
1k
RW1067_1
V0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
C2
RESET
PSB
0.1uF
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
C
JUMPER
1
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
100K
R2
Note1
R8
0R
C3
0.1uF
+
B
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
C4
0.1uF
+
C
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
C8
0.1uF
+
C10
1uF
RS
RW
E
D0
D1
D2
D3
D4
D5
D6
D7
When PSB="Low" :Serial mode
PSB="High" :4 bit / 8 bit bus mode
R4
VSS_IN
VDD_IN
V0
0R
R12
0R
R13
0R
R14
0R
R15
R16
0R
R17
0R
R18
0R
R19
0R
R20
0R
R21
0R
R22
0R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
C2、R6、C10 need to be near RW1067
A
A
Title
4lines X 16 Characters
Size
B
Date:
File:
1
2
3
4
5
RockWorks
Number
Revision
RW1067 4 X 16
29-Oct-2008
D:\公公公公\99se\MyDesign.ddb
B
Sheet of
Drawn By:
6
1
2
3
4
6
5
VDD
Note1:R7 Provid a discharge path after IC Powerdown
Note2:For ESD Protection
R6
0R
R3
C9
0.1uF
1k
D
RESET
PSB
OSC1
VDD
+
RF1
68K
C2
C10
1uF
R2
When PSB="Low" :Serial mode
PSB="High" :4 bit / 8 bit bus mode
C8
0.1uF
C4
0.1uF
100K
R1
C3
0.1uF
100k
If VDD=5V、use 2X step-up circuit,Place C6、C7、R5 and R8
If VDD=3V or 3.3V、use 3X step-up circuit,Place C5、C6、C7 and R8 ,open
R5
D
VOUT
V1
V2
V3
V4
R5
0R
R4
Note1
R8
0R
0.1UF
OSC2
C2、R6、C10 need to be near RW1067
113 SEG26
112 SEG25
111 SEG24
110 SEG23
109 SEG22
108 SEG21
107 SEG20
106 SEG19
105 SEG18
104 SEG17
103 SEG16
102 SEG15
101 SEG14
100 SEG13
99 SEG12
98 SEG11
97 SEG10
96 SEG9
95 SEG8
94 SEG7
93 SEG6
92 SEG5
91 SEG4
90 SEG3
89 SEG2
88 SEG1
87 COM24
86 COM23
85 COM22
84 COM21
83 COM20
82 COM19
81 COM18
80 COM17
79 COM8
78 COM7
77 COM6
76 COM5
75 COM4
74 COM3
73 COM2
72 COM1
C7
0.1uF
C5
0.1uF
Note2
bezel
C2N
C1P
C6
0.1uF
2
C14
4.7uF
C
+
C
JUMPER
1
1
C1N
SEG92
SEG93
SEG94
SEG95
SEG96
SEG97
SEG98
SEG99
SEG100
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM24
COM23
COM22
COM21
COM20
COM19
COM18
COM17
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
IC1
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
C13
SEG89
SEG90
SEG91
SEG88
SEG87
48
49
50
51
52
VDD
53
SEG86
SEG85
SEG84
SEG83
SEG82
SEG81
V0
54
55
56
57
58
59
1
S9
S10
S11
S8
S7
U2
VDD
S6
S5
S4
S3
S2
S1
V0
S29
S34
S33
S32
S31
S30
S35
S36
S37
S38
S39
S40
RW1060
VR
30
29
28
27
26
25
24
23
22
21
20
19
VSS
RT
R10
RA1
NTC thermistor
C1
0.1uF
VDD
VSS_IN
C12
4.7uF
C11
0.1uF
R11
VDD_IN
0R
Note2
RA2
VR
R9
0R
CON1
V0
RS
RW
E
D0
D1
D2
D3
D4
D5
D6
D7
VDD
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
ICON1
0.1uF
0R
V0
V3
V2
V3
V2
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
D7
D6
D5
D4
D3
D2
D1
D0
E
RW
RS
VSS
VR
PSB
RESET
OSC1
OSC2
VDD
RB
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
D3
RW1067
ICON2
V4
V3
V2
V1
V0
VOUT
C1N
C1P
C2N
C2P
DB7/SID
DB6/SCLK
DB5/CSB
DB4
DB3
DB2
DB1
DB0
E
RW
RS
VSS
VRP
PSB
XRESET
OSC1
OSC2
VDD
CL1
CL2
VSS
DL1
DR1
DL2
DR2
M
SHL1
SHL2
FCS
V1
V2
V3
V4
V5
V6
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
D2
D1
VSS
D0
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
+
B
R7
200k
Note2
C2P
C15
0.1UF
VSS_IN
VDD_IN
V0
0R
R12
0R
R13
0R
R14
0R
R15
R16
0R
R17
0R
R18
0R
R19
0R
R20
0R
R21
0R
R22
0R
B
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64
SEG65
SEG66
SEG67
SEG68
SEG69
SEG70
SEG71
SEG72
SEG73
SEG74
SEG75
SEG76
SEG77
SEG78
SEG79
SEG80
COM32
COM31
COM30
COM29
COM28
COM27
COM26
COM25
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
RW1067_1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RW1067+RW1060 mode is not available in 8 bit parallel interface,only 4 bit
parallel interface,SPI-3/SPI-4 can be usec for RW1067+RW1060 mode.
4lines X 20 Characters
A
A
Title
Size
B
Date:
File:
1
2
3
4
5
RockWorks
Number
RW1067 4x20
29-Oct-2008
D:\公公公公\99se\MyDesign.ddb
Revision
B
Sheet of
Drawn By:
6