STK5F4U3C2D-E - ON Semiconductor

Ordering number : EN*A2299
STK5F4U3C2D-E
Advance Information
Thick-Film Hybrid IC
http://onsemi.com
Inverter Power IPM
for 3-phase Motor Drive
Overview
This “Inverter Power IPM” is highly integrated device containing all High Voltage (HV) control from HV-DC to
3-phase outputs in a single DIP module (Dual-In line Package). Output stage uses IGBT/FRD technology and
implements Under Voltage Protection (UVP) and Over Current Protection (OCP) with a Fault Detection output flag.
Internal Boost diodes are provided for high side gate boost drive.
Function
 Single control power supply due to Internal bootstrap circuit for high side pre-driver circuit
 All control inputs and status outputs are at low voltage levels directly compatible with microcontrollers.
 A single power supply drive is enabled through the use of bootstrap circuits for upper power supplies
 Built-in dead-time for shoot-thru protection
 Having open emitter output for low side IGBTs; individual shunt resistor per phase for OCP
 Externally accessible embedded thermistor for substrate temperature measurement
 Shutdown function ‘ITRIP’ to disable all operations of the 6 phase output stage by external input
Certification
 UL1557 (File number: E339285).
Specifications
Absolute Maximum Ratings at Tc = 25C
Ratings
Unit
Supply voltage
Parameter
Symbol
VCC
P to NU,NV,NW, surge < 500V *1
450
V
Collector-emitter voltage
VCE
P to U,V,W, U to NU, V toNV, or W to NW
P, NU,NV,NW,U,V,W terminal current.
600
±30
±15
V
Output current
Io
Output peak current
Iop
Pre-driver supply voltage
Input signal voltage
FAULT terminal voltage
Maximum loss
VD1,2,3,4
VIN
VFAULT
Pd
Junction temperature
Tj
Storage temperature
Tstg
Operating temperature
Tightening torque
Withstand Voltage
Tc
MT
Vis
Remarks
P, NU,NV,NW,U,V,W terminal current, Tc=100C
P, NU,NV,NW,U,V,W terminal current, PW=1ms.
VB1-VS1,VB2-VS2,VB3-VS3,VDD-VSS *2
±45
A
A
20
V
HIN1, 2, 3, LIN1, 2, 3, terminal.
0.3 to VDD
V
FAULT terminal.
IGBT per channel
0.3 to VDD
56.8
V
W
IGBT, FRD
IPM case
A screw part at use M4 type screw *3
50Hz sine wave AC 1 minute *4
150
C
40 to +125
C
20 to +100
1.17
2000
C
Nm
VRMS
Reference voltage is “VSS” terminal voltage unless otherwise specified.
*1: Surge voltage developed by the switching operation due to the wiring inductance between the P and N terminals.
*2: Terminal voltage: VD1=VB1-VS1, VD2=VB2-VS2, VD3=VB3-VS3, VD4=VDD-VSS.
*3: Flatness of the heat-sink should be 0.25mm and below.
*4. Test conditions: AC 2500V, 1 second.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
Semiconductor Components Industries, LLC, 2014
March, 2014
Ver.1402018DS
30414HK No.A2299-1/15
STK5F4U3C2D-E
Electrical Characteristics at Tc= 25C, VD1, VD2, VD3, VD4=15V
Parameter
Symbol
Conditions
Ratings
Test
Circuit
Unit
Min.
Typ.
Max.
-
-
1.0
mA
-
-
0.5
mA
-
1.7
2.5
-
1.4
-
Power output section
Collector-to-emitter cut-off current
ICE
VCE=600V
Boot-strap diode reverse current
IR(BD)
VR(BD)=600V
Collector-to-emitter saturation voltage
VCE(sat)
Ic=30A, Tj=25C
Fig.1
Fig.2
Ic=15A, Tj=100C
Diode forward voltage
VF
IF=30A, Tj=25C
IF=15A, Tj=100C
Fig.3
-
1.8
2.7
-
1.5
-
V
V
θj-c(T)
IGBT
-
-
1.8
-
C/W
θj-c(D)
FWD
-
-
2.3
-
C/W
-
0.05
0.4
-
1.0
4.0
Junction to case thermal resistance
Control (Pre-driver) section
Pre-drive power supply consumption
current
ID
VD1,2,3=15V
VD4=15V
Fig.4
mA
High level input voltage
Vin H
HIN1,HIN2,HIN3,
-
2.5
-
-
V
Low level input voltage
Vin L
LIN1,LIN2,LIN3
-
-
-
0.8
V
ITRIP threshold voltage
VITRIP
ITRIP(17) to VSS(19)
0.44
0.49
0.54
V
Pre-drive low voltage protection
UVLO
-
10
-
12
V
FAULT terminal input electric current
IOSD
-
-
1.5
-
mA
FAULT clearance delay time
FLTCLR
-
1.0
-
3.0
ms
-
90
-
110
kΩ
-
0.6
1.5
μs
Protection section
Thermistor for substrate temperature
monitor
Rt
VFAULT=0.1V
From time fault condition
clear
Resistance between the
TH1 and TH2 terminals
Fig.5
Switching character
Switching time
tON
tOFF
Io=30A, Inductive load
-
1.2
2.2
μs
-
710
-
μJ
-
570
-
μJ
Etot
-
1280
-
μJ
Eon
Io=15A,VCC=300V,
-
360
-
μJ
μJ
Turn-on switching loss
Eon
Turn-off switching loss
Eoff
Total switching loss
Turn-on switching loss
Io=30A, VCC=300V,
VD=15V, L=680μH
Fig.6
Turn-off switching loss
Eoff
VD=15V,L=680μH,
-
460
-
Total switching loss
Etot
Tc=100C
-
820
-
μJ
Erec
Io=15A,VCC=300V,
-
16
-
μJ
-
62
-
ns
Diode reverse recovery energy
Diode reverse recovery time
Trr
VD=15V,L=680μH,
Tc=100C
Reference Voltage is “VSS” terminal voltage unless otherwise specified.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
No.A2299-2/15
STK5F4U3C2D-E
Notes.
1. Input ON voltage indicates the threshold of input signal voltage to turn on output stage IGBT.
Input OFF voltage indicates the threshold of input signal voltage to turn off output stage IGBT.
At the time of output ON, set the input signal voltage Vinth(MAX) to 15V.
At the time of output OFF, set the input signal voltage 0V to Vinth(MIN).
*1 The hysteresis voltage is a reference value based on the designed value of built-in pre-driver.
2.
When the internal protection circuit operates, a FAULT signal is turned ON (When the FAULT terminal is low level,
FAULT signal is ON state : output form is open DRAIN) but the FAULT signal does not latch. After protection
operation ends, it returns automatically within about 1ms to 3ms and resumes operation beginning condition. So,
after FAULT signal detection, set all input signal to OFF (Low) at once.How ever, the operation of pre-drive power
supply low voltage protection (UVLO:with hysteresis about 0.2V) is as follows.
Upper side:
The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will
continue till the input signal will turn ‘low’
Lower side:
The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on
input signal voltage.
3. When assembling the IPM on the heat sink with M4 type screw, tightening torque range is 0.79Nm to 1.17Nm.
4. The pre-drive low voltage protection is the feature to protect a device when the pre-driver supply voltage falls due
to an operating malfunction.
5. When use the over-current protection with external resistors, please set the current protection level to be equal or
less than the rating of output peak current (Iop).
Pin Assignment
Pin No.
Name
Description
Pin No.
Name
Description
1
VB1
High side floating supply voltage 1
44
P
Positive bus input voltage
2
VS1
High side floating supply offset voltage
43
P
Positive bus input voltage
3
-
Without pin
42
P
Positive bus input voltage
4
VB2
High side floating supply voltage 2
41
-
Without pin
5
VS2
High side floating supply offset voltage
40
U
U+ phase output
6
-
Without pin
39
U
U+ phase output
7
VB3
High side floating supply voltage 3
38
U
U+ phase output
8
VS3
High side floating supply offset voltage
37
-
Without pin
9
-
Without pin
36
V
V+ phase output
10
HIN1
Logic input high side driver-Phase1
35
V
V+ phase output
11
HIN2
Logic input high side driver-Phase2
34
V
V+ phase output
12
HIN3
Logic input high side driver-Phase3
33
-
Without pin
13
LIN1
Logic input low side driver-Phase1
32
W
W+ phase output
14
LIN2
Logic input low side driver-Phase2
31
W
W+ phase output
W+ phase output
15
LIN3
Logic input low side driver-Phase3
30
W
16
FAULT
Fault out
29
-
Without pin
17
ITRIP
Over-current protection level setting pin
28
NU
U-
18
VDD
+15V main supply
27
NU
U-
phase output
19
VSS1
Negative main supply
26
NV
V-
phase output
20
VSS2
Negative main supply
25
NV
V-
phase output
21
TH1
Thermistor out
24
NW
W- phase output
22
TH2
Thermistor out
23
NW
W- phase output
phase output
No.A2299-3/15
STK5F4U3C2D-E
Block Diagram
U(38,39,40)
V(34,35,36)
W(30,31,32)
VB1(1)
VS1(2)
VB2(4)
VS2(5)
VB3(7)
VS3(8)
P(42,43,44)
DB
DB DB
U.V.
U.V.
U.V.
RB
NU(27,28)
NV(25,26)
NW(23,24)
TH1(21)
Thermistor
TH2(22)
Level
Shifter
Level
Shifter
Level
Shifter
HIN1(10)
HIN2(11)
HIN3(12)
Logic
Logic
Logic
LIN1(13)
LIN2(14)
LIN3(15)
Shutdown
ITRIP(17)
VDD(18)
Q
-
Detect
VSS1(19)
VSS2(20)
S
+
Under voltage
Timer
R
Vref
Latch time about 1 to 3ms
FAULT(16)
No.A2299-4/15
STK5F4U3C2D-E
Test Circuit
(The tested phase: U+ shows the upper side of the U phase and U- shows the lower side of the U phase.)
 ICE / IR(BD)
ICE
M
N
U
42
38
V
42
34
W
42
30
NU
38
27
NV
34
25
NW
30
23
1
M
A
VD1=15V
2
4
VD2=15V
M
N
U(BD)
1
19
V(BD)
4
19
5
W(BD)
7
19
VCE
7
VD3=15V
8
18
VD4=15V
19,20
N
Fig.1
 VCE(SAT) (Test by pulse)
M
N
m
U
42
38
10
V
42
34
11
W
42
30
12
NU
38
27
13
NV
34
25
14
NW
30
23
15
1
M
VD1=15V
2
4
VD2=15V
5
V
Ic
7
VD3=15V
VCE(SAT)
8
18
VD4=15V
5V
m
19,20
N
Fig.2
 VF (Test by pulse)
M
N
U
42
38
V
42
34
W
42
30
NU
38
27
NV
34
25
NW
30
23
M
V
VF
N
Fig.3
 ID
M
N
VD1
1
2
VD2
4
5
VD3
7
8
VD4
18
19
ID
A
M
VD*
N
Fig.4
No.A2299-5/15
IF
STK5F4U3C2D-E
 ISD (The circuit is a representative example of the lower side U phase.)
VD1=15V
Input signal
(0 to 5V)
VD2=15V
1
38
2
4
5
ITRIP
VD3=15V
VD4=15V
Io
Input signal
Io
7
8
18
13
19,20
27
Fig.5
 Switching time (The circuit is a representative example of the lower side U phase.)
42
1
Input signal
(0 to 5V)
VD1=15V
2
4
VD2=15V
5
38
90%
Vcc
7
Io
VD3=15V
10%
tON
tOFF
CS
8
18
Io
VD4=15V
Input signal
13
19,20
27
Fig.6
No.A2299-6/15
STK5F4U3C2D-E
Input / Output Timing Chart
VBS undervoltage protection reset signal
ON
HIN1,2,3
OFF
LIN1,2,3
*2
VDD
VDD undervoltage protection reset voltage
*3
VBS undervoltage protection reset voltage
VB1,2,3
VIT≥0.54V
*4
ITRIP terminal
Voltage
VIT<0.44V
FAULT terminal
Voltage
(at pulled-up)
ON
Upper
U, V, W
*1
OFF
Lower
U ,V, W
*1
Fig.7
Automatically reset after protection
(typ.2ms)
Notes:
*1 : Diagram shows the prevention of shoot-thru via control logic, however, more dead time must be added to account for
switching delay externally.
*2 : When VDD decreases all gate output signals will go low and cut off all 6 IGBT outputs. When VDD rises the operation will
resume immediately.
*3 : When the upper side voltage at VB1, VB2 and VB3 drops only the corresponding upper side output is turned off. The
outputs return to normal operation immediately after the upper side gate voltage rises.
*4 : When VITRIP exceeds threshold all IGBT’s are turned off and normal operation resumes 2ms (typ) after over current
condition is removed.
No.A2299-7/15
STK5F4U3C2D-E
Logic level table
P(42,43,44)
Ho
HIN1,2,3
(10,11,12)
LIN1,2,3
(13,14,15)
U(38,39,40)
V(34,35,36)
W(30,31,32)
IC
Driver
Lo
Fig.8
FAULT*
Itrip
HIN1,2,3
LIN1,2,3
U,V,W
1
0
1
0
Vbus
1
0
0
1
0
1
0
0
0
Off
1
0
1
1
Off
0
1
X
X
Off
*With pullup registor
NU(27,28)
NV(25,26)
NW(23,24)
No.A2299-8/15
STK5F4U3C2D-E
Application Circuit Example
+
CB
CB
+
CB
+5.0V
+
RFault
1 VB1
2 VS1
4 VB2
5 VS2
7 VB3
8 VS3
U
V
40
39
38
36
35
34
W
32
31
30
P
44
43
42
RP
10 HIN1
11 HIN2
Control
Circuit
Vcc
+
CS
+
CI
12 HIN3
13 LIN1
-
14 LIN2
15 LIN3
16 FAULT
17 ITRIP
RSU
NU 28
27
RS
Controler.
VDD=15V
CD
Rpd
18 VDD
19 VSS1
20 VSS2
21 TH1
22 TH2
NV-26
25
RSV
RSW
NW-24
23
Op-Amp.
Controler.
Missing pin
3, 6, 9, 29, 33, 37, 41
Fig.9
No.A2299-9/15
STK5F4U3C2D-E
Recommended Operating Conditions at Tc = 25C
Parameter
Supply voltage
Symbol
Conditions
Ratings
min
typ
max
0
280
450
Unit
VCC
P to NU,NV,NW
VD1,2,3
VB1 –VS1,VB2 –VS2,VB3 –VS3
12.5
15
17.5
VD4
VDD – VSS *1
13.5
15
16.5
Input ON voltage
VIN(ON)
3.0
-
5.0
Input OFF voltage
VIN(OFF)
HIN1,HIN2,HIN3,
LIN1,LIN2,LIN3
0
-
0.3
PWM frequency
fPWM
1.0
-
20
kHz
μs
Pre-driver supply voltage
Dead time
DT
Turn-off to turn-on (external)
2
-
-
Allowable input pulse width
PWIN
ON and OFF
1
-
-
Tightening torque
MT
‘M4’Type Screw
0.79
-
1.17
V
V
V
Nm
*1 Pre-driver power supply (VD4=15±1.5V) must have the capacity of Io=20mA(DC), 0.5A(Peak).
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Usage Precautions
1. This IPM includes internal bootstrap diodes and resistors. By adding a bootstrap capacitor “CB”, a high side drive
voltage is generated; each phase requires an individual bootstrap capacitor. The recommended value of CB is in the
range of 1 to 47μF (±20%), however this value needs to be verified prior to production. If selecting the capacitance
more than 47μF (±20%), connect a resistor (about 40Ω) in series between each 3-phase upper side power supply
terminals (VB1,2,3) and each bootstrap capacitor. When not using the bootstrap circuit, each upper side pre-drive
power supply requires n external independent power supply.
2. It is essential that wirning length between terminals in the snubber circuit be kept as short as possible to reduce the
effect of surge voltages. Recommended value of “CS” is in the range of 0.1 to 10μF.
3. ”FAULT” (16pin) is open DRAIN output terminal (Active Low). Pull up resistor is recommended more than 5.6kΩ.
4. Inside the IPM, a thermistor used as the temperature monitor for internal substrate is connected between “TH1”
and “TH2” . Generally, one of terminals is connected to VSS, and the other is pulled up to external power supply
with pull-up resistor (Rp) externally. The temperature monitor example application is as follows please refer the
Fig.10 and Fig.11 below.
5. The pull-down resistor 33kΩ is provided internally at the signal input terminals. An external resistor of 2.2kΩ to
3.3kΩ should be added to reduce the influence of external wiring noise.
6. As protection of IPM to unusual current by a short circuit etc, it recommended installing shunt resistors and an
over-current protection circuit outside. Moreover, for safety, a fuse on Vcc line is recommended.
7. Disconnection of terminals U, V, W, during normal motor operation will cause damage to IPM, use caution with this
connections.
8. The “ITRIP” terminal (17pin) is the input terminal to shut down. When VITRIP exceeds threshold (0.44V to 0.54V),
all IGBTs are turned off. And normal operation resumes 2ms(typ) after over current condition is removed. Therefore,
please turn all the input signal off (Low) in case of detecting error at the “FAULT” terminal.
9.
When input pulse width is less than 1us, an output may not react to the pulse. (Both ON signal and OFF signal)
No.A2299-10/15
STK5F4U3C2D-E
The characteristic of thermistor
Parameter
Resistance
Resistance
B-Constant(25-50C)
Temperature Range
Symbol
R25
R100
B
Conditions
Tc=25C
Tc=100C
Min
97
4.93
4165
-40
Typ.
100
5.38
4250
Max
103
5.88
4335
+125
Unit
kΩ
kΩ
K
C
Fig.10 Variation of thermistor resistance with temperature.
Condition
Pull-up resistor = 39kohm +/-1%
Pull-up voltage of TH = 5V +/-0.3V
Fig.11 Variation of temperature sense voltage with thermistor temperature.
No.A2299-11/15
STK5F4U3C2D-E
Io-f curve
Motor Current vs. Frequency
(Sine wave oparation,Vcc=300V,cosθ=0.8,ON Duty=96%)
Phase Current : Io (A rms)
50
40
30
20
10
0
0
5
10
15
20
Switching Frequency : fc (KHz)
Fig.12 Maximum sinusoidal phase current as function of switching frequency.
at Tc=100C, Vcc=300V
Switching waveform
Turn on
Fig. 13 IGBT Turn-on. Typical turn-on waveform. at Tc=100C, Vcc=300V, Io=15A
Turn off
Fig. 14 IGBT Turn-off. Typical turn-off waveform. at Tc=100C, Vcc=300V, Io=15A
No.A2299-12/15
STK5F4U3C2D-E
CB capacitor value calculation for Boot strap circuit
Calculate condition
Item
Upper side power supply
Total gate charge of output power IGBT at 15V.
Upper side power supply low voltage protection.
Upper side power dissipation.
ON time required for CB voltage to fall from 15V to UVLO
Symbol
VBS
Qg
UVLO
IDMAX
TONMAX
Value
15
0.266
12
400
-
Unit
V
μC
V
μA
s
Capacitance calculation formula
Ton-max is upper arm maximum on time equal the time when the CB voltage falls from 15V to the upper limit of Low
voltage protection level.
“Ton-maximum" of upper side is the time that CB decreases 15V to the maximum low voltage protection of the upper
side (12V).
Thus, CB is calculated by the following formula.
VD x CB – Qg – IDmax * Ton-max = UVLO * CB
CB = (Qg + IDmax * Ton-max) / (VD – UVLO)
The relationship between Ton-max and CB becomes as follows.
Recommend Cb is approximately 3 times of above calculated value.
Please make the decision by the evaluation with the set
Bootstrap capacitance Cb (uF)
CB vs Tonmax
100
10
1
0.1
0.01
0.1
1
10
100
1000
tonmax(ms)
Fig.15 Ton-max vs CB characteristic.
No.A2299-13/15
STK5F4U3C2D-E
Package Dimensions
unit : mm
HYBRID INTEGRATED MODULE
CASE MODAW
ISSUE O
4.6
6.0
44
(68.0)
63.4
0.75
1
2.54
23
76.0
21 x 2.54 = 53.34
22
+ 0.2
0.05
R 2.3
3.2
8.0
45.0
+ 0.2
0.5 0.05
10.8
49.7
No.A2299-14/15
STK5F4U3C2D-E
ORDERING INFORMATION
Device
STK5F4U3C2D-E
Package
610AC-DIP4-UL
(Pb-Free)
Shipping (Qty / Packing)
6 / Tube
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PS No.A2299-15/15