Ordering number : EN*A2230 STK5F4U3E2D-E Advance Information Thick-Film Hybrid IC http://onsemi.com Inverter Power H-IC for 3-phase Motor Drive Overview This “Inverter Power H-IC” is highly integrated device containing all High Voltage (HV) control from HV-DC to 3-phase outputs in a single DIP module (Dual-In line Package). Output stage uses IGBT/FRD technology and implements Under Voltage Protection (UVP) and Over Current Protection (OCP) with a Fault Detection output flag. Internal Boost diodes are provided for high side gate boost drive. Function Single control power supply due to Internal bootstrap circuit for high side pre-driver circuit All control inputs and status outputs are at low voltage levels directly compatible with microcontrollers. A single power supply drive is enabled through the use of bootstrap circuits for upper power supplies Built-in dead-time for shoot-thru protection Having open emitter output for low side IGBTs; individual shunt resistor per phase for OCP Externally accessible embedded thermistor for substrate temperature measurement Shutdown function ‘ITRIP’ to disable all operations of the 6 phase output stage by external input Certification UL1557 (File number: E339285). Specifications Absolute Maximum Ratings at Ta = 25C Parameter Symbol Remarks Ratings Unit Supply voltage VCC P to NU,NV,NW, surge < 500V *1 450 V Collector-emitter voltage VCE P to U,V,W, U to NU, V toNV, or W to NW 600 V P , N , U,V,W terminal current. ±50 P , N , U,V,W terminal current. Tc=100C ±25 P , N, U,V,W terminal current , PW=1ms. ±100 A 20 V HIN1, 2, 3, LIN1, 2, 3, terminal. 0.3 to VDD V FAULT terminal. 0.3 to VDD V 62.5 W Output current Io Output peak current Iop Pre-driver supply voltage Input signal voltage FAULT terminal voltage Maximum loss VD1,2,3,4 VIN VFAULT VB1-VS1,VB2-VS2,VB3-VS3,VDD-VSS *2 Pd IGBT per channel Junction temperature Tj IGBT, FRD Storage temperature Tstg A 150 C 40 to +125 C 20 to +100 C Operating temperature Tc HIC case Tightening torque MT A screw part at use M4 type screw *3 1.17 Nm Withstand Voltage Vis 50Hz sine wave AC 1 minute *4 2000 VRMS Reference voltage is “VSS” terminal voltage unless otherwise specified. *1: Surge voltage developed by the switching operation due to the wiring inductance between the P and N terminals. *2: Terminal voltage: VD1=VB1-VS1, VD2=VB2-VS2, VD3=VB3-VS3, VD4=VDD-VSS. *3: Flatness of the heat-sink should be 0.25mm and below. *4. Test conditions: AC 2500V, 1 second. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. This document contains information on a new product. Specifications and information herein are subject to change without notice. ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. Semiconductor Components Industries, LLC, 2013 October, 2013 O0913HK No.A2230-1/14 STK5F4U3E2D-E Electrical Characteristics at Tc= 25C, VD1, VD2, VD3, VD4=15V Parameters Symbols Conditions Ratings Test Circuit Unit Min. Typ. Max. - - 1.0 mA - - 0.5 mA - 1.7 2.6 - 2.3 - Power output section Collector-to-emitter cut-off current ICE VCE=600V Boot-strap diode reverse current IR(BD) VR(BD)=600V Collector-to-emitter saturation voltage VCE(sat) Io=50A, Tj=25C Fig.1 Fig.2 Io=25A, Tj=100C Diode forward voltage VF Io=50A, Tj=25C Io=25A, Tj=100C Fig.3 - 1.8 2.7 - 2.5 - V V θj-c(T) IGBT - - 1.5 - C/W θj-c(D) FWD - - 1.8 - C/W - 0.05 0.4 - 1.0 4.0 Junction to case thermal resistance Control (Pre-driver) section Pre-drive power supply consumption current ID VD1,2,3=15V VD4=15V Fig.4 mA High level input voltage Vin H HIN1,HIN2,HIN3, - 2.5 - - V Low level input voltage Vin L LIN1,LIN2,LIN3 - - - 0.8 V ITRIP threshold voltage VITRIP ITRIP(17) to VSS(19) 0.44 0.49 0.54 V Pre-drive low voltage protection UVLO - 10 - 12 V FAULT terminal input electric current IOSD - - 1.5 - mA FAULT clearance delay time FLTCLR - 1.0 - 3.0 ms - 90 - 110 kΩ - 0.7 1.5 μs Protection section Thermistor for substrate temperature monitor Rt VFAULT=0.1V From time fault condition clear Resistance between the TH1 and TH2 terminals Fig.5 Switching character Switching time tON tOFF Io=50A, Inductive load - 1.1 2.1 μs - 1100 - μJ - 1200 - μJ Etot - 2300 - μJ Eon Io=50A,VCC=300V, - 1200 - μJ μJ Turn-on switching loss Eon Turn-off switching loss Eoff Total switching loss Turn-on switching loss Io=50A, VCC=300V, VD=15V, L=280μH Fig.6 Turn-off switching loss Eoff VD=15V,L=280μH, - 1350 - Total switching loss Etot Tc=100C - 2550 - μJ Erec Io=50A,VCC=300V, - 52.5 - μJ - 104 - ns Diode reverse recovery energy Diode reverse recovery time Trr VD=15V,L=280μH, Tc=100C Reference Voltage is “VSS” terminal voltage unless otherwise specified. No.A2230-2/14 STK5F4U3E2D-E Notes 1. When the internal protection circuit operates, a FAULT signal is turned ON (When the FAULT terminal is low level, FAULT signal is ON state : output form is open DRAIN) but the FAULT signal does not latch. After protection operation ends, it returns automatically within about 1ms to 3ms and resumes operation beginning condition. So, after FAULT signal detection, set all input signal to OFF (Low) at once.How ever, the operation of pre-drive power supply low voltage protection (UVLO:with hysteresis about 0.2V) is as follows. Upper side: The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the input signal will turn ‘low’ Lower side: The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage. 2. When assembling the H-IC on the heat sink with M4 type screw, tightening torque range is 0.79Nm to 1.17Nm. 3. The pre-drive low voltage protection is the feature to protect a device when the pre-driver supply voltage falls due to an operating malfunction. 4. When use the over-current protection with external resistors, please set the current protection level to be equal or less than the rating of output peak current (Iop). Pin Assignment Pin No. Name Description Pin No. Name Description 1 VB1 High side floating supply voltage 1 44 P Positive bus input voltage 2 VS1 High side floating supply offset voltage 43 P Positive bus input voltage 3 - Without pin 42 P Positive bus input voltage 4 VB2 High side floating supply voltage 2 41 - Without pin 5 VS2 High side floating supply offset voltage 40 U U+ phase output 6 - Without pin 39 U U+ phase output 7 VB3 High side floating supply voltage 3 38 U U+ phase output 8 VS3 High side floating supply offset voltage 37 - Without pin 9 - Without pin 36 V V+ phase output 10 HIN1 Logic input high side driver-Phase1 35 V V+ phase output 11 HIN2 Logic input high side driver-Phase2 34 V V+ phase output 12 HIN3 Logic input high side driver-Phase3 33 - Without pin 13 LIN1 Logic input low side driver-Phase1 32 W W+ phase output 14 LIN2 Logic input low side driver-Phase2 31 W W+ phase output 15 LIN3 Logic input low side driver-Phase3 30 W W+ phase output 16 FAULT Fault out 29 - Without pin 17 ITRIP Over-current protection level setting pin 28 NU U- phase output 18 VDD +15V main supply 27 NU U- phase output 19 VSS1 Negative main supply 26 NV V- phase output 20 VSS2 Negative main supply 25 NV V- phase output 21 TH1 Thermistor out 24 NW W- phase output 22 TH2 Thermistor out 23 NW W- phase output No.A2230-3/14 STK5F4U3E2D-E Block Diagram U(38,39,40) V(34,35,36) W(30,31,32) VB1(1) VS1(2) VB2(4) VS2(5) VB3(7) VS3(8) P (42,43,44) DB DB DB U.V. U.V. U.V. RB NU(27,28) NV(25,26) NW(23,24) TH1(21) TH2(22) Thermistor Level Shifter Level Shifter Level Shifter HIN1(10) HIN2(11) HIN3(12) Logic Logic Logic LIN1(13) LIN2(14) LIN3(15) Shutdown ITRIP(17) VDD(18) Q - Detect VSS1(19) VSS2(20) S + Under voltage Timer Vref R Latch time about 1 to 3ms FAULT(16) No.A2230-4/14 STK5F4U3E2D-E Test Circuit (The tested phase: U+ shows the upper side of the U phase and U- shows the lower side of the U phase.) ICE / IR(BD) M N U+ 42 38 V+ 42 34 W+ 42 30 M N U(BD) 1 19 V(BD) 4 19 W(BD) 7 19 U38 27 V34 25 W30 23 ICE 1 M A VD1=15V 2 4 VD2=15V 5 VCE 7 VD3=15V 8 18 VD4=15V 19,20 N Fig.1 VCE(SAT) (Test by pulse) M N m U+ 42 38 10 V+ 42 34 11 W+ 42 30 12 U38 27 13 V34 25 14 W30 23 15 1 M VD1=15V 2 4 VD2=15V 5 V Io 7 VD3=15V VCE(SAT) 8 18 VD4=15V 5V m 19,20 Fig.2 VF (Test by pulse) M N U+ 42 38 V+ 42 34 N W+ 42 30 U38 27 V34 25 W30 23 M V VF Io N Fig.3 ID M N VD1 1 2 VD2 4 5 VD3 7 8 VD4 18 19 ID A M VD* N Fig.4 No.A2230-5/14 STK5F4U3E2D-E ■ISD (The circuit is a representative example of the lower side U phase.) VD1=15V Input signal (0 to 5V) VD2=15V 38 1 2 4 5 ITRIP Io 7 VD3=15V 8 18 VD4=15V Io Input signal 13 19,20 27 Fig.5 Switching time (The circuit is a representative example of the lower side U phase.) 42 1 Input signal (0 to 5V) VD1=15V 2 4 VD2=15V 90% 5 38 Vcc 7 Io VD3=15V 10% tON tOFF CS 8 18 Io VD4=15V Input signal 13 19,20 27 Fig.6 RB-SOA (The circuit is a representative example of the lower side U phase.) Input signal (0 to 5V) 42 1 VD1=15V 2 4 VD2=15V Io 5 38 Vcc 7 VD3=15V CS 8 18 Io VD4=15V Input signal 13 19,20 27 Fig.7 No.A2230-6/14 STK5F4U3E2D-E Input / Output Timing Chart VBS undervoltage protection reset signal ON HIN1,2,3 OFF LIN1,2,3 *2 VDD VDD undervoltage protection reset voltage *3 VBS undervoltage protection reset voltage VB1,2,3 VIT≥0.54V *4 ITRIP terminal Voltage VIT<0.44V FLTEN ON Upper U, V, W *1 OFF Lower U ,V, W *1 Automatically reset after protection (typ.2ms) Notes: *1 : Diagram shows the prevention of shoot-thru via control logic, however, more dead time must be added to account for switching delay externally. *2 : When VDD decreases all gate output signals will go low and cut off all 6 IGBT outputs. When VDD rises the operation will resume immediately. *3 : When the upper side voltage at VB1, VB2 and VB3 drops only the corresponding upper side output is turned off. The outputs return to normal operation immediately after the upper side gate voltage rises. *4 : When VITRIP exceeds threshold all IGBT’s are turned off and normal operation resumes 2ms (typ) after over current condition is removed. No.A2230-7/14 STK5F4U3E2D-E Logic level table P(42,43,44) FLTEN Ho HIN1,2,3 (10,11,12) U(38,39,40) V(34,35,36) W(30,31,32) IC Driver LIN1,2,3 (13,14,15) Lo Itrip HIN1,2,3 LIN1,2,3 U,V,W 1 0 1 0 Vbus 1 0 0 1 0 1 0 0 0 Off 1 0 1 1 Off 1 1 X X Off 0 X X X Off NU(27,28) NV(25,26) NW(23,24) Application Circuit Example + CB CB + CB +5.0V + RFault 1 VB1 2 VS1 4 VB2 5 VS2 7 VB3 8 VS3 U V 30 31 32 36 35 34 W 32 31 30 P 44 43 42 RP 10 HIN1 11 HIN2 Control Circuit Vcc + CS + CI 12 HIN3 13 LIN1 - 14 LIN2 15 LIN3 16 FAULT 17 ITRIP RSU NU 28 27 RS Controler. VDD=15V CD Rpd 18 VDD 19 VSS1 20 VSS2 21 TH1 22 TH2 Missing pin 3, 6, 9, 29, 33, 37, 41 NV-26 25 RSV RSW NW-24 23 Op-Amp. Controler. No.A2230-8/14 STK5F4U3E2D-E Recommended Operating Conditions at Tc = 25C Parameter Supply voltage Symbol Conditions Ratings min typ max 0 280 400 Unit VCC P to NU,NV,NW VD1,2,3 VB1 –VS1,VB2 –VS2,VB3 –VS3 12.5 15 17.5 VD4 VDD – VSS *1 13.5 15 16.5 Input ON voltage VIN(ON) 3.0 - 5.0 Input OFF voltage VIN(OFF) HIN1,HIN2,HIN3, LIN1,LIN2,LIN3 0 - 0.3 PWM frequency fPWM 1.0 - 20 kHz μs Pre-driver supply voltage Dead time DT Upper/lower input signal downtime 2 - - Allowable input pulse width PWIN ON pulse width/OFF pulse width 1 - - Tightening torque MT ‘M4’Type Screw 0.79 - 1.17 V V V Nm *1 Pre-driver power supply (VD4=15±1.5V) must have the capacity of Io=20mA(DC), 0.5A(Peak). Usage Precautions 1. This H-IC includes internal bootstrap diodes and resistors. By adding a bootstrap capacitor “CB”, a high side drive voltage is generated; each phase requires an individual bootstrap capacitor. The recommended value of CB is in the range of 1 to 47μF (±20%), however this value needs to be verified prior to production. If selecting the capacitance more than 47μF (±20%), connect a resistor (about 40Ω) in series between each 3-phase upper side power supply terminals (VB1,2,3) and each bootstrap capacitor. When not using the bootstrap circuit, each upper side pre-drive power supply requires n external independent power supply. 2. It is essential that wirning length between terminals in the snubber circuit be kept as short as possible to reduce the effect of surge voltages. Recommended value of “CS” is in the range of 0.1 to 10μF. 3. ”FAULT” (16pin) is open DRAIN output terminal (Active Low). Pull up resistor is recommended more than 5.6kΩ. 4. Inside the H-IC, a thermistor used as the temperature monitor for internal substrate is connected between “TH1” and “TH2” . Generally, one of terminals is connected to VSS, and the other is pulled up to external power supply with pull-up resistor (Rp) externally. The temperature monitor example application is as follows please refer the Fig.11 and Fig.12 below. 5. The pull-down resistor 33kΩ is provided internally at the signal input terminals. An external resistor of 2.2kΩ to 3.3kΩ should be added to reduce the influence of external wiring noise. 6. As protection of H-IC to unusual current by a short circuit etc, it recommended installing shunt resistors and an over-current protection circuit outside. Moreover, for safety, a fuse on Vcc line is recommended. 7. Disconnection of terminals U, V, W, during normal motor operation will cause damage to H-IC, use caution with this connections. 8. The “ITRIP” terminal (17pin) is the input terminal to shut down. When VITRIP exceeds threshold (0.44V to 0.54V), all IGBTs are turned off. And normal operation resumes 2ms(typ) after over current condition is removed. Therefore, please turn all the input signal off (Low) in case of detecting error at the “FAULT” terminal. 9. When input pulse width is less than 1us, an output may not react to the pulse. (Both ON signal and OFF signal) No.A2230-9/14 STK5F4U3E2D-E The characteristic of thermistor Parameter Resistance Resistance B-Constant(25-50C) Temperature Range Symbol R25 R100 B Condition Tc=25C Tc=100C Min 97 4.93 4165 -40 Typ. 100 5.38 4250 Max 103 5.88 4335 +125 Unit kΩ kΩ K C This data shows the example of the application circuit, does not guarantee a design as the mass production set. Fig.11 Variation of thermistor resistance with temperature Condition Pull-up resistor = 39kohm +/-1% Pull-up voltage of TH = 5V +/-0.3V Fig.12 Variation of temperature sense voltage with thermistor temperature No.A2230-10/14 STK5F4U3E2D-E Io-f curve STK5F4U3E2D-E Fig.13 Maximum sinusoidal phase current as function of switching frequency at Tc=100C, Vcc=300V Switching waveform Turn on Fig. 14 IGBT Turn-on. Typical turn-on waveform at Tc=100C, Vcc=300V, Ic=50A Turn off Fig. 15 IGBT Turn-off. Typical turn-off waveform Tc=100C, Vcc=300V, Ic=50A No.A2230-11/14 STK5F4U3E2D-E Capacitor value calculation for Boot strap (Cb) Calculate condition Item Upper side power supply Total gate charge of output power IGBT at 15V. Upper side power supply low voltage protection. Upper side power dissipation. ON time required for CB voltage to fall from 15V to UVLO Symbol VBS Qg UVLO IDMAX TONMAX Value 15 0.9 12.5 120 - Unit V μC V μA s Capacitance calculation formula TONMAX is upper arm maximum on time equal the time when the CB voltage falls from 15V to the upper limit of Low voltage protection level. “ton-maximum" of upper side is the time that CB decreases 15V to the maximum low voltage protection of the upper side (12V). Thus, CB is calculated by the following formula. VD x CB – Qg – IDMAX * TONMAX = UVLO * CB CB = (Qg + IDMAX * TONMAX) / (VD – UVLO) The relationship between TONMAX and CB becomes as follows. CB is recommended to be approximately 3 times the value calculated above. The recommended value of CB is in the range of 1 to 47μF, however, the value needs to be verified prior to production. Fig.16 TONMAX vs CB characteristic No.A2230-12/14 STK5F4U3E2D-E Package Dimensions unit : mm Missing Pin : 3,6,9,29,33,37,41 4.6 R2 .3 note1 +0.2 0.75 -0.05 3 2.54 note2 76.0 21×2.54=53.34 note3 23 STK5F4U3E2D 22 (68.0) 63.4 6.0 44 1 3.2 8.0 45.0 0 to 10.8 +0.2 0.5 -0.05 5° 1 2 49.7 note1 : Mark of mirror surface for No.1 pin identification. note2 : The form of a character in this drawing differs from that of H-IC. note3 : This indicates the Lot code. The form of a character in this drawing differs from that of H-IC. Part Name 1 : Case 2 : Substrate 3 : Lead Frame Material EPOXY IMST Substrate Cu Treatment Sn No.A2230-13/14 STK5F4U3E2D-E ORDERING INFORMATION Device STK5F4U3E2D-E Package 610AC-DIP4-UL (Pb-Free) Shipping (Qty / Packing) 6 / Fan-Fold ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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