Datasheet

PI6C557-06
1:4 HCSL PCIe® Buffer
Features
Description
ÎÎ1:4 HCSL clock buffer
The PI6C557-06 is a high performance PCIe® buffer with four
HCSL outputs compliant to PCIe® Gen 1, 2 and 3 standards. The
device has selectable reference inputs to provide flexibility in system design.
ÎÎPCIe® Gen 1, 2 and 3 compliant
ÎÎSelectable reference inputs
ÎÎCycle-to-Cycle Jitter <70ps
ÎÎOutput-to-Output Skew <35ps
ÎÎ3.3V supply voltage
ÎÎTSSOP-20 package
ÎÎIndustrial Temperature
Applications
ÎÎServers
ÎÎEmbedded computing systems
ÎÎNetworking systems
Block Diagram
OE
SRCIN1
SRCIN1#
SRCIN2
SRCIN2#
Pin Configuration
CLK0
CLK0#
CLK1
CLK1#
CLK2
CLK2#
CLK3
CLK3#
REFSEL
PD#
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REFSEL
1
20
CLK0
VDDIN
2
19
CLK0#
SRCIN1
3
18
CLK1
SRCIN1#
4
17
CLK1#
PD#
5
16
GND
SRCIN2
6
15
VDDOUT
SRCIN2#
7
14
CLK2
OE
8
13
CLK2#
GND
9
12
CLK3
IRef
10
11
CLK3#
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PI6C557-06
1:4 HCSL PCIe Buffer
Function Table
REFSEL
INPUT Selected
0
SRCIN2 / SRCIN2#
1
SRCIN1 / SRCIN1#
Pin Description
Pin #
Pin
Type
Description
1
REFSEL
Input
Internal pull up. “0” select SRCIN2/2#; “1” selects SRCIN1/1#.
2
VDDIN
Power
3.3V for input buffer
3, 4
SRCIN1, SRCIN1#
Input
HCSL Input 1
5
PD#
Input
Power Down mode. “0” is “power down”, “1” is normal operation. Internal pull
up. Outputs are in tri-state when power down.
6, 7
SRCIN2, SRCIN2#
Input
HCSL input 2
8
OE
Input
Output enable for all outputs. “0” is “disabled” as tri-stated, “1” is enable output mode. Internal pull up.
9,16
GND
Power
Ground
10
IRef
Input
External resistor connection for internal current reference
11,12
CKL3#, CLK3
Output
HCSL output
13,14
CKL2#, CLK2
Output
HCSL output
15
VDDOUT
Power
3.3V for outputs
17, 18
CKL1#, CLK1
Output
HCSL output
19, 20
CKL0#, CLK0
Output
HCSL output
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PI6C557-06
1:4 HCSL PCIe Buffer
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
Storage Temperature........................................- 65°C to +155°C
Ambient Temperature with Power Applied........-40°C to +85°C
3.3V Analog Supply Voltage . ...............................- 0.5 to +4.6V
ESD Protection(HBM)..................................................... 2000V
Recommended Operating Condition
Symbol
Description
Test Conditions
Min
Type
Max
Unit
VDD
Power supply
-
3.135
-
3.465
V
50W, 2pF
-
41
HCSL Load (See page 6)
-
-
90
mA
-
-
15
mA
0.3
mA
+85
ºC
IDD
Total Power Supply Current
IDD_Output tri-stated
Total power supply current with
Outputs are tri-stated
OE is “0”
Idd power down
Total power supply current in power
down mode
PD# = “0”, no load
TA
Operating temperature
Industrial temperature
mA
(1)
-40
Note:
1. This is for 2 outputs. Total Current = ICORE + 2x IOUTPUT = 13 + 14 x 2 = 41mA
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PI6C557-06
1:4 HCSL PCIe Buffer
LVCMOS DC Electrical Characteristics (Over Operating Conditions)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
VIH
Input High Voltage
-
2
-
VDD+0.3
V
VIL
Input Low Voltage
-
-0.3
-
0.8
V
IIH
Input High Current
VIN = VDD
-
-
45
µA
IIL
Input Low Current
VIN = 0V
-45
-
-
µA
R PU
Internal pull up resistance
REFSEL, OE, PD#
-
120
-
kOhm
Min.
Typ.
Max.
Unit
-
-
5
µA
45
µA
Differential DC Input Characteristics (Over Operating Conditions)
Symbol
IIH
IIL
Parameter
Input High Current, INInput High Current, IN+
Input Low Current, INInput Low Current, IN+
Conditions
VIN = VDD=3.465V
VIN = 0V
VIH
Input High Voltage
VIL
Input Low Voltage
VID
Input differential voltage
Single-ended swing LVDS
VIO
Input Differential offset voltage
Cross point
Single-ended swing HCSL
-45
-
-
µA
-5
-
-
µA
660
700
850
mV
-150
0
250
350
450
mV
1.125
1.25
1.375
mV
Min.
Typ.
Max.
Unit
mV
HCSL DC Electrical Characteristics (Over Operating Conditions)
Symbol
Parameter
Conditions
VOH
Output High Voltage
-
660
-
850
mV
VOL
Output Low Voltage
-
-
-
150
mV
VCROSS
Absolute Crossing Point Voltages
-
250
-
550
mV
ΔVCROSS
Total variation of VCROSS overall
edges
-
-
-
140
mV
IOH
Output High Current
With 475-Ohm resistor connected between IREF pin and
GND
-
14
-
mA
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PI6C557-06
1:4 HCSL PCIe Buffer
HCSL AC Electrical Characteristics (Over Operating Conditions)
Symbol
Parameter
Conditions
Fin
Input Frequency
-
FOUT
Output Frequency
HCSL termination
Tr /Tf
Output Rise/Fall time
Between 0.175V and 0.525V(2)
ΔTr /ΔTf
Rise and Fall Time Variation(2)
TPD
Propagation delay
Tskew
Typ.
Max.
-
-
200
-
-
175
-
700
ps
-
-
-
125
ps
Input to output measured at the
mid point level
-
3.0
4.5
ns
Output-to-Output Skew(3)
-
-
-
35
ps
TDC
Output Duty Cycle
-
47
-
53
%
JC
Cycle to cycle jitter (3)
Differential waveform
-
50
70
ps
Additive RMS jitter (4)
100MHz HCSL from 12 kHz to
20MHz
-
330
-
fs
-
1
ps
JAdd
(3)
Additive RMS jitter for PCIe 2.0
JPhase
RMS phase jitter for PCIe 3.0
Min.
<0
200
(1)
Unit
MHz
MHz
High Frequency
-
0.4
1
ps
Low Frequency
-
0.6
3
ps
50mVp-p input sine wave 100kHz
to 600kHz(2)
-
-53
-
dBc
PSR
Power Supply Noise Rejection
TOEN
OE enable time
100
ns
TOEF
OE disable time
100
ns
Notes:
1. For LVDS Termination , the maximum frequency is 100MHz
2. Measurement is taken from Single Ended waveform.
3. Measurement is taken from Differential waveform.
4. Additive jitter is calculated from input and output RMS phase jitter. (Ja = √(output jitter)2 – (input jitter)2
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PI6C557-06
1:4 HCSL PCIe Buffer
HCSL output buffer characteristics
VDD
(3.3V ± 5%)
Slope ~ 1/Rs
RO
IOUT
ROS
Iout
0V
VOUT = 0.85V max
0.85V
HCSL output buffer characteristics
Symbol
Minimum
Maximum
RO
3000Ω
N/A
ROS
unspecified
unspecified
VOUT
N/A
850mV
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PI6C557-06
1:4 HCSL PCIe Buffer
Configuration
Rs
33Ω 5%
PI6C557-06
475Ω
1%
Clock
Rs
33Ω 5%
Clock#
Rp
49.9Ω 1%
Rp
49.9Ω 1%
2pF
5%
2pF
5%
Test Load Board Termination for HCSL output
PI6C557-06
475Ω
1%
Clock
Ro
100Ω
1%
100Ω
Clock#
RT
150Ω
1%
RT
150Ω
1%
Test Load Board Termination for LVDS output
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PI6C557-06
1:4 HCSL PCIe Buffer
Packaging Mechanical: 20-pin TSSOP (L)
DOCUMENT CONTROL NO.
PD - 1311
20
REVISION: E
DATE: 03/09/05
.169
.177
1
.252
.260
6.4
6.6
4.3
4.5
.004 0.09
.008 0.20
1
.047
1.20
Max
.007
.012
0.19
0.30
.0256
BSC
0.65
0.45
0.75
SEATING
PLANE
.018
.030
.238
.269
6.1
6.7
.002 0.05
.006 0.15
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2336 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AC
DESCRIPTION: 20-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
Ordering Information(1-3)
Ordering Code
Package Code
Package Type
Operating Temperature
PI6C557-06LIE
L
Pb-free & Green, 20-pin 173-mil TSSOP
-40°C to 85°C
PI6C557-06LE
L
Pb-free & Green, 20-pin 173-mil TSSOP
0°C to 70°C
Notes:
1. Thermal characteristics and package top marking information can be found at http://www.pericom.com/packaging/
2. E = lead-free and green packaging
3. Adding an X suffix = tape/reel
Pericom Semiconductor Corporation • 1-800-435-2336
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