ROHM BU2362FV

TECHNICAL NOTE
High-performance Clock Generator Series
DVD-video Reference
Clock Generators
for Audio/Video Equipments
BU2280FV, BU2288FV, BU2360FV, BU2362FV
●Description
These clock generators are an IC generating three types of clocks - VIDEO, AUIDIO and SYSTEM clocks – necessary for
DVD player systems, with a single chip through making use of the PLL technology. Particularly, the AUDIO clock is a
DVD-Video reference and yet achieves high C/N characteristics to provide a low level of distortion factor.
●Features
1) Connecting a crystal oscillator generates multiple clock signals with a built-in PLL.
2) AUDIO clock of high C/N characteristics providing a low level of distortion factor
3) The AUDIO clock provides switching selection outputs.
4) Single power supply of 3.3 V
●Applications
DVD players
●Lineup
Part name
Power source voltage [V]
Reference frequency [MHz]
256fs
BU2280FV
3.0 ～ 3.6
27.0000
27.0000
36.8640
/33.8688
24.5760
/22.5792
18.4320
/16.9344
-
other
-
768 (48k type)
768 (44.1k type)
384 (44.1k type)
33.8688
70
8.0
SSOP-B24
2
1
1/2
DVD VIDEO
768fs
Output
frequency
[MHz]
512fs
DVD AUDIO, CD
(Switching outputs)
SYSTEM
384fs
Jitter 1σ [psec]
Long-term-Jitter p-p [nsec]
Package
BU2288FV
3.0 ～ 3.6
27.0000
27.0000
-
BU2360FV
2.7 ～ 3.6
27.0000
27.0000
-
BU2362FV
2.7 ～ 3.6
27.0000
27.0000
-
-
-
-
24.5760
/22.5792
24.5760
/22.5792
24.5760
/22.5792
-
-
-
36.8640
/16.9344
33.8688
16.9344
70
5.0
SSOP-B16
-
36.8640
/16.9344
36.8640
33.8688
16.9344
70
5.0
SSOP-B16
33.8688
70
2.5
SSOP-B16
Sep. 2008
●Absolute Maximum Ratings (Ta=25℃)
Parameter
Supply voltage
Input voltage
Storage temperature range
Power dissipation
Symbol
VDD
VIN
Tstg
PD
BU2280FV
-0.5 ～ ＋7.0
-0.5～VDD＋0.5
-30 ～ ＋125
630 *1
BU2288FV
-0.5 ～ ＋7.0
-0.5～VDD＋0.5
-30 ～ ＋125
450 *2
BU2360FV
-0.5 ～ ＋7.0
-0.5～VDD＋0.5
-30 ～ ＋125
450 *2
BU2362FV
-0.5 ～ ＋7.0
-0.5～VDD＋0.5
-30 ～ ＋125
450 *2
Unit
V
V
℃
mW
BU2362FV
2.7 ～ 3.6
0.8VDD～VDD
0.0 ～ 0.2VDD
-25 ～ ＋85
15
-
Unit
V
V
V
℃
pF
pF
pF
*1 In the case of exceeding Ta = 25℃, 6.3mW to be reduced per 1℃
*2 In the case of exceeding Ta = 25℃, 4.5mW to be reduced per 1℃
＊Operating is not guaranteed.
＊The radiation-resistance design is not carried out.
＊Power dissipation is measured when the IC is mounted to the printed circuit board.
●Recommended Operating Range
Parameter
Parameter
Supply voltage
Input “H” Voltage
Input “L” Voltage
Operating temperature
Output load
27M output load 1
Symbol
VDD
VIH
VIL
Topr
CL
CL_27M1
CL_27M2
BU2280FV
3.0 ～ 3.6
0.8VDD～VDD
0.0 ～ 0.2VDD
-5 ～ ＋70
15
-
BU2288FV
3.0 ～ 3.6
0.8VDD～VDD
0.0 ～ 0.2VDD
-5 ～ ＋70
15
-
BU2360FV
2.7 ～ 3.6
0.8VDD～VDD
0.0 ～ 0.2VDD
-25 ～ ＋85
15
40 (CLK27M1)
25 (CLK27M2)
●Electrical characteristics
◎BU2280FV（VDD=3.3V, Ta=25℃, Crystal frequency 27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output L voltage
VOL
0.4
V
IOL=4.0mA
Output H voltage
VOH
2.4
V
IOH=-4.0mA
Consumption
IDD
30
50
mA
At no load
current
CLK768-44
33.8688
MHz
At FSEL=L, XTAL×3136 / 625 / 4
CLK768FS
CLK768-48
36.8640
MHz
At FSEL=H, XTAL×2048 / 375 / 4
CLK512-44
22.5792
MHz
At FSEL=L, XTAL×3136 / 625 / 6
CLK512FS
CLK512-48
24.5760
MHz
At FSEL=H, XTAL×2048 / 375 / 6
CLK384-44
16.9344
MHz
At FSEL=L, XTAL×3136 / 625 / 8
CLK384FS
CLK384-48
18.4320
MHz
At FSEL=H, XTAL×2048 / 375 / 8
CLK33M
CLK33M
33.8688
MHz
XTAL×147 / 40 / 4
CLK16M
CLK16M
16.9344
MHz
XTAL×147 / 40 / 8
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
P-J 1σ
70
psec
*1
Period-Jitter
P-J
420
psec
*2
MIN-MAX
MIN-MAX
Rise Time
Tr
-
2.5
-
nsec
Fall Time
Tf
-
2.5
-
nsec
Output Lock-Time
Tlock
-
-
1
msec
Period of transition time required for the
output reach 80％ from 20％ of
VDD.
Period of transition time required for the
output reach 20％ from 80％ of
VDD.
*3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
2/24
◎BU2288FV（VDD=3.3V, Ta=25℃, Crystal frequency 27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Output L voltage
VOH
2.4
-
-
V
Conditions
IOH=-4.0mA
Output H voltage
VOL
-
-
0.4
V
IOL=4.0mA
FSEL input VthL
VthL
0.2VDD
-
-
V
*4
FSEL input VthH
VthH
-
-
0.8VDD
V
*4
Hysteresis range
Vhys
0.2
-
-
V
Vhys=VthH-VthL*4
IDD
-
27.0000
40.5
mA
At no load
CLK512-44
-
22.5792
-
MHz
At FSEL1=OPEN XTAL＊3136/625/6
CLK512-48
-
24.5760
-
MHz
At FSEL1=L XTAL＊2048/375/6
CLK33M
CLK33M
-
33.8688
-
MHz
XTAL＊3136/625/4
CLK16M
CLK16M
-
16.9344
-
MHz
XTAL＊3136/625/8
CLK27M
CLK27M
-
27.0000
-
MHz
XTAL direct out
CLKA-A
-
16.9344
-
MHz
At FSEL1=OPEN XTAL＊3136/625/8
Action circuit current
CLK512FS
CLK A
CLKA-B
-
36.8640
-
MHz
Duty
Duty
45
50
55
%
Period-Jitter 1σ
P-J 1σ
-
70
-
psec
*1
Period-Jitter
MIN-MAX
P-J
MIN-MAX
-
420
-
psec
*2
Rise time
Tr
-
2.5
-
nsec
Fall time
Tf
-
2.5
-
nsec
Output Lock-Time
Tlock
-
-
1
msec
At FSEL1=L XTAL＊2048/375/4
Measured at a voltage of 1/2 of VDD
Period of transition time required for the
output reach 80％ from 20％ of
VDD.
Period of transition time required for the
output reach 20％ from 80％ of
VDD.
＊3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
◎BU2360FV（VDD=3.3V, Ta=25℃, Crystal frequency 27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Output L voltage
VOL
0.4
V
IOL=4.0mA
Output H voltage
VOH
2.4
V
IOH=-4.0mA
FSEL input VthL
VthL
0.2VDD
V
*4
FSEL input VthH
VthH
0.8VDD
V
*4
Hysteresis range
Vhys
0.2
V
Vhys = VthH - VthL *4
IDD
CLK27M
CLK33M
-
27.0
27.0000
33.8688
40.5
-
mA
MHz
MHz
At no load
XTAL direct out
XTAL×3136 / 625 / 4
Duty
Period-Jitter 1σ
Period-Jitter
MIN-MAX
CLK512_48
CLK512_44
Duty
P-J 1σ
P-J
MIN-MAX
45
-
24.5760
22.5792
50
70
55
-
MHz
MHz
%
psec
At FSEL=H, XTAL×2048 / 375 / 6
At FSEL=L, XTAL×3136 / 625 / 6
Measured at a voltage of 1/2 of VDD
*1
-
420
-
psec
*2
Rise Time
Tr
-
2.5
-
nsec
Action circuit current
CLK27M
CLK33M
CLK512FS
Fall Time
Tf
-
2.5
-
nsec
Output Lock-Time
Tlock
-
-
1
msec
Period of transition time required for the
output reach 80％ from 20％ of
VDD.
Period of transition time required for the
output reach 20％ from 80％ of
VDD.
*3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
3/24
◎BU2362FV（VDD=3.3V, Ta=25℃, Crystal frequency 27.0000MHz, unless otherwise specified.）
Parameter
Symbol
Min.
Typ.
Max.
Unit
Output L voltage
VOH
2.4
-
-
V
Output H voltage
VOL
-
-
0.4
V
IOL=4.0mA
Action circuit current
IDD
-
35
45
mA
At no load
CLK512-44
-
22.5792
-
MHz
At FSEL1=OPEN XTAL＊3136/625/6
CLK512-48
-
24.5760
-
MHz
At FSEL1=L XTAL＊2048/375/6
CLK512FS
Conditions
IOH=-4.0mA
CLKA-A
-
16.9344
-
MHz
At FSEL1=OPEN XTAL＊3136/625/8
CLKA-B
-
36.8640
-
MHz
At FSEL1=L XTAL＊2048/375/8
CLK36M
CLK36M
-
36.8640
-
MHz
XTAL＊2048/375/4
CLK33M
CLK33M
-
33.8688
-
MHz
XTAL＊3136/625/4
CLK16M
CLK16M
-
16.9344
-
MHz
XTAL＊3136/625/8
CLK27M
CLK27M
-
27.0000
-
MHz
XTAL direct out
Duty
Duty
45
50
55
%
Period-Jitter 1σ
P-J 1σ
-
70
-
psec
*1
Period-Jitter
MIN-MAX
P-J
MIN-MAX
-
420
-
psec
*2
Rise Time
Tr
-
2.5
-
nsec
Fall Time
Tf
-
2.5
-
nsec
Output Lock-Time
Tlock
-
-
1
msec
CLKA
Measured at a voltage of 1/2 of VDD
Period of transition time required for the
output reach 80％ from 20％ of
VDD.
Period of transition time required for the
output reach 20％ from 80％ of
VDD.
*3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
Common to BU2280FV, BU2288FV, BU2360FV and BU2362FV:
*1
Period-Jitter 1σ
This parameter represents standard deviation (1 ) on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
*2
Period-Jitter MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles
are sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
*3
Output Lock-Time
The Lock-Time represents elapsed time after power supply turns ON to reach a 3.0V voltage, after the system is switched
from Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at a specified
frequency, respectively.
BU2360FV, BU2288FV
This parameter represents lower and upper limit voltages at the Schmitt trigger input PIN having hysteresis characteristics
shown in figure below. The width requested by these differences is assumed to be a hysteresis width.
0.2VDD
0.8VDD
Vhys
Output Voltage [V]
4
0
VthL
VthH
Input Voltage [V]
4/24
●Reference data (BU2280FV basic data)
1.0V／div
1.0V／div
10dB／div
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.1 33.9MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
10KHz／div
Fig.2 33.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.3 33.9MHz Spectrum
VDD=3.3V, at CL=15pF
10KHz／div
500psec／div
5.0nsec／div
Fig.4 36.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
Fig.5 36.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.6 36.9MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.7 22.6MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.8 22.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.9 22.6MHz Spectrum
VDD=3.3V, at CL=15pF
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.10 24.6MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.11 24.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
5/24
10KHz／div
Fig.12 24.6MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2280FV basic data)
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
10.0nsec／div
Fig.13 16.9MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.14 16.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.15 16.9MHz Spectrum
VDD=3.3V, at CL=15pF
10.0nsec／div
Fig.16 18.4MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.17 18.4MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.18 18.4MHz Spectrum
VDD=3.3V, at CL=15pF
1.0V／div
5.0nsec／div
Fig.19 27MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.20 27MHz Period-Jitter
VDD=3.3V, at CL=15pF
1.0V／div
1.0V／div
10dB／div
1.0V／div
RBW=1KHz
VBW=100Hz
LT Jitter 6.2nsec
2.0nsec／div
Fig.22 24.6MHz LT Jitter
VDD=3.3V, at CL=15pF
LT Jitter 8.1nsec
2.0nsec／div
Fig.23 22.6MHz LT Jitter
VDD=3.3V, at CL=15pF
6/24
10KHz／div
Fig.21 27MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2280FV Temperature and Supply voltage variations data)
100
54
90
52
VDD=3.3V
VDD=3.7V
51
50
49
VDD=2.9V
48
47
46
45
80
VDD=3.3V
70
60
50
40
VDD=3.7V
30
20
10
0
0
25
50
75
100
0
25
Temperature：T[℃]
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
VDD=3.3V
51
50
VDD=3.7V
48
47
46
-25
0
25
50
75
60
50
VDD=3.3V
40
VDD=3.7V
30
20
Period-jitter1σ ： PJ-1σ[psec]
90
53
VDD=2.9V
50
VDD=3.3V
47
46
45
25
50
75
0
25
50
75
VDD=3.7V
80
VDD=3.3V
60
50
VDD=2.9V
40
30
20
90
Period-jitter1σ ： PJ-1σ[psec]
100
53
51
VDD=3.3V
50
49
VDD=3.7V
48
47
46
45
25
50
75
0
25
50
75
Temperature： T[ ℃]
Fig.33 24.6MHz
Temperature－Duty
VDD=3.3V
200
100
0
100
25
50
75
100
Fig.29 36.9MHz
Temperature r－Period-Jitter MIN-MAX
500
VDD=3.7V
400
300
VDD=2.9V
VDD=3.3V
200
100
100
-25
0
25
50
75
100
Temperature：T[℃]
Fig.32 22.6MHz
Temperature－Period-Jitter MIN-MAX
600
80
VDD=2.9V
70
VDD=3.3V
60
50
40
30
VDD=3.7V
20
10
0
-25
300
0
0
Fig.31 22.6MHz
Temperature－Period-Jitter 1σ
54
VDD=2.9V
400
Temperature： T[ ℃]
55
100
VDD=2.9V
VDD=3.7V
-25
10
-25
Fig.30 22.6MHz
Temperature－Duty
75
Temperature：T[℃]
70
100
50
600
Temperature： T[ ℃]
52
500
100
0
-25
25
0
0
Fig.28 36.9MHz
Temperature－Period-Jitter 1σ
100
48
0
Temperature：T[℃]
54
49
100
-25
10
55
VDD=3.7V
VDD=3.7V
Temperature：T[℃]
70
-25
Fig.27 36.9MHz
Temperature－Duty
51
200
Fig.26 33.9MHz
Temperature－Period-Jitter MIN-MAX
VDD=2.9V
Temperature： T[ ℃]
52
300
600
80
100
VDD=2.9V
400
100
0
45
Duty ： Duty[%]
75
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
53
49
50
Fig.25 33.9MHz
Temperature－Period-Jitter 1σ
55
VDD=2.9V
VDD=3.3V
Temperature： T[ ℃]
Fig.24 33.9MHz
Temperature－Duty
52
500
0
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
-25
Duty ： Duty[%]
VDD=2.9V
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
55
Period-jitter1σ ： PJ-1σ[psec]
5
500
VDD=3.7V
VDD=3.3V
400
300
VDD=2.9V
200
100
0
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.34 24.6MHz
Temperature－Period-Jitter 1σ
7/24
-25
0
25
50
75
100
Temperature：T[℃]
Fig.35 24.6MHz
Temperature－Period-Jitter MIN-MAX
●Reference data (BU2280FV Temperature and Supply voltage variations data)
100
54
90
52
VDD=2.9V
51
VDD=3.7V
50
49
VDD=3.3V
48
47
46
80
70
VDD=3.7V
60
50
40
30
VDD=3.3V
20
VDD=2.9V
0
25
50
75
-25
100
0
Fig.36 16.9MHz
Temperature－Duty
100
54
90
Period-jitter1σ ： PJ-1σ[psec]
55
Duty ： Duty[%]
VDD=3.3V
VDD=3.7V
51
50
49
VDD=2.9V
48
47
46
45
0
25
50
75
70
VDD=3.7V
50
40
VDD=3.3V
VDD=2.9V
30
20
-25
0
25
50
75
Period-jitter1σ ： PJ-1σ[psec]
52
VDD=2.9V
VDD=3.3V
48
47
46
45
0
25
50
75
100
Temperature：T[℃]
80
VDD=2.9V
70
VDD=3.3V
60
50
40
30
VDD=3.7V
20
10
VDD=3.7V
0
25
VDD=3.3V
VDD=2.9V
10
0
-25
0
25
50
50
75
100
Fig.43 27MHz
Temperature－Period-Jitter 1σ
30
20
75
300
VDD=2.9V
200
VDD=3.3V
100
-25
0
25
50
75
100
Fig.41 18.4MHz
Temperature－Period-Jitter MIN-MAX
VDD=2.9V
500
400
300
VDD=3.3V
200
VDD=3.7V
100
0
-25
50
40
VDD=3.7V
600
Temperature：T[℃]
Fig.42 27MHz
Temperature－Duty
100
Temperature： T[ ℃]
0
-25
75
400
Temperature：T[℃]
53
50
500
100
Fig.40 18.4MHz
Temperature－Period-Jitter 1σ
90
25
0
-25
100
49
0
Fig.38 16.9MHz
Temperature－Period-Jitter MIN-MAX
10
54
50
100
Temperature： T[ ℃]
60
55
VDD=3.7V
VDD=3.3V
600
Temperature：T[℃]
51
200
100
80
100
Fig.39 18.4MHz
Temperature－Duty
Duty ： Duty[%]
75
0
-25
Circuit Current ： IDD[mA]
50
Fig.37 16.9MHz
Temperature－Period-Jitter 1σ
53
VDD=2.9V
300
Temperature：T[℃]
Temperature：T[℃]
52
25
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
-25
VDD=3.7V
400
0
0
45
500
10
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
Duty：Duty[%]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Period-jitter1σ ： PJ-1σ[psec]
55
100
Temperature：T[℃]
Fig.45 Action circuit current
(with maximum output load)
Temperature－Consumption current
8/24
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.44 27MHz
Temperature－Period-Jitter MIN-MAX
●Reference data (BU2360FV basic data)
5.0nsec／div
Fig.46 27MHz output waveform
VDD=3.3V, at CL=40pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.47 27MHz Period-Jitter
VDD=3.3V, at CL=40pF
10KHz／div
Fig.48 27MHz Spectrum
VDD=3.3V, at CL=40pF
5.0nsec／div
Fig.49 27MHz output waveform
VDD=3.3V, at CL=25pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.50 27MHz Period-Jitter
VDD=3.3V, at CL=25pF
10KHz／div
Fig.51 27MHz Spectrum
VDD=3.3V, at CL=25pF
5.0nsec／div
Fig.52 33.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.53 33.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.54 33.9MHz Spectrum
VDD=3.3V, at CL=15pF
1.0V／div
5.0nsec／div
Fig.55 24.6MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.56 24.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
RBW=1KHz
VBW=100Hz
9/24
10KHz／div
Fig.57 24.6MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data (BU2360FV basic data)
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
5.0nsec／div
Fig.58 22.6MHz output waveform
VDD=3.3V, at CL=15pF
10KHz／div
Fig.60 22.6MHz Spectrum
VDD=3.3V, at CL=15pF
1.0V／div
1.0V／div
Fig.59 22.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
LT Jitter 2.5nsec
LT Jitter 2.3nsec
1.0nsec／div
1.0nsec／div
Fig61. 24.6MHz LT Jitter
VDD=3.3V, at CL=15pF
Fig62. 22.6MHz LT Jitter
VDD=3.3V, at CL=15pF
●Reference data (BU2360FV Temperature and Supply voltage variations data)
100
54
90
52
51
VDD=3.7V
VDD=3.3V
50
49
48
VDD=2.4V
47
46
45
70
60
50
40
VDD=3.7V
VDD=3.3V
30
20
10
0
-25
0
25
50
75
100
25
50
75
Fig.64 27MHz (40pF)
Temperature－Period-Jitter 1σ
90
Period-jitter1σ ： PJ-1σ[psec]
100
52
51
VDD=2.4V
50
49
48
VDD=3.7V
VDD=3.3V
46
45
0
25
50
75
100
300
VDD=3.3V
VDD=3.7V
200
100
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.65 27MHz (40pF)
Temperature－Period-Jitter MIN-MAX
600
VDD=2.4V
80
VDD=3.3V
70
60
50
40
VDD=3.7V
30
20
10
0
-25
400
100
Fig.63 27MHz (40pF)
Temperature－Duty
54
47
0
Temperature：T[℃]
55
VDD=2.4V
500
0
-25
Temperature：T[℃]
53
Duty ： Duty[%]
80
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
53
600
VDD=2.4V
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
Period-jitter1σ ： PJ-1σ[psec]
55
VDD=2.4V
500
400
300
VDD=3.7V
200
VDD=3.3V
100
0
-25
0
25
50
75
100
-25
0
25
50
75
100
Temperature：T[℃]
Temperature：T[℃]
Temperature： T[ ℃]
Fig.66 27MHz (25pF)
Temperature－Duty
Fig.67 27MHz (25pF)
Temperature－Period-Jitter 1σ
Fig.68 27MHz (25pF)
Temperature－Period-Jitter MIN-MAX
10/24
●Reference data (BU2360FV Temperature and Supply voltage variations data)
100
54
90
52
VDD=2.4V
51
VDD=3.3V
50
49
48
VDD=3.7V
47
46
45
80
70
VDD=2.4V
60
VDD=3.3V
50
40
VDD=3.7V
30
20
10
0
0
25
50
75
100
0
Temperature： T[ ℃]
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
Duty ： Duty[%]
53
52
VDD=2.4V
50
49
48
VDD=3.3V
VDD=3.7V
47
46
45
0
25
50
75
75
50
VDD=3.3V
40
VDD=2.4V
30
20
0
25
50
75
Period-jitter1σ ： PJ-1σ[psec]
VDD=3.3V
49
VDD=3.7V
47
46
45
25
50
75
100
Temperature： T[ ℃]
50
VDD=3.7V
70
VDD=3.3V
60
50
40
VDD=2.4V
30
20
10
0
25
VDD=3.3V
10
0
25
50
50
75
100
Fig.76 22.6MHz
Temperature－Period-Jitter 1σ
VDD=2.4V
0
75
VDD=3.3V
VDD=3.7V
200
100
0
25
50
75
100
Fig.74 24.6MHz
Temperature－Period-Jitter MIN-MAX
VDD=3.7V
500
400
300
200
VDD=2.4V
VDD=3.3V
100
0
-25
30
-25
300
-25
VDD=3.7V
80
40
20
400
600
Temperature：T[℃]
Fig.75 22.6MHz
Temperature－Duty
100
Temperature： T[ ℃]
0
0
75
VDD=2.4V
Temperature：T[℃]
50
-25
500
100
Fig.73 24.6MHz
Temperature－Period-Jitter 1σ
53
50
0
-25
90
25
Fig.71 33.9MHz
Temperature－Period-Jitter MIN-MAX
10
100
48
0
600
60
54
VDD=2.4V
100
Temperature： T[ ℃]
70
55
51
VDD=3.7V
200
-25
VDD=3.7V
Temperature： T[ ℃]
52
300
100
80
100
Fig.72 24.6MHz
Temperature－Duty
Duty ： Duty[ ％]
50
0
-25
Circuit Current ： IDD[mA]
25
Fig.70 33.9MHz
Temperature－Period-Jitter 1σ
55
VDD=3.3V
VDD=2.4V
400
Temperature：T[℃]
Fig.69 33.9MHz
Temperature－Duty
51
500
0
-25
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
-25
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
53
600
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
Period-jitter1σ ： PJ-1σ[psec]
55
100
Temperature： T[ ℃]
Fig.78 Action circuit current
(with maximum output load)
Temperature－Consumption current
11/24
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.77 22.6MHz
Temperature－Period-Jitter MIN-MAX
●Reference data（BU2362FV basic data）
5.0nsec／div
Fig.79 33.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
10KHz／div
Fig.80 33.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.81 33.9MHz Spectrum
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
5.0nsec／div
Fig.82 36.9MHz output waveform
VDD=3.3V, at CL=15pF
500psec／div
Fig.83 36.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.84 36.9MHz Spectrum
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.86 22.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.85. 22.6MHz output waveform
VDD=3.3V, at CL=15pF
10KHz／div
Fig.87 22.6MHz Spectrum
VDD=3.3V, at CL=15pF
5.0nsec／div
Fig.88 24.6MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.89 24.6MHz Period-Jitter
VDD=3.3V, at CL=15pF
12/24
Fig.90 24.6MHz Spectrum
VDD=3.3V, at CL=15pF
●Reference data（BU2362FV basic data）
5.0nsec／div
Fig.91 16.9MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
500psec／div
Fig.92 16.9MHz Period-Jitter
VDD=3.3V, at CL=15pF
10KHz／div
Fig.93 16.9MHz Spectrum
VDD=3.3V, at CL=15pF
500psec／div
10KHz／div
Fig.95 27MHz Period-Jitter
VDD=3.3V, at CL=15pF
Fig.96 27MHz Spectrum
VDD=3.3V, at CL=15pF
1.0V／div
1.0V／div
5.0nsec／div
Fig.94 27MHz output waveform
VDD=3.3V, at CL=15pF
10dB／div
1.0V／div
1.0V／div
RBW=1KHz
VBW=100Hz
LT Jitter 4.8nsec
2.0nsec／div
Fig.97 24.6MHz LT Jitter
VDD=3.3V, at CL=15pF
2.0nsec／div
Fig.98 22.6MHz LT Jitter
VDD=3.3V, at CL=15pF
13/24
●Reference data (BU2362FV Temperature and Supply voltage variations data)
100
90
90
53
51
VDD=2.4V
50
VDD=3.3V
VDD=3.7V
49
48
47
46
80
70
60
VDD=2.4V
50
40
30
VDD=3.3V
20
10
45
25
50
75
100
30
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
VDD=3.3V
51
VDD=2.4V
50
49
48
VDD=3.7V
47
46
10
0
25
50
75
100
-25
25
50
75
80
70
VDD=2.4V
VDD=3.7V
60
50
40
30
20
VDD=3.3V
10
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
VDD=3.3V
50
49
48
0
25
50
75
400
VDD=3.7V
47
46
0
25
50
75
100
-25
70
60
VDD=3.7V
50
VDD=2.4V
40
30
20
VDD=3.3V
90
Period-jitter1σ ： PJ-1σ[psec]
100
50
49
48
VDD=3.3V
47
46
0
25
50
75
400
VDD=3.7V
300
-25
0
25
50
VDD=2.4V
200
VDD=3.3V
100
-25
100
0
75
Temperature：T[℃]
Fig.108 24.6MHz
Temperature－Duty
100
25
50
75
100
Temperature： T[ ℃]
Fig.107 22.6MHz
Temperature－Period-Jitter MIN-MAX
600
80
70
VDD=2.4V
60
50
40
30
20
VDD=3.3V
VDD=3.7V
10
0
45
100
500
Temperature：T[℃]
VDD=3.7V
75
0
54
VDD=2.4V
50
Fig.104 36.9MHz
Temperature－Period-Jitter MIN-MAX
Fig.106 22.6MHz
Temperature－Period-Jitter 1σ
53
25
10
55
51
0
Temperature： T[ ℃]
80
Temperature：T[℃]
Fig.105 22.6MHz
Temperature－Duty
52
VDD=3.3V
600
-25
100
VDD=3.7V
200
0
45
-25
VDD=2.4V
300
100
Fig.103 36.9MHz
Temperature－Period-Jitter 1σ
55
VDD=2.4V
100
500
Temperature： T[ ℃]
Temperature：T[℃]
51
75
0
-25
Fig.102 36.9MHz
Temperature－Duty
52
50
600
100
53
25
Temperature：T[℃]
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
0
0
Fig.101 33.9MHz
Temperature－Period-Jitter MIN-MAX
0
45
-25
VDD=3.7V
20
Temperature： T[ ℃]
53
VDD=3.3V
40
Fig.100 33.9MHz
Temperature－Period-Jitter 1σ
55
52
VDD=2.4V
50
0
-25
Temperature：T[℃]
Duty ： Duty[%]
60
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
0
Fig.99 33.9MHz
Temperature－Duty
Duty ： Duty[ ％]
70
0
-25
Duty ： Duty[%]
VDD=3.7V
80
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
52
Period-jitter1σ ： PJ-1σ[psec]
100
54
Period-jitter1σ ： PJ-1σ[psec]
55
500
400
VDD=2.4V
300
200
VDD=3.3V
100
VDD=3.7V
0
-25
0
25
50
75
100
Temperature：T[℃]
Fig.109 24.6MHz
Temperature－Period-Jitter 1σ
14/24
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.110 24.6MHz
Temperature－Period-Jitter MIN-MAX
●Reference data (BU2362FV Temperature and Supply voltage variations data)
100
54
90
Period-jitter1σ ： PJ-1σ[psec]
55
51
VDD=3.7V
VDD=2.4V
50
49
VDD=3.3V
48
47
46
80
70
VDD=3.7V
60
40
30
VDD=3.3V
20
10
0
-25
0
25
50
75
0
90
Period-jitter1σ ： PJ-1σ[psec]
100
54
53
52
VDD=3.7V
VDD=3.3V
49
48
VDD=2.4V
47
25
50
75
46
25
50
75
70
VDD=3.3V
VDD=2.4V
60
50
40
30
VDD=3.7V
20
10
100
0
25
30
VDD=3.7V
20
VDD=3.3V
0
-25
0
25
50
75
75
100
Temperature： T[ ℃]
VDD=3.7V
VDD=2.4V
50
Fig.115 27MHz
Temperature－Period-Jitter 1σ
50
10
-25
0
25
50
75
100
Fig.113 16.9MHz)
Temperature－Period-Jitter MIN-MAX
500
VDD=2.4V
400
VDD=3.3V
300
200
VDD=3.7V
100
0
-25
Temperature：T[℃]
Fig.114 27MHz
Temperature－Duty
40
VDD=2.4V
100
600
0
0
200
Temperature： T[ ℃]
80
45
-25
VDD=3.3V
300
100
Fig.112 16.9MHz
Temperature－Period-Jitter 1σ
55
50
VDD=3.7V
400
Temperature：T[℃]
Fig.111 16.9MHz
Temperature－Duty
51
500
0
-25
100
Temperature：T[℃]
Duty ： Duty[%]
VDD=2.4V
50
45
Circuit Current ：IDD[mA]
Period-jitterMIN-MAX：
PJ-MIN-MAX[psec]
52
Period-jitterMIN-MAX ：
PJ-MIN-MAX[psec]
Duty ： Duty[%]
53
600
100
Temperature：T[℃]
Fig.117 Action circuit current
(with maximum output load)
Temperature－Consumption current
*Refer to the BU2362FV data for BU2288FV data.
15/24
-25
0
25
50
75
100
Temperature： T[ ℃]
Fig.116 27MHz
Temperature－Period-Jitter MIN-MAX
●Block diagram, Pin assignment
◎BU2280FV
3:CLK27M1
(27.0000MHz)
4:CLK27M2
(27.0000MHz)
24:CLK27M3
(27.0000MHz)
1/4
12:CLK33M
(33.8688MHz)
XTALIN=27.0000MHz
8:XTALIN
9:XTALOUT
XTAL
OSC
PLL1
1/6
22:CLK768FS
(CTRLFS=OPEN:36.8640MHz
CTRLFS=L
:33.8688MHz)
1/8
16:CLK512FS1
(CTRLFS=OPEN:24.5760MHz
CTRLFS=L
:22.5792MHz)
1/4
PLL2
1/6
15:CLK512FS2
(CTRLFS=OPEN:24.5760MHz
CTRLFS=L
:22.5792MHz)
1/8
20:CLK384FS
(CTRLFS=OPEN:18.4320MHz
CTRLFS=L
:16.9344MHz)
21:OE
23:CTRLFS
(FSEL=OPEN:48.0kHz type
FSEL=L
:44.1kHz type)
Fig.118
24:CLK27M3
2:VSS1
23:CTRLFS
3:CLK27M1
22:CLK768FS
4:CLK27M2
21:OE
5:AVDD
6:AVDD
7:AVSS
8:XTALIN
BU2280FV
BU2280FV
1:VDD1
20:CLK384FS
19:DVDD
18:DVSS
17:DVSS
9:XTALOUT
16:CLK512FS1
10:VSS2
15:CLK512FS2
11:VDD2
14:VDD2
12:CLK33M
13:VSS2
Fig.119
CTRLFS
L
OPEN
CLK384FS
16.9344MHz
18.4320MHz
CLK512FS
22.5792MHz
24.5760MHz
16/24
CLK768FS
33.8688MHz
36.8640MHz
●Block diagram, Pin assignment
◎BU2288FV
3:CLK27M
(27.0000MHz)
15:CLK33M
(33.8688MHz)
1/4
1/6
XTALIN=27.0000MHz
8:XTALIN
7:XTALOUT
XTAL
OSC
PLL1
1/8
13:CLK16M
(16.9344MHz)
PLL2
1/4
9:CLKA
(FSEL=OPEN:16.9344MHz
FSEL=L :36.8640MHz)
1/6
10:CLK512FS
(FSEL=OPEN:22.5792MHz
FSEL=L :24.5760MHz)
16:OE
14:FSEL1
Fig.120
16:OE
2:VSS2
15:CLK33M
3:CLK27M
4:TEST
5:AVDD
6:AVSS
BU2288FV
1:VDD2
14:FSEL1
13:CLK16M
12:DVDD
11:DVSS
7:XTALOUT
10:CLK512FS
8:XTALIN
9:CLKA
Fig.121
FSEL1
CLK512FS
CLKA
OPEN
L
22.5792MHz
24.5760MHz
16.9344MHz
36.8640MHz
17/24
●Block diagram, Pin assignment
◎BU2360FV
3:CLK27M
1 (27.0000MHz)
4:CLK27M
2 (27.0000MHz)
15:CLK33M1
(33.8688MHz)
1/4
13:CLK33M2
(33.8688MHz)
XTALIN=27.0000MHz
7:XTALIN
8:XTALOUT
XTAL
OSC
PLL1
1/6
PLL2
1/6
10:CLK512FS1
(FSEL=OPEN:24.5760MHz
FSEL=L
:22.5792MHz)
9:CLK512FS2
(FSEL=OPEN:24.5760MHz
FSEL=L
:22.5792MHz)
16:OE
14:FSEL
(FSEL=OPEN:48.0kHz type
FSEL=L
:44.1kHz type)
Fig.122
1:VDD2
16:OE
2:VSS2
15:CLK33M1
BU2360FV
3:CLK27M1
4:CLK27M2
5:AVDD
6:AVSS
14:FSEL
13:CLK33M2
12:DVDD
11:DVSS
7:XTALIN
10:CLK512FS1
8:XTALOUT
9:CLK512FS2
Fig.123
FSEL
L
OPEN
CLK512FS1 / 2
22.5792MHz
24.5760MHz
18/24
●Block diagram, Pin assignment
◎BU2362FV
3:CLK27M
(27.0000MHz)
15:CLK33M
(33.8688MHz)
1/4
1/6
XTALIN=27.0000MHz
8:XTALIN
7:XTALOUT
XTAL
OSC
PLL1
1/8
13:CLK16M
(16.9344MHz)
PLL2
1/4
16:CLK36M
(36.8640MHz)
9:CLKA
(FSE=OPEN:16.9344MHz
FSEL=L :36.8640MHz)
10:CLK512FS
(FSE=OPEN:22.5792MHz
FSEL=L :24.5760MHz)
1/6
14:FSEL1
Fig.124
16:CLK36M
2:VSS2
15:CLK33M
3:CLK27M
4:TEST
5:AVDD
6:AVSS
BU2362FV
1:VDD2
14:FSEL1
13:CLK16M
12:DVDD
11:DVSS
7:XTALOUT
10:CLK512FS
8:XTALIN
9:CLKA
Fig.125
FSEL1
OPEN
L
CLK512FS
22.5792MHz
24.5760MHz
19/24
CLKA
16.9344MHz
36.8640MHz
●Example of application circuit
◎BU2280FV
1:VDD1
24:CLK27M3
2:VSS1
23:CTRLFS
27.0000MHz
3:CLK27M1
22:CLK768FS
27.0000MHz
4:CLK27M2
27.0000MHz
0.1uF
6:AVDD
0.1uF
7:AVSS
BU2280FV
5:AVDD
21:OE
20:CLK384FS
OPEN:48.0kHz type
L:44.1kHz type
36.8640MHz
or 33.8688MHz
OPEN:Enable
L:Disable
18.4320MHz
or 16.9344MHz
19:DVDD
0.1uF
18:DVSS
8:XTALIN
17:DVSS
9:XTALOUT
16:CLK512FS1
10:VSS2
15:CLK512FS2
11:VDD2
14:VDD2
12:CLK33M
13:VSS2
0.1uF
24.5760MHz
or 22.5792MHz
24.5760MHz
or 22.5792MHz
0.1uF
33.8688MHz
Fig.126
Description of terminal
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PIN name
VDD1
VSS1
CLK27M1
CLK27M2
AVDD
AVDD
AVSS
XTALIN
XTALOUT
VSS2
VDD2
CLK33M
VSS2
VDD2
CLK512FS2
CLK512FS1
DVSS
DVSS
PIN function
Power supply for 27MHz
GND for 27MHz
27.0000MHz Clock output terminal 1
27.0000MHz Clock output terminal 2
Power supply for Analog block
Power supply for Analog block
GND for Analog block
Crystal input terminal
Crystal output terminal
GND for 33MHz
Power supply for 33MHz
33.8688MHz Clock output terminal
GND for 33MHz
Power supply for 33MHz
CTRLFS=OPEN:24.5760MHz, CTRLFS=L:22.5792MHz
CTRLFS=OPEN:24.5760MHz, CTRLFS=L:22.5792MHz
GND for Digital block
GND for Digital block
19
20
21
22
DVDD
CLK384FS
OE
CLK768FS
23
CTRLFS
24
CLK27M3
Power supply for Digital block
CTRLFS=OPEN:18.4320MHz, CTRLFS=L:16.9344MHz
Output enable (with pull-up), OPEN:enable, L:disable
CTRLFS=OPEN:36.8640MHz, CTRLFS=L:33.8688MHz
15, 16, 20, 22PIN output selection (with pull-up)
OPEN:24.5760MHz(15PIN, 16PIN), 18.4320MHz(20PIN), 36.8640MHz(22PIN)
L:22.5792MHz(15PIN, 16PIN), 16.9344MHz(20PIN), 33.8688MHz(22PIN)
27.0000MHz Clock output terminal 3
Note) Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the characteristics of ICs
may not be fully demonstrated.)
Mount 0.1F capacitors in the vicinity of the IC PINs between 1PIN (VDD1) and 2PIN (VSS1), 5PIN-6PIN (AVDD) and 7PIN (AVSS), 10PIN
(VSS2) and 11PIN (VDD2), 13PIN(VSS2) and 14PIN (VDD2), 17PIN-18PIN (DVSS) and 19PIN(DVDD), respectively.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2280FV from the printed circuit board or to insert
a capacitor (of 1 or less), which bypasses high frequency desired, between the power supply and the GND terminal.
20/24
●Example of application circuit
◎BU2360FV
1:VDD2
16:OE
2:VSS2
15:CLK33M1
0.1uF
3:CLK27M1
27.0000MHz
4: CLK27M2
5:AVDD
0.1uF
6:AVSS
BU2360FV
27.0000MHz
14:FSEL
13:CLK32M2
0.1uF
11:DVSS
9:CLK512FS2
8:XTALOUT
OPEN:48.0kHz type
L:44.1kHz type
33.8688MHz
12:DVDD
10:CLK512FS1
7:XTALIN
OPEN:Enable
L:Disable
33.8688MHz
24.5760MHz
or 22.5792MHz
24.5760MHz
or 22.5792MHz
Fig.127
Description of terminal
PIN No.
PIN name
1
2
3
4
5
6
7
8
9
10
11
12
13
VDD2
VSS2
CLK27M1
CLK27M2
AVDD
AVSS
XTALIN
XTALOUT
CLK512FS2
CLK512FS1
DVSS
DVDD
CLK33M2
14
FSEL
15
16
CLK33M1
OE
PIN function
Power supply for 27MHz
GND for 27MHz
27.0000MHz Clock output terminal 1 (CL=40pF)
27.0000MHz Clock output terminal 2 (CL=25pF)
Power supply for Analog block
GND for Analog block
Crystal input terminal
Crystal output terminal
FSEL=OPEN:24.5760MHz, FSEL=L:22.5792MHz
FSEL=OPEN:24.5760MHz, FSEL=L:22.5792MHz
GND for Digital block
Power supply for Digital block
33.8688MHz Clock output terminal 2
9, 10PIN output selection (with pull-up)
OPEN:24.5760MHz(9, 10PIN), L:22.5792MHz(9, 10PIN)
33.8688MHz Clock output terminal 1
Output enable (with pull-up), OPEN:enable, L:disable
Note) Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the characteristics of ICs
may not be fully demonstrated.)
Mount 0.1F capacitors in the vicinity of the IC PINs between 1PIN (VDD2) and 2PIN (VSS2), 5PIN (AVDD) and 6PIN (AVSS), 11PIN (DVSS) and
12PIN (DVDD), respectively.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2360FV from the printed circuit board or to insert
a capacitor (of 1 or less), which bypasses high frequency desired, between the power supply and the GND terminal.
21/24
●Example of application circuit
◎BU2362FV
16:CLK36M
36.8640MHz
2:VSS2
15:CLK33M
33.8688MHz
14:FSEL1
H:44.1KHz mode
L:48KHz mode
16.9344MHz
BU2362FV
27.0000MHz
1:VDD2
3:CLK27M
4:TEST
5:AVDD
6:AVSS
27.0000MHz
13:CLK16M
12:DVDD
11:DVSS
10:CLK512FS1
7:XTALOUT
9:CLKA
8:XTALIN
22.5792MHz
or 24.5670MHz
16.9344MHz
or 36.8640MHz
Fig.128
Pin No.
1
2
3
PIN NAME
VDD2
VSS2
CLK27M
Function
4
TEST
5
6
7
8
9
10
11
AVDD
AVSS
XTALOUT
XTALIN
CLKA
CLK512FS
DVSS
Power supply for CLK27, CLK36M
GND for CLK27, CLK36M
27MHz Clock output terminal
Input pin for TEST : with pull-down
(Please set ”L” or OPEN, normally)
Power supply for Analog block
GND for Analog block
Crystal output terminal
Crystal input terminal
CLKA output terminal (16.9344MHz or 36.8640MHz)
512fs Clock output terminal (22.5792MHz or 24.5760MHz)
Power supply for Digital block
12
13
14
15
16
DVDD
CLK16M
FSEL1
CLK33M
CLK36M
GND for Digital block
16.9344MHz Clock output terminal
CLKA or CLK512FS pin output select : with pull-up
33.8688MHz Clock output terminal
36.8640MHz Clock output terminal
●Cautions on use (BU2362FV)
Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the
characteristics of ICs may not be fully demonstrated.)
Mount 0.1F capacitors in the vicinity of the IC PINs between 1PIN (VDD2) and 2PIN (VSS2), 5PIN (AVDD) and 6PIN
(AVSS), 11PIN (DVSS) and 12PIN (DVDD), respectively.
For the fine-tuning of frequencies, insert several numbers of pF in the 7PIN and 8PIN to GND.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power
supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2362FV from the
printed circuit board or to insert a capacitor (of 1Ω or less), which bypasses high frequency desired, between the
power supply and the GND terminal.
*Refer to the BU2362FV Example of application circuit for BU2288FV Example of application circuit.
Even though we believe that the example of recommended circuit is worth of a recommendation, please be sure to thoroughly
recheck the characteristics before use.
22/24
●Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as applied voltage (VDD or VIN), operating temperature range (Topr),
etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit.
If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take
physical safety measures including the use of fuses, etc.
(2) Recommended operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The
electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the
breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s
power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies
has the same level of potential, separate the power supply pattern for the digital block from that for the analog block,
thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to
the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal.
At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the
capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus
determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting
can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or
between the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the
jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In
addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention
to the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of
the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input
terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not
apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the
guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of
the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
23/24
●Product Designation
B
U
2
2
8
0
F
-
V
E
2
Type
Package Type
Package and forming specification
BU2280FV, BU2288FV, FV : SSOP-B24(BU2280FV)
E2: Reel-like emboss taping
BU2360FV, BU2362FV FV : SSOP-B16
(BU2288FV,BU2360FV,BU2362FV)
Part No.
SSOP-B16
<Dimension>
<Tape and Reel information>
Embossed carrier tape
Tape
9
1
8
0.3Min.
16
2500pcs
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15 ± 0.1
1234
Direction of feed
1pin
Reel
1234
1234
1234
1234
1234
0.1
0.22 ± 0.1
1234
0.65
Quantity
Direction
of feed
1234
1.15 ± 0.1 6.4 ± 0.3
0.1
4.4 ± 0.2
5.0 ± 0.2
※When you order , please order in times the amount of package quantity.
（Unit:mm)
SSOP-B24
<Dimension>
<Tape and Reel information>
Tape
7.8 ± 0.2
13
0.3Min.
7.6 ± 0.3
5.6 ± 0.2
24
2000pcs
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15 ± 0.1
1234
1234
1234
1pin
1234
（Unit:mm)
1234
Reel
1234
0.1
0.22 ± 0.1
1234
0.65
12
Quantity
Direction
of feed
1234
1.15 ± 0.1
0.1
1
Embossed carrier tape
Direction of feed
※When you order , please order in times the amount of package quantity.
Catalog No.08T808A '08.9 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear
no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
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Copyright © 2009 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
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Appendix-Rev4.0