RENESAS M61042FP

M61042FP
4-Battery Version, No Reset Pin
REJ03F0064-0100Z
Rev.1.0
Sep.19.2003
Description
The M61042FP is an semiconductor IC device developed for smart battery packs. It incorporates all the analog circuitry
required by smart batteries in a single chip. When used in conjunction with a microprocessor, it allows the
implementation of a variety of functions, such as battery capacity detection, through the addition of minimal peripheral
devices and is ideal for smart battery system (SBS) battery packs.
The M61042FP also has an on-chip overcurrent detect circuit so that the FET for controlling battery charging and
discharging is protected regardless of the processing speed of the microprocessor.
The microprocessor can change the amplifier gain of the charge/discharge current detect circuit, so battery capacity
detection accuracy is increased. In addition, the M61042FP incorporates a linear regulator that allows it to function as
the power supply for the microprocessor, thereby simplifying power supply block design.
Features
•
•
•
•
•
•
On-chip high-gain op-amp for monitoring charge and discharge current.
On-chip overcurrent detect circuit to protect FET.
Charge/discharge FET can be controlled from microprocessor.
Power-save function for reducing current consumption.
3.3 V operation to reduce microprocessor current consumption.
High-voltage device (absolute maximum rating: 33 V).
Application
Smart battery system (SBS) battery packs
Pin Connection Diagram (Top View)
1
16 VREG
VIN_1
2
15 DI
VIN_2
3
VIN_3
4
VIN_4
5
VIN_12
6
DFOUT
7
10 VIN_11
CFOUT
8
9
M61042FP
VCC
14 CK
13 CS
12 CIN
11 Analog_out
Package: 16P-TSSOP
Rev.1.0, Sep.19.2003, page 1 of 32
GND
M61042FP
Block Diagram
CFOUT
DFOUT
CIN
VIN_12
VCC
FET control
circuit
Series
regulator
VREG
Overcurrent
detect circuit
Delay
circuit
Regulator
On/off control
Power-down
circuit
VIN_1
Battery
voltage
detect
circuit
CK
DI
Serial/parallel
converter
circuit
CS
Charge/discharge current
detect circuit
VIN_3
Gain switcher circuit
Analog
_OUT
Output
selector
VIN_4
Battery 1-4
analog output
Shift
voltage
adjustor
VIN_11
Rev.1.0, Sep.19.2003, page 2 of 32
VIN_2
GND
M61042FP
Pin Function
Table 1
Pin No.
Symbol
Function
1
Vcc
The chip’s power supply pin. Power is supplied by the charger or the battery.
2
VIN_1
Positive input pin for lithium ion battery 1.
3
4
VIN_2
VIN_3
Negative input pin for lithium ion battery 1. Positive input pin for lithium ion battery 2.
Negative input pin for lithium ion battery 2. Positive input pin for lithium ion battery 3.
5
6
VIN_4
VIN_12
Negative input pin for lithium ion battery 3. Positive input pin for lithium ion battery 4.
Charger connect monitor pin. Detects changes from power-down status.
7
8
DFOUT
CFOUT
Output pin for discharge FET on/off signals. Also turns off when overcurrent detected.
Output pin for charge FET on/off signals.
9
GND
10
VIN_11
Ground pin. Negative input pin for lithium ion battery 4. Connected to charge/discharge
current sensor resistor.
Charge/discharge current monitor pin. Connected to charge/discharge current sensor
resistor.
11
12
Analog_OUT
CIN
Output pin for analog signals.
Capacity connection pin for setting overcurrent prevention delay time.
13
CS
14
CK
When this pin is low level, data input is accepted and data can be stored in a 6-bit shift
register. At the rising edge from low to high the value in the 6-bit shift register is
latched.
Shift clock input pin. At the rising edge to high the input signal from the DI pin is input to
the 6-bit shift register.
15
16
DI
Vreg
Shift data input pin. Serial data with a data length of 6 bits may be input via this pin.
Power supply pin for microprocessor. Power can be shut off using a signal from the
microprocessor.
Operation
The M61042FP is an semiconductor IC device developed for smart battery packs. It is ideal for smart battery system
(SBS) battery packs that consist of four lithium ion batteries connected in series. A high-voltage device, it is suitable
for use with a wide variety of charger systems.
It incorporates all the analog circuitry required by smart batteries in a single chip. When used in conjunction with a
microprocessor, it allows the implementation of a variety of functions, such as battery capacity detection, through the
addition of minimal peripheral devices. The functions of the M61042FP are described below.
1. Battery Voltage Detect Circuit
The M61042FP can output the voltage levels of the batteries connected in series via the Analog_out pin. An on-chip
buffer amplifier monitors the pin voltages of the batteries. Offset voltage correction using adjustment by the
microprocessor is also supported. The M61042FP is configured to detect the battery voltage using a microprocessor
driven using a power supply voltage of 3.3 V.
2. Charge/Discharge Current Detect Circuit
SBS requires a function for monitoring the battery capacity. The M61042FP uses an on-chip amplifier to monitor
battery capacity based on a drop in the voltage of an external sensor resistor. In this way, the charge/discharge current is
converted into a voltage.
The voltage amplification ratio can be adjusted from the microprocessor. In addition, the current output shift voltage
can be adjusted from the microprocessor, widening the allowable dynamic range of the A/D converter.
Rev.1.0, Sep.19.2003, page 3 of 32
M61042FP
3. Overcurrent Detect Circuit
The M61042FP has an on-chip overcurrent detect circuit. If an excessive current flows from the lithium ion batteries,
the discharge control FET is shut off after a set delay time, halting discharge. This makes the battery pack safer. The
delay time can be set using an external capacitor. It is possible to determine the overcurrent detect status by monitoring
the CIN pin. The overcurrent detect circuit provides protection regardless of the processing speed of the microprocessor.
4. Series Regulator
The M61042FP has an on-chip low-dropout series regulator. It can be used as the power supply for the microprocessor,
thereby simplifying power supply block design.
VCC
VREF1
M1
+
Vreg
ON/OFF
R1
R2
From serial/parallel converter circuit
Figure 3 Series Regulator
5. Power-Save Function
The M61042FP is equipped with a power-save function.
When the battery voltage is being monitored a portion of the charge/discharge current monitor circuit automatically
stops operating, and when the charge/discharge current is being monitored the battery voltage monitor circuit
automatically stops operating. This helps prevent unnecessary power consumption. In addition, current consumption is
further reduced by setting the analog output selector to ground potential output when in the standby mode.
Transition to Power-Down Mode
When the microprocessor determines that the battery voltage has dropped it sends a power-down instruction via the
interface circuit. When it receives the instruction, the M61042FP’s DFOUT pin switches to high voltage. In addition,
the VIN_12 pin is pulled down to low level by an internal resistor. When the VIN_12 pin goes to low potential after
reception of the power-down instruction, output from the series regulator stops, switching the M61042FP into powerdown mode.
At this point the operation of the circuitry is completely halted. In this status CFOUT is high level and DFOUT is high
level (external charge/discharge prohibited status). The maximum current consumption of the M61042FP is 1.0 µA in
order to prevent any further drop in the battery voltage.
Rev.1.0, Sep.19.2003, page 4 of 32
M61042FP
DFOUT
VIN_12
CFOUT
VCC
Control signals from
interface circuit
Ground level after
excess discharge
VIN_1
Series
regulator
Vreg
M61042FP
Regulator
On/off control
Internal reset
circuit
CK
DI
CS
Serial/parallel
converter circuit
Figure 4 Operation After Excess Discharge Detection
Cancellation of Power-Down Mode
If the battery pack is connected to a charger when the M61042FP is in the power-down mode (VIN_12 becomes high
level), the series regulator immediately begins to operate. The power-down mode is canceled, and once again the
M61042FP is ready to receive instructions from the microprocessor.
Absolute Maximum Ratings
Table 2
Item
Symbol
Rated Value
Unit
Absolute maximum rating
Vabs
33
V
Power supply voltage
Allowable loss
Vcc
PD
30
500
V
mW
Ambient operating temperature
Storage temperature
Topr
Tstg
-20 to +85
-40 to +125
°C
°C
Rev.1.0, Sep.19.2003, page 5 of 32
Conditions
M61042FP
Standard
CK
TSDI THDI
DI
TSCS
THCS
CS
Figure 5 Interface Block Timing Definitions
Rev.1.0, Sep.19.2003, page 6 of 32
M61042FP
Electrical Characteristics
Table 3
(Ta = 25°C, Vcc = 14 V unless otherwise specified)
Rated Value
Block
Item
Symbol
Min.
Typ.
Max.
Unit
Circuit
Command
All
Power supply
voltage
Vsup


30
V
1

Circuit current
1
Isup1
60
150
215
µA
1
1
During
charge/discharge
current monitoring
Circuit current
2
Isup2
55
140
200
µA
1
2
During battery
voltage monitoring
Circuit current
3
Isup3
25
80
115
µA
1
3
During ground
output (initial status)
Circuit current
(power-down
mode)
Ipd


0.5
µA
1
4
All circuits halted,
VIN_12 = GND
Output
voltage
Vreg
3.220
3.3
3.380
V
2

Vcc = 10.5V, Iout =
30mA
Input stability
∆Vout10

60
100
mV
2

Vcc = 6.0V to 24V,
Iout = 30mA
Load stability
∆Vout20

30
50
mV
2

Vcc = 6.0V, Iout =
0.1mA to 30mA
Input voltage
(VCC pin)
VIN0
6.0

30
V
2

Overcurrent
prevention
voltage 1
Vd1
0.18
0.2
0.22
V
3
5
Overcurrent
prevention
voltage 2
Vd2
Vcc/3×0.6
Vcc/3
Vcc/3×1.4
V
4
5
Load short detected
Overcurrent
prevention
delay time 1
Tvd1
7
10
15
ms
3
5
CICT = 0.01µF
Overcurrent
prevention
delay time 2
Tvd2
150
250
350
µs
4
5
Input offset
voltage 1
Voff1
31
206
385
mV
5
6
Voltage
amplification
ratio 1
Gamp1
0.594
0.600
0.606

5
7
Output source
current
capacity
Isource1
150


µA
6
8
Output sink
current
capacity
Isink1
150


µA
6
9
Maximum
detect battery
voltage
Vmo_max
4.64


V
5

Regulator
Overcurrent
detect
Battery
voltage
detect
Rev.1.0, Sep.19.2003, page 7 of 32
Conditions
(Vreg−Voff1)/Gamp
1
M61042FP
Rated Value
Block
Item
Symbol
Min.
Typ.
Max.
Unit
Circuit
Command
Conditions
Charge/disc
harge
current
detect
Input offset
voltage
Voff2
0.5
1.2
1.9
V
7
10*
Gain = 100
Voltage
amplification
ratio 21
Gain21
19.2
20
20.8
7
11*
Voltage
amplification
ratio 22
Gain22
38.4
40
41.6
7
12*
Voltage
amplification
ratio 23
Gain23
96
100
104
7
13*
Current output
shift voltage 1
Vios1
0.36
0.41
0.46
V
7
14*
Current output
shift voltage 2
Vios2
0.76
0.83
0.90
V
7
15*
Current output
shift voltage 3
Vios3
1.14
1.24
1.34
V
7
16*
Current output
shift voltage 4
Vios4
1.53
1.65
1.77
V
7
17*
Output source
current
capacity
Isource2
150


µA
8
18*
Output sink
current
capacity
Isink2
150


µA
8
18*
DI input H
voltage
VDIH
Vreg−0.5

Vreg
V
9

DI input L
voltage
VDIL
0

0.5
V
9

CS input H
voltage
VCSH
Vreg−0.5

Vreg
V
9

CS input L
voltage
VCSL
0

0.5
V
9

CK input H
voltage
VCKH
Vreg−0.5

Vreg
V
9

CK input L
voltage
VCKL
0

0.5
V
9

Interface
DI setup time
TSDI
600


ns
9

DI hold time
THDI
600


ns
9

CS setup time
TSCS
600


ns
9

CS hold time
THCS
600


ns
9

Refer to figures 1 to 9 for the circuits and to table 4 for the command sequences used for measurement.
* For the charge/discharge current detect block, different command sequences are used during charging and discharging.
Rev.1.0, Sep.19.2003, page 8 of 32
M61042FP
Measurement Circuit Diagrams
During Ipd measurement: S1 = off, S2 = on
All other times: S1 = on, S2 = off
CFOUT
DFOUT
VCC
VIN_12
VREG
VIN_2
DI
S2
4.7µF
CK
Data input
VREG ↔ VSS
CS
CIN
CIN
ANALOG
_OUT
VIN_11
0.01µF
VDI
GND
VCK
VIN_4
CREG
VCS
VIN_3
M61042FP
VIN_1
A
VCC
S1
VIN_4
GND
VIN_11
S3
CIN
CIN
ANALOG
_OUT
Circuit 2
Rev.1.0, Sep.19.2003, page 9 of 32
Data input
VREG ↔ VSS
CS
0.01µF
VDI
VCC
CK
VCK
VIN_3
DI
VCS
VIN_2
VREG
M61042FP
VIN_1
V
VM_reg
VIN_12
VS_reg
VCC
S2
DFOUT
CREG
CFOUT
S1
Circuit 1
M61042FP
CFOUT
DFOUT
VCC
CK
Data input
VREG ↔ VSS
CS
CIN
CIN
GND
ANALOG
_OUT
VIN_11
0.01µF
VDI
VIN_4
DI
VCK
VCC
4.7µF
VCS
VIN_3
CREG
VREG
M61042FP
VIN_1
VIN_2
V
VIN_12
VIN_11
Circuit 3
CFOUT
GND
VIN_11
DI
CK
CIN
CIN
ANALOG
_OUT
Circuit 4
Rev.1.0, Sep.19.2003, page 10 of 32
Data input
VREG ↔ VSS
CS
0.01µF
VDI
VIN_4
4.7µF
VCS
VCC
CREG
VREG
M61042FP
VIN_1
VIN_3
V
VIN_12
VCK
VCC
VIN_2
VIN_12
DFOUT
M61042FP
CFOUT
DFOUT
VCC
VIN_12
VIN_1
CREG
VREG
4.7µF
VBAT4
Data input
VREG ↔ VSS
CS
CIN
CIN
GND
ANALOG
_OUT
VIN_11
0.01µF
VDI
VIN_4
CK
VCK
VIN_3
VBAT3
DI
VCS
VIN_2
VBAT2
M61042FP
VBAT1
V
Circuit 5
CFOUT
DFOUT
VCC
VIN_12
VIN_1
CREG
VREG
4.7µF
VIN_2
VBAT2
VIN_3
VBAT3
VIN_4
M61042FP
VBAT1
DI
CK
Data input
VREG ↔ VSS
CS
VBAT4
Circuit 6
Rev.1.0, Sep.19.2003, page 11 of 32
VDI
ANALOG
_OUT
0.01µF
VCK
VIN_11
CIN
CIN
VCS
GND
A
M61042FP
CFOUT
DFOUT
VCC
VIN_12
VIN_4
CK
CIN
CIN
GND
VIN_11
Data input
VREG ↔ VSS
CS
ANALOG
_OUT
VIN_11
0.01µF
VDI
VCC
DI
VCK
VIN_3
4.7µF
VCS
VIN_2
CREG
VREG
M61042FP
VIN_1
V
Circuit 7
CFOUT
DFOUT
VIN_12
VCC
VIN_4
VIN_11
GND
VIN_11
DI
CK
CS
CIN
CIN
ANALOG
_OUT
Circuit 8
Rev.1.0, Sep.19.2003, page 12 of 32
Data input
VREG ↔ VSS
0.01µF
VDI
VIN_3
4.7µF
VCS
VIN_2
CREG
VREG
M61042FP
VIN_1
VCK
VCC
A
M61042FP
V
V
DFOUT
VIN_12
VIN_1
VIN_12
CREG
VREG
4.7µF
VIN_3
VBAT3
VIN_4
VBAT4
VIN_11
GND
VIN_11
DI
CK
CIN
CIN
ANALOG
_OUT
Circuit 9
Rev.1.0, Sep.19.2003, page 13 of 32
Data input
VREG ↔ VSS
CS
0.01µF
VCS
VIN_2
VBAT2
M61042FP
VBAT1
VDI
VCC
VCK
CFOUT
V
M61042FP
Table 4 Command Sequences Used for Measuring Rated Values
No
Command Sequence
VIN_11 Input
1
(00)8 → (24)8 →(31)8 →(43)8 →(52)8
90mV
2
(00)8 → (10)8 →(43)8 →(51)8
0mV
3
4
(00)8
(00)8 → (71)8
0mV
0mV
5
6
(00)8 → (43)8
(00)8 → (51)8 →(14)8 →(15)8 →(16)8→(17)8
0mV
0mV
7
8
(00)8 → (51)8 →(10)8 →(11)8 →(12)8→(13)8
(00)8 → (51)8 →(13)8
0mV
0mV
9
10
(00)8 → (51)8 →(17)8
(00)8 → (43)8 →(52)8 →(37)8
0mV
0mV
11
12
(00)8 → (43)8 →(52)8 →(31)8 →(35)8
(00)8 → (43)8 →(52)8 →(32)8 →(36)8
90mV
45mV
13
14
(00)8 → (43)8 →(52)8 →(33)8 →(37)8
(00)8 → (43)8 →(52)8 →(31)8 →(24)8
7mV
90mV
15
16
(00)8 → (43)8 →(52)8 →(31)8 →(25)8
(00)8 → (43)8 →(52)8 →(31)8 →(26)8
90mV
90mV
17
18
(00)8 → (43)8 →(52)8 →(31)8 →(27)8
(00)8 → (43)8 →(52)8 →(31)8
90mV
45mV
Notes : 1. Indications such as (00)8 show the address and data, in that order, of the serial data from the microprocessor
in octal notation.
2. Numbers 10 to 17 are command sequences used during charging. For the commands used during
discharging, substitute (53)8 for (52)8.
3. During measurement, the voltage listed in table 4 should be input to VIN_11. When measuring during
charging, the specified voltage should be input to VIN_11 as a negative voltage. The specified voltage should
be input to VIN_11 as a positive voltage during discharging.
Description of Circuit Blocks
(1) Battery Voltage Detect Circuit
As shown in figure 6, the battery voltage detect circuit block of the M61042FP consists of switches, a buffer amplifier,
a reference voltage circuit, and a logic circuit.
When the voltage to be detected is selected, based on serial data from the microprocessor, the appropriate switch
connections are determined by the logic circuit. The voltages Vbat1, Vbat2, Vbat3, and Vbat4 from the batteries
connected to the M61042FP, multiplied by Gamp1 (0.6), are output from the Analog_out pin. It is also possible to
output an offset voltage.
In the power-save mode all the switches are turned off, so the current consumption of this circuit block is zero.
Note : The settling time of this circuit block after voltage changes is about 50 µs.
Rev.1.0, Sep.19.2003, page 14 of 32
M61042FP
VIN_1
S11
Vbat1
VIN_2
Switch control
S22
From serial/parallel
converter circuit
Logic circuit
S21
Vbat2
VIN_3
Vbat3
S32
S31
M61042FP ; R2=0.6 × R1
R2
VIN_4
S42
R1
R1
Vbat4
To Analog_Out
S41
R2
GND
Voff
S02
GND
S01
Figure 6 Battery Voltage Detect Circuit
Battery Voltage Monitoring Method
To select battery voltage detection, serial data (51)8 is sent from reset status (00)8. The V1 battery voltage (Vin1) is
output from the analog output pin by sending (10)8. Next, (14)8 is sent to switch the analog output pin from the V1
battery voltage to the V1 offset voltage (Voff1). The actual voltage (Vbat1) can be obtained by the microprocessor by
calculating Vbat1 = (Vin1 – Voff1) / Gamp. The same method can be used for Vbat2 to Vbat4 in order to monitor the
battery voltage with a high degree of accuracy.
(2) Charge/Discharge Current Detect Block
As shown in figure 7, the charge/discharge current detect block of the M61042FP consists of a preamplifier current
output shift voltage adjustment circuit, a buffer amplifier, and dividing resistors.
The voltage difference indicated by the sensor resistor is amplified to the ground reference voltage by the preamplifier.
The gain can be switched using serial signals from the microprocessor. The output is impedance converted by the
buffer amplifier.
It is also possible to switch the current detect shift voltage using the microprocessor.
Rev.1.0, Sep.19.2003, page 15 of 32
M61042FP
From serial/parallel
converter circuit
Vreg = 3.3V
AMP2
Charge current monitor
R
AMP3
RC3
To Analog_Out
RC1
R
RC2
R
Charge current
monitor
RD1
R
RD2
RD3
AMP1
AMP4
From serial/parallel converter circuit
Shift voltage
adjustment circuit
VIN_11
GND
GND
Rsense
Figure 7 Charge/Discharge Current Detect Block
Figure 8 illustrates the circuit block’s operation during discharge current detection. The discharge current flows into
Rsense, and any voltage drop that occurs is applied to the positive terminal of the amplifier (AMP1). The amplifier’s
gain can be increased by an instruction from the microprocessor, making it possible to monitor even minute discharge
currents with high accuracy.
To allow monitoring of the charge current, the voltage generated by VIN_11 is inverted and amplified before being
output. The other aspects use the same operating principle as that described above.
From interface
circuit
Vb=Icha × Rsens × Gain
AMP2
RC3
RC1
RC2
RD1
AMP1
RD2
RD3
GND
Va=Idis × Rsens × Gain
VIN_11
Charge current I c h a
Rsense
Discharge current I d i s
Figure 8 Charge/Discharge Current Detect Explanation Diagram
Charge Current Monitoring Method
Rev.1.0, Sep.19.2003, page 16 of 32
M61042FP
Serial data (43)8 is sent from reset status to turn on the discharge control FET. When the charger is connected in this
status a current flows between the VIN_11 pin and the GND pin (across the RSENSE sensor transistor), causing the
voltage Vin1 to be generated. Sending (52)8 switches the output of the analog output pin to charge current output. At
this point the amplifier used for monitoring the charge current is still off, so the analog output pin outputs ground
potential. Next, a value between (35)8 and (37)8 is selected to switch the amplifier’s amplification ratio. In this way the
amplification ratio of the amplifier used for monitoring the charge current is switched to GainC. At this point the
voltage of the analog output pin is the offset voltage of the charge current monitor amplifier (VoffC).
If the offset voltage VoffC is higher than the value listed in table 5, the shift voltage select command between (24)8 and
(27)8 that corresponds to VoffC is sent and once again the offset voltage is measured, this time as VoffC_S. Next, a
value between (31)8 and (33)8 is selected to switch the current monitor amplifier’s amplification ratio. At this point the
voltage of the analog output pin is VaoutC. It is possible to calculate the charge current based on the analog output pin
voltages resulting from the above settings. When calculating the current value, VoffC_S offset and VaoutC current
monitor values measured using the same amplification ratio should be used. Table 6 is a list of the measurable current
values.
Icha (charge current) = Vin1 ÷ RSENSE (sensor resistor value) … (1)
VaoutC – VoffC_S = Vin1 × GainC … (2)
Based on (1) and (2) it is possible to calculate the charge current.
Icha (charge current) = (VaoutC – VoffC_S) ÷ GainC ÷ RSENSE
Discharge Current Monitoring Method
Serial data (43)8 is sent from reset status to turn on the discharge control FET. When a load is connected in this status a
current flows between the VIN_11 pin and the GND pin (across the RSENSE sensor transistor), causing the voltage
Vin1 to be generated. Sending (53)8 switches the output of the analog output pin to discharge current output. At this
point the amplifier used for monitoring the discharge current is still off, so the analog output pin outputs ground
potential. Next, a value between (35)8 and (37)8 is selected to switch the amplifier’s amplification ratio. In this way the
amplification ratio of the amplifier used for monitoring the discharge current is switched to GainD. At this point the
voltage of the analog output pin is the offset voltage of the discharge current monitor amplifier (VoffD).
If the offset voltage VoffD is higher than the value listed in table 5, the shift voltage select command between (24)8 and
(27)8 that corresponds to VoffD is sent and once again the offset voltage is measured, this time as VoffD_S. Next, a
value between (31)8 and (33)8 is selected to switch the current monitor amplifier’s amplification ratio. At this point the
voltage of the analog output pin is VaoutD. It is possible to calculate the discharge current based on the analog output
pin voltages resulting from the above settings. When calculating the current value, VoffD_S offset and VaoutD current
monitor values measured using the same amplification ratio should be used. Table 6 is a list of the measurable current
values.
Idis (discharge current) = Vin1 ÷ RSENSE (sensor resistor value) … (1)
VaoutD – VoffD_S = Vin1 × GainD … (2)
Based on (1) and (2) it is possible to calculate the discharge current.
Idis (discharge current) = (VaoutD – VoffD_S) ÷ GainD ÷ RSENSE
Discharge Current Measurable Range
The range of discharge current values that can be measured is determined by the sensor resistor value, the Vreg voltage,
and the amplification ratio of the current monitor amplifier. Refer to table 6 for details. The current value is
proportional to the sensor resistor value, so if the sensor resistor value changes it is possible to determine the new
measurable range of current values by multiplying the sensor resistor value by the current coefficient value listed in
table 6.
Rev.1.0, Sep.19.2003, page 17 of 32
M61042FP
Table 5 Shift Voltage Switching Offset Voltage
Vreg Voltage
Measurement Offset Value
Shift Setting Voltage
Select Command
3.3V
0.55V or higher
−0.4V
(24)8
3.3V
1.00V or higher
−0.8V
(25)8
3.3V
3.3V
1.45V or higher
1.90V or higher
−1.2V
−1.6V
(26)8
(27)8
Table 6 Measurable Current Values
Maximum Measurable Current Value
Vreg Voltage
Current Monitor Amplifier
Amplification Ratio
20 mΩ
Ω Sensor Resistor∗
∗
Current
2
Coefficient∗
∗
Minimum Resolution
(10bit A/D)
3.3V
20×
6.6A (Vcc = 7.0V)
0.131
7.3mA
3.3V
3.3V
40×
100×
3.3A (Vcc = 7.0V)
1.3A (Vcc = 7.0V)
0.065
0.027
3.6mA
1.5mA
Note
1
∗
1 The maximum measurable current value is dependent on the Vcc voltage. If the Vcc voltage drops the
maximum measurable current value also drops.
∗
2 If the sensor resistor value changes the current coefficient becomes the maximum measurable current value
divided by the new sensor resistor value.
Example: If the sensor resistor value = 15 mΩ, Vreg = 3.3 V, and the amplification ratio is 20× …
Maximum measurable current value = 0.131(current coefficient) ÷ 0.015 [Ω] = 8.73 [A]
(sensor resistor value)
(3) Overcurrent Detect Circuit Block
As shown in figure 9, the overcurrent detect circuit block of the M61042FP consists of a comparator, a reference
voltage circuit, and a delay circuit.
The detection voltage can be adjusted by trimming, making possible highly accurate voltage detection in conjunction
with a sensor resistor. In addition, it is possible to determine when the M61042FP is in overcurrent detect status by
monitoring the CIN pin using the microprocessor.
The M61042FP is also equipped with a simplified load detect circuit. Based on the status of the Vin12 pin it is possible
to provide protection with a shorter delay time than when using overcurrent detection.
Rev.1.0, Sep.19.2003, page 18 of 32
M61042FP
DFOUT
VIN_12
-
Delay circuit
To microprocessor
Battery
+
Vref1
CIN
VIN_11
GND
Rsense
Figure 9 Overcurrent Detect Circuit Block
(4) Series Regulator
The series regulator circuit is shown in figure 10. A Pch MOS transistor is used as the output control transistor. The
output voltage is adjusted by the M61042FP internally, so no external devices, such as resistors, are required.
Note : Due to the structure of the control transistor a parasite diode is formed between VCC and Vreg. This means that
the M61042FP can be destroyed by reverse current if the Vreg potential exceeds VCC. Consequently, Vreg
should be limited to VCC + 0.3 V or less.
VCC
VREF1
M1
+
Vreg
ON/OFF
R1
R2
From serial/parallel converter circuit
Figure 10 Series Regulator
Rev.1.0, Sep.19.2003, page 19 of 32
M61042FP
Digital Data Format
MSB
First
Last
DI
LSB
6-bit shift register
CK
D5
CS
D4
Address
D3
D2
D1
D0
decoder
Latch
Latch
Latch
Latch
Latch
MPX
MPX
MPX
Output
selector
VR,
overcurrent
controller
MPX
MPX
MPX
Battery
voltage
adjuster
Shift
voltage
adjuster
Current
gain
adjuster
FET
controller
Latch
Figure 11 Serial/Parallel Converter Circuit Block Diagram
Data Timing Diagram (Model)
LSB
MSB
D0
DI
D1
D2
D3
D4
D5
CK
CS
Figure 12 Serial/Parallel Converter Circuit Timing Chart
Data Content
Table 7
Address
Data
Setting Data
D5
D4
D3
D2
D1
D0
Reset
0
0
0



Battery voltage selector
Current output shift voltage adjuster
0
0
0
1
1
0






See table 8
See table 9
Current monitor gain adjuster
FET controller
0
1
1
0
1
0






See table 10
See table 11
Output selector
Regulator
Overcurrent detection controller
1
1
0
1
1
1






See table 12
See table 13
Rev.1.0, Sep.19.2003, page 20 of 32
Content
M61042FP
Data Content
Table 8 Battery Voltage Selector
D5 to D3
D2
D1
D0
Output Voltage
Note
001
0
0
0
V1 voltage
Selected after reset
001
0
0
1
V2 voltage
001
001
0
0
1
1
0
1
V3 voltage
V4 voltage
001
001
1
1
0
0
0
1
V1 offset voltage
V2 offset voltage
001
001
1
1
1
1
0
1
V3 offset voltage
V4 offset voltage
Note : V1 voltage is selected after reset.
Table 9 Current Output Shift Voltage Adjuster
D5 to D3
D2
D1
D0
Current Output Shift Voltage Value
Note
010
010
0
0
0
0
0
1
0 V (no shift voltage)
0 V (no shift voltage)
Selected after reset
010
010
0
0
1
1
0
1
0 V (no shift voltage)
0 V (no shift voltage)
010
010
1
1
0
0
0
1
0.4V
0.8V
Vreg/8×1
Vreg/8×2
010
010
1
1
1
1
0
1
1.2V
1.6V
Vreg/8×3
Vreg/8×4
Note : No current output shift voltage after reset.
Table 10 Charge/Discharge Current Detector
D5 to D3
D2
D1
D0
Output Gain Switch
Note
011
011
0
0
0
0
0
1
Amplifier off
20× (current value output)
Selected after reset
011
011
0
0
1
1
0
1
40× (current value output)
100× (current value output)
011
011
1
1
0
0
0
1
Amplifier off
20× (offset output)
011
011
1
1
1
1
0
1
40× (offset output)
100× (offset output)
Same as after reset
Note : Amplifier off after reset.
Table 11 FET Controller
D5 to D3
D2
D1
D0
CFOUT
DFOUT
Note
100
0
0
0
High
High
Selected after reset
100
100
0
0
0
1
1
0
Low
High
High
Low
100
100
0
1
1
0
1
0
Low
Don’t care
Low
Don’t care
100
100
1
1
0
1
1
0
Don’t care
Don’t care
Don’t care
Don’t care
100
1
1
1
Don’t care
Don’t care
Note : DFOUT and CFOUT pins set to off after reset. (Current control FET is off when output is high level.)
Rev.1.0, Sep.19.2003, page 21 of 32
M61042FP
Table 12 Output Selector
D5 to D3
D2
D1
D0
Output Selection
Note
Selected after reset
101
0
0
0
Ground output
101
0
0
1
Battery voltage value output
101
101
0
0
1
1
0
1
Charge current value output
Discharge current value output
101
101
1
1
0
0
0
1
Don’t care
Don’t care
101
101
1
1
1
1
0
1
Don’t care
Don’t care
Note : Ground potential output after reset.
Table 13 Regulator, Overcurrent Detection Controller
D5 to D3
D2
D1
D0
Voltage Regulator Output
Overcurrent Detect Circuit
Note
111
111
0
0
0
0
0
1
ON
OFF
ON
OFF
Selected after reset
Both circuits off
111
111
0
0
1
1
0
1
ON
ON
CIN pin fixed low
CIN pin fixed high
Overcurrent circuit off
Overcurrent circuit off
111
111
1
1
0
0
0
1
Don’t care
Don’t care
Don’t care
Don’t care
111
111
1
1
1
1
0
1
Don’t care
Don’t care
Don’t care
Don’t care
Note : Regulator output and overcurrent circuit both on after reset.
Note: A setting of 111001 caused the M61042FP to transition to the power-down mode. However, transition to the
power-down mode does not occur when connected to a charger (VIN_12 is high level).
Rev.1.0, Sep.19.2003, page 22 of 32
M61042FP
Timing Charts
Battery voltage (V)
Charging Sequence
5
Vbat4 reaches overcharge
detect voltage
4
3
From bottom: Vbat1, Vbat2, Vbat3, Vbat4
2
1
Charging time
0
VIN_11 (V)
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
During discharge
During charging
CFOUT (V)
20
Instruction from
microprocessor
15
10
5
Off during
initialization
Start of charging
End of charging
Instruction from microprocessor
0
DFOUT (V)
20
15
10
5
Off during
initialization
Start of charging
Instruction from microprocessor
Analog_out (V)
Vreg (V)
Battery voltage (V)
0
20
VIN_12 pin
15
VCC pin
10
VIN_1 pin
5
0
5
4
3
2
1
0
5
4
3
2
1
0
Charger connected
Vreg
Gain 100
Charger connected
Microprocessor
operation start
Battery 4
Battery 3 monitor
Battery 2
monitor
Battery 1 monitor
monitor
Gain 20
Charge current monitor Battery voltage monitor
Note: A fixed-voltage charger is used.
Figure 14 Charging Sequence
Rev.1.0, Sep.19.2003, page 23 of 32
M61042FP
VIN_11 (V)
Battery voltage (V)
Discharge Sequence
5
4
Self-discharge time
Discharge time
3
2
1
From top: Vbat1, Vbat2, Vbat3, Vbat4
Vbat4 reaches excess
discharge detect voltage
0
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
During
discharge
During
charging
Start of discharge
Load connection
End of discharge
CFOUT (V)
20
15
Instruction from microprocessor
10
Off in
power-down
mode
5
0
DFOUT (V)
20
15
End of discharge
10
Instruction from
microprocessor
5
Battery voltage (V)
0
20
15
VIN_1 pin
10
VIN_12 pin
Pulled down to ground potential
when discharge prohibited
5
VCC pin
0
5
Vreg (V)
4
3
2
System stop
1
Instruction from microprocessor
0
Analog_out (V)
Off in
power-down
mode
5
4
Gain 100
Battery 1
monitor
3
2
1
0
Gain 20
Discharge current monitor
Battery 2
monitor
Battery 3
monitor
Battery 4
monitor
Battery voltage monitor
Figure 15 Discharge Sequence
Rev.1.0, Sep.19.2003, page 24 of 32
M61042FP
Overcurrent Sequence
Battery voltage (V)
5
4
Vbat1=Vbat2=Vbat3=Vbat4
3
2
1
0
Rush current
Load short
Overcurrent
VIN_11 (V)
0.8
0.6
0.4
During
discharge
Rush current
Overcurrent
Load short
0.2
0
-0.2
CFOUT (V)
20
15
10
5
0
DFOUT (V)
20
End of discharge
End of discharge
15
10
5
Battery voltage (V)
0
20
VIN_12 pin
15
VCC pin
10
5
VIN_1 pin
0
5
Vreg (V)
4
3
2
1
Analog_out (V)
0
5
4
3
2
1
0
Discharge current
Gain 20
monitor
Figure 16 Overcurrent Sequence
Rev.1.0, Sep.19.2003, page 25 of 32
M61042FP
Principal Item Characteristics
Overall
Current Consumption (ISUP1)-Power Supply Voltage (VCC) Characteristics
Temp.=25˚C
Current Consumption (ISUP1)-Temperature (Ta) Characteristics
Vcc=10.5V
200µA
200µA
180µA
180µA
160µA
160µA
140µA
140µA
120µA
120µA
100µA
5V
10V
15V
20V
25V
30V
Current Consumption (ISUP2)-Power Supply Voltage (VCC) Characteristics
Temp.=25˚C
200µA
100µA
-50˚C
180µA
160µA
160µA
140µA
140µA
120µA
120µA
5V
10V
15V
20V
25V
30V
Current Consumption (IPS)-Power Supply Voltage (VCC) Characteristics
Temp.=25˚C
100µA
-50˚C
100µA
100µA
80µA
80µA
60µA
60µA
10V
15V
20V
25V
30V
Current Consumption (IPD)-Power Supply Voltage (VCC) Characteristics
Temp.=25˚C
40µA
-50˚C
0.04µA
0.04µA
0.03µA
0.03µA
0.02µA
0.02µA
0.01µA
0.01µA
10V
15V
20V
Rev.1.0, Sep.19.2003, page 26 of 32
25V
30V
100˚C
Vcc=10.5V
-25˚C
0˚C
25˚C
50˚C
75˚C
100˚C
-25˚C
0˚C
25˚C
50˚C
75˚C
100˚C
Vcc=10.5V
0.05µA
5V
75˚C
Current Consumption (IPD)-Temperature (Ta) Characteristics
0.05µA
0.00µA
50˚C
Vcc=10.5V
120µA
5V
25˚C
Current Consumption (IPS)-Temperature (Ta) Characteristics
120µA
40µA
0˚C
200µA
180µA
100µA
-25˚C
Current Consumption (ISUP3)-Temperature (Ta) Characteristics
0.00µA
-50˚C
-25˚C
0˚C
25˚C
50˚C
75˚C
100˚C
M61042FP
Regulator Block
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics
Temp.=100˚C
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
Vcc=30V
3.40
3.40
3.35
3.35
3.30
3.30
30mA
20mA
10mA
0.1mA
3.25
3.20
5V
10V
15V
20V
25V
30V
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics
Temp.=25˚C
3.20
-50˚C
3.35
3.35
3.30
3.30
3.20
5V
10V
15V
20V
25V
30V
Regulator Output Voltage (VREG)-Power Supply Voltage (VCC) Characteristics
Temp.=-25˚C
3.20
-50˚C
3.35
3.30
3.30
10V
15V
20V
25V
30V
Regulator Output Voltage (VREG)-Output Current (IREG) Characteristics
Temp.=25˚C
3.5V
3.20
-50˚C
2.5V
2.5V
2.0V
2.0V
1.5V
1.5V
0.0V
0.00A
-25˚C
0˚C
25˚C
50˚C
75˚C
100˚C
30mA
20mA
10mA
0.1mA
-25˚C
0˚C
25˚C
50˚C
75˚C
100˚C
Regulator Output Voltage (VREG)-Output Current (IREG) Characteristics
Vcc=14V
3.5V
3.0V
0.5V
100˚C
30mA
20mA
10mA
0.1mA
3.25
3.0V
1.0V
75˚C
Vcc=6V
3.35
3.20
5V
50˚C
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
3.40
30mA
20mA
10mA
0.1mA
25˚C
3.25
3.40
3.25
0˚C
Vcc=14V
3.40
30mA
20mA
10mA
0.1mA
-25˚C
Regulator Output Voltage (VREG)-Temperature (Ta) Characteristics
3.40
3.25
30mA
20mA
10mA
0.1mA
3.25
1.0V
6V
14V
30V
0.05A
0.5V
0.10A
0.15A
Rev.1.0, Sep.19.2003, page 27 of 32
0.20A
0.25A
0.0V
0.00A
90˚C
25˚C
-30˚C
0.05A
0.10A
0.15A
0.20A
0.25A
M61042FP
Overcurrent Detect Block
Overcurrent 1 Detect Voltage (VIOV1)-Temperature (Ta) Characteristics
Overcurrent 1 Detect Delay Time (TIOV1)-Temperature (Ta) Characteristics
Vcc=10.5V
Vcc=10.5V
0.22V
15mS
0.21V
13mS
0.20V
11mS
0.19V
9mS
0.18V
-30˚C
0˚C
30˚C
60˚C
90˚C
Overcurrent 2 Detect Voltage (VCC/VIOV2)-Temperature (Ta) Characteristics
Vcc=10.5V
4.2
7mS
-30˚C
0˚C
30˚C
60˚C
90˚C
Overcurrent 2 Detect Delay Time (TIOV2)-Temperature (Ta) Characteristics
Vcc=10.5V
350µS
3.8
300µS
3.4
3.0
250µS
2.6
200µS
2.2
1.8
-30˚C
0˚C
30˚C
60˚C
90˚C
Overcurrent Hold Detect Voltage (VCC-VIOVX)-Temperature (Ta) Characteristics
150µS
-30˚C
0˚C
30˚C
60˚C
Overcurrent 1 Detect Delay Time (TIOV1)-Capacitance (CICT) Characteristics
Vcc=10.5V
3.0V
90˚C
Vcc=10.5V
500mS
450mS
2.8V
400mS
350mS
2.6V
300mS
250mS
2.4V
200mS
150mS
2.2V
100mS
50mS
2.0V
-30˚C
0˚C
30˚C
Rev.1.0, Sep.19.2003, page 28 of 32
60˚C
90˚C
0mS
0.0µF
0.1µF
0.2µF
0.3µF
0.4µF
0.5µF
M61042FP
Battery Voltage Detect Block
Battery Voltage Input Offset Voltage (VOFF1)-Temperature (Ta) Characteristics
VREG=3.3V
0.40V
Battery Voltage Amplification Ratio 1 (Gamp1)-Temperature (Ta) Characteristics
VREG=3.3V
1.00%
0.75%
0.35V
0.50%
0.30V
0.25%
0.25V
0.00%
-0.25%
0.20V
V1_offset
V2_offset
V3_offset
V4_offset
0.15V
0.10V
-30˚C
0˚C
30˚C
60˚C
90˚C
V1_Gain_err
V2_Gain_err
V3_Gain_err
V4_Gain_err
-0.50%
-0.75%
-1.00%
-30˚C
0˚C
30˚C
60˚C
90˚C
Battery Voltage Detect Block
Battery Voltage Input Offset Voltage (VOFF2)-Temperature (Ta) Characteristics
Discharge Current Input Offset Voltage (VOFF2)-Temperature (Ta) Characteristics
VREG=3.3V
VREG=3.3V
18mV
18mV
16mV
16mV
14mV
14mV
12mV
12mV
10mV
10mV
Offset20
Offset40
Offset100
8mV
6mV
-30˚C
0˚C
30˚C
60˚C
90˚C
Battery Voltage Amplification Ratio (Gamp2)-Temperature (Ta) Characteristics
VREG=3.3V
6mV
-30˚C
4%
3%
3%
2%
2%
1%
1%
0%
0%
30˚C
60˚C
90˚C
-1%
-2%
Gain_err20
Gain_err40
Gain_err100
-3%
-4%
-30˚C
0˚C
Discharge Current Amplification Ratio (Gamp2)-Temperature (Ta) Characteristics
VREG=3.3V
4%
-1%
Offset20
Offset40
Offset100
8mV
0˚C
30˚C
Rev.1.0, Sep.19.2003, page 29 of 32
60˚C
90˚C
-2%
Gain_err20
Gain_err40
Gain_err100
-3%
-4%
-30˚C
0˚C
30˚C
60˚C
90˚C
M61042FP
Sample Application Circuit
CVCC
DFET
To + terminal
RIN12
VDD
VCC
See note 3.
RCF
CCF
CIN12
VIN_12 DFOUT
CFET
CFOUT
VREG
VIN_1
CREG
Battery 1
VIN_1
VIN_2
Reset
M37516
See note 2.
ANALOG_OUT
AD_IN1
CK
CK
CIN2
RIN3
Battery 2
VIN_2
VIN_3
CIN3
RIN4
2n d Protect
VDET
M61042FP
VIN
Voltage
detector
VOUT
OUT
SENCE
CIN1
RIN2
VREF
Vcc
RIN1
Battery 3
VIN_3
VIN_4
CIN4
Battery 4
CS
CS
DI
DI
AD_IN2
DGNDAGND
VIN_4
CIN
VIN_11
CIN11
RIN11
VSS
CIN_1
See note 1.
CICT
To - terminal
RSENSE
Figure 17 Sample Application Circuit
Notes on Circuit Board Design
1. The current sensor resistor (RSENSE) should be located adjacent to the VSS and VIN_11 pins of the M61042FP. In
addition, no circuitry other than that recommended above should be added between the M61042FP and RSENSE.
Any extraneous current flow in this channel could result in errors when measuring the charge and discharge currents.
2. The load capacitance of the ANALOG_OUT pin, including parasite capacitance, should be no more than 10 pF. If a
capacitor of more than 10 pF is connected, the output from ANALOG_OUT may begin to oscillate.
3. Power supply fluctuations during overcurrent detection and when connected to a charger may cause the M61042FP
to reset. It is possible to prevent incorrect operation by connecting a CR filter to the control signal of the charge
control FET.
Rev.1.0, Sep.19.2003, page 30 of 32
M61042FP
Table 14 External Device Constants
Device
Symbol
Purpose
Recommen
ded Value
Min.
Max.
Notes
Pch MOSFET
DFET
Discharge control




Pch MOSFET
CFET
Charge control




1) Values differ among RIN2 to RIN4.
Resistor
RIN1
ESD countermeasure
10Ω

1kΩ
Capacitor
CIN1
Power supply
fluctuation
countermeasure
0.22µF

1.0µF
Resistor
RIN2
ESD countermeasure
1kΩ

1MΩ
Capacitor
CIN2
Power supply
fluctuation
countermeasure
0.22µF

1.0µF
Resistor
RIN3
ESD countermeasure
1kΩ

1MΩ
Capacitor
CIN3
Power supply
fluctuation
countermeasure
0.22µF

1.0µF

2) RIN2 and CIN2 should be set to the
same value.
Resistor
RIN4
ESD countermeasure
1kΩ

1MΩ
Capacitor
CIN4
Power supply
fluctuation
countermeasure
0.22µF

1.0µF
Resistor
RIN11
Power supply
fluctuation
countermeasure
100Ω

200Ω
Capacitor
CIN11
Power supply
fluctuation
countermeasure
0.1µF

1.0µF
Resistor
RIN12
Charger reverse
connection
countermeasure
10kΩ
300Ω
100kΩ
Capacitor
CIN12
Power supply
fluctuation
countermeasure
0.01µF

0.1µF
Capacitor
CVCC
Power supply
fluctuation
countermeasure
0.22µF



Sensor
resistor
RSENSE
Charge/discharge
current monitoring
20mΩ



Capacitor
CICT
Delay time setting
0.01µF

0.47µF

Capacitor
CREG
Output voltage
fluctuation
countermeasure
4.7µF
0.47µF


Resistor
RCF
Power supply
fluctuation
countermeasure
1kΩ
500Ω

3) The upper value for confirmation of
overcurrent operation should be adjusted
as necessary.
Capacitor
CCF
Power supply
fluctuation
countermeasure
0.1µF
0.047µF

Note: When designing applications, due consideration should be given to safety.
Rev.1.0, Sep.19.2003, page 31 of 32
2) RIN2 and CIN2 should be set to the
same value.
3) The upper value for confirmation of
overcurrent operation should be adjusted
as necessary.
3) The upper value for confirmation of
overcurrent operation should be adjusted
as necessary.
M61042FP
Package Dimensions
16P2X
Note : Please contact Renesas Technology Corporation for further details.
Rev.1.0, Sep.19.2003, page 32 of 32
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