MIC2101,02

MIC2101/02
38V, Synchronous Buck Controllers
Featuring Adaptive On-Time Control
Hyper Speed Control¥
¥ Family
General Description
The
Micrel
MIC2101/02
are
constant-frequency,
synchronous buck controllers featuring a unique adaptive
ON-time control architecture. The MIC2101/02 operates
over an input supply range from 4.5V to 38V and can be
used to supply up to 15A of output current. The output
voltage is adjustable down to 0.8V with a guaranteed
accuracy of ±1%. The device operates with programmable
switching frequency from 200kHz to 600kHz.
Micrel’s Hyper Light Load™ architecture provides the same
high-efficiency and ultra-fast transient response as the Hyper
Speed Control architecture under the medium to heavy loads,
but also maintains high efficiency under light load conditions
by transitioning to variable frequency, discontinuous-mode
operation.
The MIC2101/02 offers a full suite of protection features to
ensure protection of the IC during fault conditions. These
include under-voltage lockout to ensure proper operation
under power-sag conditions, internal soft-start to reduce
inrush current, fold-back current limit, “hiccup” mode shortcircuit protection and thermal shutdown.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Features
x Hyper Speed Control architecture enables:
High Delta V operation (VIN = 38V and VOUT = 1.2V)
Any Capacitor¥ stable
x 4.5V to 38V input voltage
x Adjustable output voltage from 0.8 V to 24V (also limited
by duty cycle)
x 200kHz to 600kHz, programmable switching frequency
x Hyper Light Load Control (MIC2101)
x Hyper Speed Control (MIC2102)
x Enable input and Power Good output
x Built-in 5V regulator for single-supply operation
x Programmable current limit and fold-back “hiccup” mode
short-circuit protection
x 5ms internal soft-start, internal compensation, and
thermal shutdown
x Supports safe start-up into a pre-biased output
x –40qC to +125qC junction temperature range
x Available in 16-pin 3mm x 3mm QFN package
Applications
x Distributed power systems
x Networking/telecom Infrastructure
x Printers, scanners, graphic cards, and video cards
Typical Application
MIC2101 Efficiency (VIN = 12V)
vs. Output Current (MIC2101)
100
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
90
EFFICIENCY (%)
80
70
60
50
40
30
fSW = 600kHz (CCM)
20
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MIC2101/02 Wide Input, Hyper Light Load Buck Converter
OUTPUT CURRENT (A)
Hyper Speed Control, Hyper Light Load, and Any Capacitor are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
November 13, 2013
Revision 2.0
Micrel, Inc.
MIC2101/02
Ordering Information
Part Number
Switching
Frequency
Features
Package
Junction
Temperature
Range
Lead Finish
MIC2101YML
200kHz to 600kHz
Hyper Light Load
16-Pin 3mm x 3mm QFN
–40°C to +125°C
Pb-Free
MIC2102YML
200kHz to 600kHz
Hyper Speed Control
16-Pin 3mm x 3mm QFN
–40°C to +125°C
Pb-Free
Pin Configuration
16-Pin 3mm x 3mm QFN (ML)
(Top View)
Pin Description
Pin Number
Pin Name
1
VDD
2
PVDD
5V supply input for the low-side N-channel MOSFET driver, which can be tied to VDD externally.
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3
ILIM
Current Limit Setting. Connect a resistor from SW to ILIM to set the over-current threshold for the
converter.
4
DL
Pin Function
Internal +5V Linear Regulator 2XWSXW9''LVWKHLQWHUQDOVXSSO\EXVIRUWKHGHYLFH$ȝ)
ceramic capacitor from VDD to AGND is required for decoupling. In the applications with VIN <
+5.5V, VDD should be tied to VIN to by-pass the linear regulator.
Low-Side Drive output. High-current driver output for external low-side MOSFET of a buck
converter. The DL driving voltage swings from ground to VDD. Adding a small resistor between
DL pin and the gate of the low-side N-channel MOSFET can slow down the turn-on and turn-off
speed of the MOSFET.
5
PGND
Power Ground. PGND is the return path for the buck converter power stage. The PGND pin
connects to the sources of low-side N-Channel external MOSFET, the negative terminals of input
capacitors, and the negative terminals of output capacitors. The return path for the power ground
should be as small as possible and separate from the signal ground (AGND) return path.
6
FREQ
Switching Frequency Adjust input. Tie this pin to VIN to operate at 600kHz and place a resistor
divider to reduce the frequency.
November 13, 2013
2
Revision 2.0
Micrel, Inc.
MIC2101/02
Pin Configuration (Continued)
Pin Number
Pin Name
Pin Function
DH
High-Side Drive Output. High-current driver output for external high-side MOSFET of a buck
converter. The DH driving voltage is floating on the switch node voltage (VSW). Adding a small
resistor between DH pin and the gate of the high-side N-channel MOSFET can slow down the
turn-on and turn-off speed of the MOSFET.
8
SW
Switch Node and Current-Sense input. High current output driver return. The SW pin connects
directly to the switch node. Due to the high-speed switching on this pin, the SW pin should be
routed away from sensitive nodes. The SW pin also senses the current by monitoring the voltage
across the low-side MOSFET during OFF time. In order to sense the current accurately, connect
the low-side MOSFET drain to the SW pin using a Kelvin connection.
9, 11
NC
No Connection.
10
BST
Voltage supply input for the high-side N-channel MOSFET driver, which can be powered by a
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ceramic capacitor. Adding a small resistor at BST pin can slow down the turn-on speed of the
high-side MOSFET.
12
AGND
13
FB
Feedback Input. Input to the transconductance amplifier of the control loop. The FB pin is
regulated to 0.8V. A resistor divider connecting the feedback to the output is used to set the
desired output voltage.
14
PG
Power Good Output. Open drain output, an external pull-up resistor to VDD or external power
rails is required.
15
EN
Enable Input. A logic signal to enable or disable the buck converter operation. The EN pin is
CMOS compatible. Logic high enables the device, logic low shutdowns the regulator. In the
disable mode, the VDD supply current for the device is minimized to 0.7mA typically. Don not pull
EN pin to VDD/PVDD.
16
VIN
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from VIN to AGND is required for decoupling.
EP
ePad
7
November 13, 2013
Signal ground for VDD and the control circuitry, which is connected to thermal pad electronically.
The signal ground return path should be separate from the power ground (PGND) return path.
Exposed Pad. Connect the EPAD to PGND plain on the PCB to improve the thermal
performance.
3
Revision 2.0
Micrel, Inc.
MIC2101/02
Absolute Maximum Ratings(1)
Operating Ratings(3)
VIN ................................................................ 0.3V to +40V
VDD, VPVDD ........................................................ 0.3V to +6V
VSW , VFREQ, VILIM, VEN............................ 0.3V to (VIN +0.3V)
VBST to VSW ........................................................ 0.3V to 6V
VBST ................................................................ 0.3V to 46V
VPG ..................................................... 0.3V to (VDD + 0.3V)
VFB ..................................................... 0.3V to (VDD + 0.3V)
PGND to AGND............................................ 0.3V to +0.3V
Junction Temperature .............................................. +150°C
Storage Temperature (TS)......................... 65qC to +150qC
Lead Temperature (soldering, 10s)............................ 260°C
( )
ESD Rating 2 ................................................ ESD Sensitive
Supply Voltage (VIN).......................................... 4.5V to 38V
Enable Input (VEN) .................................................. 0V to VIN
VSW , VFREQ, VILIM, VEN ............................................. 0V to VIN
Junction Temperature (TJ) ........................ 40qC to +125qC
Junction Thermal Resistance
3mm x 3mm QFN-16 (TJA) ....................................50.8°C/W
3mm x 3mm QFN-16 (TJC) ......................25.3°C/W
Electrical Characteristics(4)
VIN = 12V, VOUT =1.2V; VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate ƒ&”7J ”ƒ&
Parameter
Condition
Min.
Typ.
Max.
Units
38
V
Power Supply Input
(5)
Input Voltage Range (VIN)
4.5
Quiescent Supply Current (MIC2101)
VFB = 1.5V
400
750
μA
Quiescent Supply Current (MIC2102)
VFB = 1.5V
2.1
3
mA
Shutdown Supply Current
SW unconnected, VEN = 0V
0.1
10
μA
VDD Supply
VDD Output Voltage
VIN = 7V to 38V, IDD = 10mA
4.8
5.2
5.4
V
VDD UVLO Threshold
VDD rising
3.8
4.2
4.6
V
VDD UVLO Hysteresis
Load Regulation
400
IDD = 0 to 40mA
mV
0.6
2
3.6
%
TJ = 25°C (±1.0%)
0.792
0.8
0.808
40°C ”TJ ”ƒC (±2%)
0.784
0.8
0.816
5
500
Reference
Feedback Reference Voltage
FB Bias Current
VFB = 0.8V
V
nA
Enable Control
1.8
EN Logic Level High
V
0.6
EN Logic Level Low
EN Hysteresis
EN Bias Current
200
VEN = 12V
6
V
mV
30
μA
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5kŸ in series with 100pF.
3. The device is not guaranteed to function outside operating range.
4. Specification for packaged product only.
5. The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have low voltage VTH.
November 13, 2013
4
Revision 2.0
Micrel, Inc.
MIC2101/02
Electrical Characteristics(4) (Continued)
VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate ƒ&”7J ”ƒ&
Parameter
Condition
Min.
Typ.
Max.
VFREQ = VIN
400
600
750
Units
Oscillator
Switching Frequency
VFREQ = 50%VIN
300
Maximum Duty Cycle
Minimum Duty Cycle
VFB > 0.8V
Minimum Off-Time
140
kHz
85
%
0
%
200
260
ns
Soft-Start
Soft-Start time
5
ms
Short-Circuit Protection
Current-Limit Threshold
VFB = 0.79V
30
14
0
mV
Short-Circuit Threshold
VFB = 0V
23
7
9
mV
Current-Limit Source Current
VFB = 0.79V
60
80
100
μA
Short-Circuit Source Current
VFB = 0V
27
37
47
μA
0.1
V
FET Drivers
DH, DL Output Low Voltage
ISINK = 10mA
DH, DL Output High Voltage
ISOURCE = 10mA
VPVDD 0.1V
or
VBST 0.1V
V
DH On-Resistance, High State
2.1
3.3
Ÿ
DH On-Resistance, Low State
1.8
3.3
Ÿ
DL On-Resistance, High State
1.8
3.3
Ÿ
1.2
2.3
Ÿ
50
μA
DL On-Resistance, Low State
SW, BST Leakage Current
Power Good (PG)
85
90
95
PG Threshold Voltage
Sweep VFB from Low to High
PG Hysteresis
Sweep VFB from High to Low
6
%VOUT
PG Delay Time
Sweep VFB from Low to High
100
μs
PG Low Voltage
VFB < 90% x VNOM, IPG = 1mA
70
TJ Rising
160
°C
7
°C
200
%VOUT
mV
Thermal Protection
Over-Temperature Shutdown
Over-Temperature Shutdown Hysteresis
November 13, 2013
5
Revision 2.0
Micrel, Inc.
MIC2101/02
Typical Characteristics
1.0%
VOUT = 3.3V
OUTPUT REGULATION (%)
IOUT = 0A
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.4%
0.2%
0.0%
-0.2%
-0.4%
-0.6%
0.10
-0.8%
0.00
-1.0%
4
9
14
19
24
29
34
0.60
0.50
0.40
0.30
0.20
10
15
20
25
30
0.00
35
5
0.4%
0.2%
0.0%
-0.2%
-0.4%
-0.6%
-0.8%
10
15
20
25
30
0.816
0.800
0.792
0.784
15
20
25
30
IOUT = 0A
3.300
3.283
3.267
3.250
35
5
INPUT VOLTAGE (V)
VIN Operating Supply Current
vs. Temperature (MIC2101)
SUPPLY CURRENT (mA)
IOUT = 0A
1.208
1.206
1.204
1.202
1.200
1.198
10
15
20
25
30
35
INPUT VOLTAGE (V)
Feedback Voltage
vs. Temperature (MIC2101)
1.00
1.210
3.316
3.217
10
INPUT VOLTAGE (V)
VOUT = 1.2V
35
3.234
35
1.212
30
VOUT = 3.3V
IOUT = 0A
0.808
Output Voltage
vs. Input Voltage (MIC2101)
25
3.333
VOUT = 3.3V
5
5
20
Output Voltage
vs. Input Voltage (MIC2101)
0.776
-1.0%
15
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
IOUT = 0A to 12A
0.6%
10
Feedback Voltage
vs. Input Voltage (MIC2101)
FEEDBACK VOLTAGE (V)
OUTPUT REGULATION (%)
0.70
0.824
VOUT = 1.2V
0.8%
OUTPUT VOLTAGE (V)
0.80
INPUT VOLTAGE (V)
Output Regulation
vs. Input Voltage (MIC2101)
1.0%
IOUT = 0A
0.10
5
INPUT VOLTAGE (V)
VOUT = 1.2V
0.90
IOUT = 0A to 12A
0.6%
VIN Operating Supply Current
vs. Input Voltage (MIC2101)
1.00
VOUT = 3.3V
0.8%
0.808
VIN = 12V
0.90
FEEBACK VOLTAGE (V)
SUPPLY CURRENT (mA)
1.00
0.90
Output Regulation
vs. Input Voltage (MIC2101)
SUPPLY CURRENT (mA)
VIN Operating Supply Current
vs. Input Voltage (MIC2101)
VOUT = 3.3V
0.80
IOUT = 0A
0.70
0.60
0.50
0.40
0.30
0.20
VIN = 12V
VOUT = 3.3V
0.804
IOUT = 0A
0.800
0.796
0.10
0.00
1.196
5
10
15
20
25
30
INPUT VOLTAGE (V)
November 13, 2013
35
-50
-25
0
25
50
75
TEMPERATURE (°C)
6
100
125
0.792
-50
-25
0
25
50
75 100 125
TEMPERATURE (°C)
Revision 2.0
Micrel, Inc.
MIC2101/02
Typical Characteristics (Continued)
Load Regulation
vs. Temperature (MIC2101)
Line Regulation
vs. Temperature (MIC2101)
0.4%
0.0%
VOUT = 3.3V
IOUT = 0 to 12A
0.2%
0.1%
0.0%
-0.1%
-0.2%
-0.4%
-0.6%
-0.8%
-1.0%
-1.2%
VIN = 5V to 38V
-1.4%
VOUT = 3.3V
-1.6%
-0.3%
0
25
50
75
100
125
-50
TEMPERATURE (°C)
Line Regulation
vs. Output Current (MIC2101)
-25
EFFICIENCY (%)
0.0%
VIN = 5V to 38V
VOUT = 3.3V
-1.0%
0.792
0
70
60
50
40
3
4
5
6
7
8
9
4
10 11 12
Efficiency (VIN = 18V)
vs. Output Current (MIC2101)
12
0
16
50
40
30
20
70
60
50
30
10
0
0
0
2
4
6
8
10
12
OUTPUT CURRENT (A)
November 13, 2013
14
16
6
8
10
12
14
16
Efficiency (VIN = 38V)
vs. Output Current (MIC2101)
80
40
10
4
90
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
70
60
50
40
30
20
20
fSW = 600kHz (CCM)
2
OUTPUT CURRENT (A)
EFFICIENCY (%)
60
fSW = 600kHz (CCM)
100
80
EFFICIENCY (%)
70
30
Efficiency (VIN = 24V)
vs. Output Current (MIC2101)
100
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
80
EFFICIENCY (%)
8
90
90
40
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
100
50
0
0
2
60
10
0
1
70
20
fSW = 600kHz (CCM)
10
0
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
80
30
-3.0%
3 4 5 6 7 8 9 10 11 12
OUTPUT CURRENT (A)
90
20
-2.0%
1 2
Efficiency (VIN =12V)
vs. Output Current (MIC2101)
100
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
80
1.0%
VIN = 12V
VOUT = 3.3V
0
25 50 75 100 125
TEMPERATURE (°C)
90
2.0%
0.796
Efficiency (VIN = 5V)
vs. Output Current (MIC2101)
100
3.0%
0.800
EFFICIENCY (%)
-25
0.804
IOUT = 0A
-1.8%
-50
LINE REGULATION (%)
FEEDBACK VOLTAGE (V)
-0.2%
LINE REGULATION (%)
LOAD REGULATION (%)
VIN = 12V
0.3%
Feedback Voltage
vs. Output Current (MIC2101)
0.808
fSW = 600kHz (CCM)
10
fSW = 600kHz (CCM)
0
0
2
4
6
8
10
12
OUTPUT CURRENT (A)
7
14
16
0
2
4
6
8
10
12
14
16
OUTPUT CURRENT (A)
Revision 2.0
Micrel, Inc.
MIC2101/02
Typical Characteristics (Continued)
0.808
FEEDBACK VOLTAGE (V)
SUPPLY CURRENT (mA)
60
48
36
VOUT = 3.3V
IOUT = 0A
24
Feedback Voltage
vs. Input Voltage (MIC2102)
fSW = 600kHz
12
IOUT = 0A
0.804
Output Regulation
vs. Input Voltage (MIC2102)
1.0%
VOUT = 3.3V
OUTPUT REGULATION (%)
VIN Operating Supply Current
vs. Input Voltage (MIC2102)
fSW = 600kHz
0.800
0.796
0.8%
VOUT = 3.3V
IOUT = 0A to 12A
0.6%
fSW = 600kHz
0.4%
0.2%
0.0%
-0.2%
-0.4%
-0.6%
-0.8%
0
4
9
14
19
24
29
34
0.792
39
INPUT VOLTAGE (V)
9
14
19
24
29
34
39
5
10
INPUT VOLTAGE (V)
Output Regulation
vs. Input Voltage (MIC2102)
1.0%
-1.0%
4
VIN Operating Supply Current
vs. Input Voltage (MIC2102)
60
15
20
25
30
35
INPUT VOLTAGE (V)
VIN Operating Supply Current
vs. Temperature (MIC2102)
50
0.6%
0.4%
0.2%
0.0%
`
-0.2%
VOUT = 1.2V
-0.4%
IOUT = 0A to 12A
-0.6%
fSW = 600kHz
48
36
24
VOUT = 1.2V
12
IOUT = 0A
-0.8%
5
10
15
20
25
30
30
20
VIN = 12V
VOUT = 3.3V
10
IOUT = 0A
fSW = 600kHz
0
35
0
5
10
INPUT VOLTAGE (V)
15
20
25
30
35
-50
VIN = 12V
VOUT = 3.3V
IOUT = 0A
VIN = 12V
0.2%
IOUT = 0A to 12A
VOUT = 3.3V
fSW = 600kHz
0.1%
0.0%
-0.1%
0
25
50
75
TEMPERATURE (°C)
November 13, 2013
100
125
100
125
VOUT = 3.3V
0.3%
IOUT = 0A
0.2%
0.1%
0.0%
-0.1%
-0.2%
-0.3%
-0.3%
-25
75
VIN = 5V to 38V
0.3%
-0.2%
0.792
50
0.4%
LINE REGULATION (%)
LOAD REGULATION (%)
FEEBACK VOLTAGE (V)
0.800
25
Line Regulation
vs. Temperature (MIC2102)
Load Regulation
vs. Temperature (MIC2102)
0.804
0
TEMPERATURE (°C)
0.4%
0.796
-25
INPUT VOLTAGE (V)
Feedback Voltage
vs. Temperature (MIC2102)
-50
40
fSW = 600kHz
-1.0%
0.808
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
OUTPUT REGULATION (%)
0.8%
-50
-25
0
25
50
75
TEMPERATURE (°C)
8
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
Revision 2.0
Micrel, Inc.
MIC2101/02
Typical Characteristics (Continued)
Feedback Voltage
vs. Output Current (MIC2102)
Switching Frequency
vs. Output Current (MIC2102)
700
0.3%
FEEDBACK VOLTAGE (V)
25°C
600
550
-40°C
500
450
125°C
400
VIN = 12V
350
VOUT = 3.3V
300
250
200
LINE REGULATION (%)
0.808
650
SWITCHING FREQUENCY
(kHz)
Line Regulation
vs. Output Current (MIC2102)
0.804
0.800
VIN = 12V
VOUT = 3.3V
fSW = 600kHz
0.796
0.2%
0.1%
0.0%
VIN = 5V to 38V
VOUT = 3.3V
-0.1%
VDD = 5V
fSW = 600kHz
-0.2%
150
0.792
100
0
2
4
6
8
10
-0.3%
0
12
4
5
6
7
8
9
10 11 12
0
50
40
30
20
80
70
60
50
0
0
4
8
12
100
4
8
12
16
OUTPUT CURRENT (A)
Efficiency (VIN = 24V)
vs. Output Current (MIC2102)
7
8
9
10 11 12
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
70
60
50
40
30
VSW = 600kHz
0
0
OUTPUT CURRENT (A)
6
10
30
16
5
20
40
fSW = 600kHz
4
80
fSW = 600kHz
10
3
90
EFFICIENCY (%)
60
EFFICIENCY (%)
70
2
Efficiency (VIN = 18V)
vs. Output Current (MIC2102)
100
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
90
1
OUTPUT CURRENT (A)
100
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
80
EFFICIENCY (%)
3
Efficiency (VIN = 12V)
vs. Output Current (MIC2102)
Efficiency (VIN = 5V)
vs. Output Current (MIC2102)
90
0
4
8
12
16
OUTPUT CURRENT (A)
Efficiency (VIN = 38V)
vs. Output Current (MIC2102)
100
90
90
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
70
60
50
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
80
EFFICIENCY (%)
80
EFFICIENCY (%)
2
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
100
1
40
30
20
70
60
50
40
30
20
f SW = 600kHz
10
fSW = 600kHz
10
0
0
0
4
8
12
OUTPUT CURRENT (A)
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0
4
8
12
16
OUTPUT CURRENT (A)
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MIC2101/02
Typical Characteristics (Continued)
Die Temperature* (VIN = 5.0V)
vs. Output Current
Die Temperature* (VIN = 12V)
vs. Output Current
120
60
40
VIN = 5.0V
VOUT = 3.3V
80
60
40
VIN = 12V
20
VOUT = 3.3V
fSW = 600kHz
fSW = 600kHz
0
0
1
2
3
4
5
6
7
8
9 10 11 12
0
1
2
3
OUTPUT CURRENT (A)
4
5
6
7
8
40
VIN = 24V
9
VOUT = 3.3V
20
fSW = 600kHz
10 11 12
0
1
2
140
120
80
40
60
VIN = 38V
VOUT = 3.3V
VIN = 5.0V
20
VOUT = 1.2V
fSW = 600kHz
4
5
6
7
8
1
2
3
4
5
6
7
8
10 11 12
fSW = 600kHz
80
60
`
40
VIN = 12V
20
VOUT = 1.2V
fSW = 600kHz
0
0
9
Die Temperature* (VIN = 12V)
vs. Output Current
100
60
100
3
OUTPUT CURRENT (A)
80
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
60
0
Die Temperature* (VIN = 5.0V)
vs. Output Current
160
20
80
OUTPUT CURRENT (A)
Die Temperature* (VIN = 38V)
vs. Output Current
40
100
0
DIE TEMPERATURE (°C)
20
DIE TEMPERATURE (°C)
100
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
80
Die Temperature* (VIN = 24V)
vs. Output Current
0
9 10 11 12
0
1
2
3
OUTPUT CURRENT (A)
4
5
6
7
8
9
10
11
12
0
0
OUTPUT CURRENT (A)
1
2
3
4
5
6
7
8
9
10 11 12
OUTPUT CURRENT (A)
Die Temperature* (VIN = 24V)
vs. Output Current
Die Temperature* (VIN = 38V)
vs. Output Current
160
100
80
60
40
VIN = 24V
VOUT = 1.2V
20
fSW = 600kHz
0
0
1
2
3
4
5
6
7
8
9
10
11 12
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
120
140
120
100
80
60
VIN = 38V
40
VOUT = 1.2V
20
fSW = 600kHz
0
0
1
2
3
4
5
6
7
8
9 10 11 12
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Case Temperature*: The temperature measurement was taken at the hottest point on the MIC2101/02 case mounted on a 5 square inch PCB, see
Thermal Measurement section. Actual results will depend upon the size of the PCB, ambient temperature and proximity to other heat emitting
components.
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MIC2101/02
Typical Characteristics (Continued)
VDD Voltage
vs. Input Voltage
VIN Shutdown Current
vs. Input Voltage
24
18
12
VEN = 0V
6
ENABLE THRESHOLD (V)
10
VDD VOLTAGE (V)
SHUTDOWN CURRENT (uA)
30
Enable Threshold
vs. Input Voltage
8
IDD = 10mA
6
4
VOUT = 3.3V
IDD = 40mA
fSW = 600kHz
2
0
4
9
14
19
24
29
34
39
0
INPUT VOLTAGE (V)
4
9
14
19
24
29
34
1.50
1.40
1.30
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
RISING
FALLING
HYST
4
39
9
INPUT VOLTAGE (V)
Switching Frequency
vs. Input Voltage
650
600
550
500
450
400
350
SWITCHING FREQUENCY (kHz)
IOUT = 2A
CURRENT LIMIT (A)
SWITCHING FREQUENCY
(kHz)
VOUT = 3.3V
700
20
15
10
VOUT = 3.3V
fSW = 600kHz
5
300
250
200
0
5
10
15
20
25
30
35
24
29
34
39
800
25
750
19
Switching Frequency
vs. Input Voltage
Output Peak Current Limit
vs. Input Voltage
800
14
INPUT VOLTAGE (V)
5
10
INPUT VOLTAGE (V)
15
20
25
30
35
750
VOUT = 1.2V
700
IOUT = 2A
650
600
550
500
450
400
350
300
250
200
5
INPUT VOLTAGE (V)
10
15
20
25
30
35
INPUT VOLTAGE (V)
6.0
5.5
VEN = 0V
5.0
IOUT = 0A
4.5
VDD Voltage (V)
12
VIN =12V
9
6
3
VDD UVLO Threshold
vs. Temperature
5.0
IDD = 10mA
4.0
VDD THRESHOLD (V)
15
SHUTDOWN CURRENT (μA)
VDD Voltage
vs. Temperature
VIN Shutdown Current
vs. Temperature
IDD = 40mA
3.5
3.0
2.5
2.0
1.5
VIN = 12V
1.0
IOUT = 0A
VIN =12V
IOUT = 0A
4.5
RISING
4.0
FALLING
3.5
3.0
2.5
0.5
2.0
0.0
-50
0
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
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MIC2101/02
Typical Characteristics (Continued)
Output Peak Current Limit
vs. Temperature
Enable Threshold
vs. Temperature
EN Bias Current
vs. Temperature
25
2.0
15
VIN =12V
10
VOUT = 3.3V
fSW = 600kHz
5
VIN = 12V
ENABLE THRESHOLD (V)
20
EN BIAS CURRENT (μA)
CURRENT LIMIT (A)
8
VIN =12V
7
VEN = 0V
6
5
4
3
2
1.7
RISING
1.4
FALLING
1.1
0.8
1
0.5
0
0
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
-50
-50
-25
0
25
50
75
TEMPERATURE (°C)
12
100
-25
0
25
50
75
100
125
125
TEMPERATURE (°C)
Revision 2.0
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MIC2101/02
Functional Characteristics
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MIC2101/02
Functional Characteristics (Continued)
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MIC2101/02
Functional Characteristics (Continued)
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MIC2101/02
Functional Characteristics (Continued)
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MIC2101/02
Functional Characteristics (Continued)
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MIC2101/02
Functional Characteristics (Continued)
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MIC2101/02
Functional Diagram
Note:
ZC Detection* MIC2101 Only.
Figure 1. MIC2101/02 Functional Diagram
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MIC2101/02
The maximum duty cycle is obtained from the 200ns
tOFF(min):
Functional Description
The MIC2101/02 are adaptive on-time synchronous buck
controllers built for high-input voltage to low output
voltage applications. It is designed to operate over a
wide input voltage range from, 4.5V to 38V and the
output is adjustable with an external resistive divider. An
adaptive on-time control scheme is employed to obtain a
constant switching frequency and to simplify the control
compensation. Over-current protection is implemented
by sensing low-side MOSFET’s RDS(ON). The device
features internal soft-start, enable, UVLO, and thermal
shutdown.
D MAX
VOUT
VIN u f SW
tS
1
200ns
tS
Eq. 2
where tS = 1/fSW . It is not recommended to use
MIC2101/02 with a OFF-time close to tOFF(min) during
steady-state operation.
The adaptive ON-time control scheme results in a
constant switching frequency in the MIC2101/02. The
actual ON-time and resulting switching frequency will
vary with the different rising and falling times of the
external MOSFETs. Also, the minimum tON results in a
lower switching frequency in high VIN to VOUT
applications. During load transients, the switching
frequency is changed due to the varying OFF-time.
To illustrate the control loop operation, we will analyze
both the steady-state and load transient scenarios. For
easy analysis, the gain of the gm amplifier is assumed to
be 1. With this assumption, the inverting input of the
error comparator is the same as the feedback voltage.
Figure 2 shows the MIC2101/02 control loop timing
during steady-state operation. During steady-state, the
gm amplifier senses the feedback voltage ripple, which is
proportional to the output voltage ripple plus injected
voltage ripple, to trigger the ON-time period. The ONtime is predetermined by the tON estimator. The
termination of the OFF-time is controlled by the feedback
voltage. At the valley of the feedback voltage ripple,
which occurs when VFB falls below VREF, the OFF period
ends and the next ON-time period is triggered through
the control logic circuitry.
Theory of Operation
Figure 1 illustrates the block diagram of the MIC2101/02.
The output voltage is sensed by the MIC2101/02
feedback pin FB via the voltage divider R1 and R2, and
compared to a 0.8V reference voltage VREF at the error
comparator through a low-gain transconductance (gm)
amplifier. If the feedback voltage decreases and the
amplifier output is below 0.8V, then the error comparator
will trigger the control logic and generate an ON-time
period. The ON-time period length is predetermined by
the “Fixed tON Estimator” circuitry:
t ON(ESTIMAT ED)
t S t OFF(MIN)
Eq. 1
where VOUT is the output voltage, VIN is the power stage
input voltage, and fSW is the switching frequency.
At the end of the ON-time period, the internal high-side
driver turns off the high-side MOSFET and the low-side
driver turns on the low-side MOSFET. The OFF-time
period length depends upon the feedback voltage in
most cases. When the feedback voltage decreases and
the output of the gm amplifier is below 0.8V, the ON-time
period is triggered and the OFF-time period ends. If the
OFF-time period determined by the feedback voltage is
less than the minimum OFF-time tOFF(min), which is about
200ns, the MIC2101/02 control logic will apply the
tOFF(min) instead. tOFF(min) is required to maintain enough
energy in the boost capacitor (CBST) to drive the highside MOSFET.
Figure 2. MIC2101/02 Control Loop Timing
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MIC2101/02
Figure 3a shows the operation of the MIC2101/02 during
a load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF. This will cause the error comparator to trigger
an ON-time period. At the end of the ON-time period, a
minimum OFF-time tOFF(min) is generated to charge CBST
since the feedback voltage is still below VREF. Then, the
next ON-time period is triggered due to the low feedback
voltage. Therefore, the switching frequency changes
during the load transient, but returns to the nominal fixed
frequency once the output has stabilized at the new load
current level. With the varying duty cycle and switching
frequency, the output recovery time is fast and the
output voltage deviation is small in MIC2101/02
converter.
Discontinuous Mode (MIC2101 only)
In continuous mode, the inductor current is always
greater than zero; however, at light loads the MIC2101 is
able to force the inductor current to operate in
discontinuous mode. Discontinuous mode is where the
inductor current falls to zero, as indicated by trace (IL)
shown in Figure 3b. During this period, the efficiency is
optimized by shutting down all the non-essential circuits
and minimizing the supply current. The MIC2101 wakes
up and turns on the high-side MOSFET when the
feedback voltage VFB drops below 0.8V.
The MIC2101 has a zero crossing comparator (ZC
Detection) that monitors the inductor current by sensing
the voltage drop across the low-side MOSFET during its
ON-time. If the VFB > 0.8V and the inductor current goes
slightly negative, then the MIC2101 automatically
powers down most of the IC circuitry and goes into a
low-power mode.
Once the MIC2101 goes into discontinuous mode, both
LSD and HSD are low, which turns off the high-side and
low-side MOSFETs. The load current is supplied by the
output capacitors and VOUT drops. If the drop of VOUT
causes VFB to go below VREF, then all the circuits will
wake up into normal continuous mode. First, the bias
currents of most circuits reduced during the
discontinuous mode are restored, then a tON pulse is
triggered before the drivers are turned on to avoid any
possible glitches. Finally, the high-side driver is turned
on. Figure 3b shows the control loop timing in
discontinuous mode.
Figure 3a. MIC2101/02 Load Transient Response
Unlike true current-mode control, the MIC2101/02 uses
the output voltage ripple to trigger an ON-time period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough.
In order to meet the stability requirements, the
MIC2101/02 feedback voltage ripple should be in phase
with the inductor current ripple and large enough to be
sensed by the gm amplifier and the error comparator.
The recommended feedback voltage ripple is
20mV~100mV over full input voltage range. If a low-ESR
output capacitor is selected, then the feedback voltage
ripple may be too small to be sensed by the gm amplifier
and the error comparator. Also, the output voltage ripple
and the feedback voltage ripple are not necessarily in
phase with the inductor current ripple if the ESR of the
output capacitor is very low. In these cases, ripple
injection is required to ensure proper operation. Please
refer to “Ripple Injection” subsection in Application
Information for more details about the ripple injection
technique.
Figure 3b. MIC2101 Control Loop Timing
(Discontinuous Mode)
During discontinuous mode, the bias current of most
circuits are reduced. As a result, the total power supply
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MIC2101/02
current during discontinuous mode is only about 400ȝA,
allowing the MIC2101 to achieve high efficiency in light
load applications.
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2101/02 implements an internal digital soft-start
by making the 0.8V reference voltage VREF ramp from 0
to 100% in about 6ms with 9.7mV steps. Therefore, the
output voltage is controlled to increase slowly by a staircase VFB ramp. Once the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. VDD must be powered up at the same time
or after VIN to make the soft-start function correctly.
Current Limit
The MIC2101/02 uses the RDS(ON) and external resistor
connected from ILIM pin to SW node to decides the
current limit.
The small capacitor (CCL) connected from ILIM pin to
PGND filters the switching node ringing during the off
time allowing a better short limit measurement. The time
constant created by RCL and CCL should be much less
than the minimum off time.
The VCL drop allows programming of short limit through
the value of the resistor (RCL), If the absolute value of the
voltage drop on the bottom FET is greater than VCL’ in
that case the V(ILIM) is lower than PGND and a short
circuit event is triggered. A hiccup cycle to treat the short
event is generated. The hiccup sequence including the
soft start reduces the stress on the switching FETs and
protects the load and supply for severe short conditions.
The short circuit current limit can be programmed by
using the formula illustrated in Equation 3:
R CL
ICL
Eq. 3
Where ICLIM = Desired current limit
ǻPP = Inductor current peak-to-peak
RDS (ON) = On-resistance of low-side power MOSFET
VCL = Current-limit threshold, the typical absolute value is
14mV in Electrical Characteristic table
ICL = Current-limit source current, the typical value is
80μA in Electrical Characteristic table.
In case of hard short, the short limit is folded down to
allow an indefinite hard short on the output without any
destructive effect. It is mandatory to make sure that the
inductor current used to charge the output capacitance
during soft start is under the folded short limit, otherwise
the supply will go in hiccup mode and may not be
finishing the soft start successfully.
The MOSFET RDS(ON) varies 30% to 40% with
temperature; therefore, it is recommended to add a 50%
margin to ICL in the above equation to avoid false current
limiting due to increased MOSFET junction temperature
rise. It is also recommended to connect SW pin directly
to the drain of the low-side MOSFET to accurately sense
the MOSFETs RDS(ON).
Figure 4. MIC2101/02 Current Limiting Circuit
In each switching cycle of the MIC2101/02 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage V(ILIM) is
compared with the power ground (PGND) after a
blanking time of 150nS. In this way the drop voltage over
the resistor RCL (VCL) is compared with the drop over the
bottom FET generating the short current limit.
November 13, 2013
(ICLIM ǻ PP u 0.5) u R DS(ON) VCL
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MIC2101/02
MOSFET Gate Drive
The MIC2101/02 high-side drive circuit is designed to
switch an N-Channel MOSFET. Figure 1 shows a
bootstrap circuit, consisting of D1 (a Schottky diode is
recommended) and CBST. This circuit supplies energy to
the high-side drive circuit. Capacitor CBST is charged
while the low-side MOSFET is on and the voltage on the
SW pin is approximately 0V. When the high-side
MOSFET driver is turned on, energy from CBST is used to
turn the MOSFET on. As the high-side MOSFET turns
on, the voltage on the SW pin increases to
approximately VIN. Diode D1 is reverse biased and CBST
floats high while continuing to keep the high-side
MOSFET on. The bias current of the high-side driver is
OHVV WKDQ P$ VR D ȝ) WR ȝ) LV VXIILFLHQW WR KROG
the gate voltage with minimal droop for the power stroke
(high-VLGH VZLWFKLQJ F\FOH LH ǻ%67 P$ [
ȝVȝ) P9:KHQ WKH ORZ-side MOSFET is
turned back on, CBST is recharged through D1. A small
resistor RG, which is in series with CBST, can be used to
slow down the turn-on time of the high-side N-channel
MOSFET.
The drive voltage is derived from the VDD supply voltage.
The nominal low-side gate drive voltage is VDD and the
nominal high-side gate drive voltage is approximately
VDD – VDIODE, where VDIODE is the voltage drop across
D1. An approximate 30ns delay between the high-side
and low-side driver transitions is used to prevent current
from simultaneously flowing unimpeded through both
MOSFETs.
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MIC2101/02
4.5V to 38V and has internal 5V VDD LDO. This internal
VDD LDO provides power to turn the external N-Channel
power MOSFETs for the high-side and low-side
switches. For applications where VDD < 5V, it is
necessary that the power MOSFETs used are sub-logic
level and are in full conduction mode for VGS of 2.5V. For
applications when VDD > 5V; logic-level MOSFETs,
whose operation is specified at VGS = 4.5V must be
used.
There are different criteria for choosing the high-side and
low-side MOSFETs. These differences are more
significant at lower duty cycles. In such an application,
the high-side MOSFET is required to switch as quickly
as possible to minimize transition losses, whereas the
low-side MOSFET can switch slower, but must handle
larger RMS currents. When the duty cycle approaches
50%, the current carrying capability of the high-side
MOSFET starts to become critical.
It is important to note that the on-resistance of a
MOSFET increases with increasing temperature. A 75°C
rise in junction temperature will increase the channel
resistance of the MOSFET by 50% to 75% of the
resistance specified at 25°C. This change in resistance
must be accounted for when calculating MOSFET power
dissipation and in calculating the value of current limit.
Total gate charge is the charge required to turn the
MOSFET on and off under specified operating conditions
(VDS and VGS). The gate charge is supplied by the
MIC2101/02 gate-drive circuit. At 600kHz switching
frequency, the gate charge can be a significant source of
power dissipation in the MIC2101/02. At low output load,
this power dissipation is noticeable as a reduction in
efficiency. The average current required to drive the
high-side MOSFET is:
Application Information
Setting the Switching Frequency
The MIC2101/02 are adjustable-frequency, synchronous
buck controllers featuring a unique adaptive on-time
control architecture. The switching frequency can be
adjusted between 200kHz and 600kHz by changing the
resistor divider network consisting of R19 and R20.
Figure 5. Switching Frequency Adjustment
The following formula gives the estimated switching
frequency:
fO u
f SW_ADJ
R20
R19 R20
Eq. 4
Where fO = Switching Frequency when R19 is 100k and
R20 being open, fO is typically 600kHz. For more precise
setting, it is recommended to use the following graph:
IG[HIGH-SIDE] (AVG)
QG u fSW
Eq. 5
Switching Frequency
700.00
where:
IG[HIGHSIDE](avg) = Average high-side MOSFET gate
current
QG = Total gate charge for the high-side MOSFET taken
from the manufacturer’s data sheet for VGS = VDD.
fSW = Switching Frequency
R19 = 100k, IOUT =12A
600.00
SW FREQ (kHz)
VIN = 12V
500.00
400.00
VIN =38V
300.00
200.00
100.00
The low-side MOSFET is turned on and off at VDS = 0
because an internal body diode or external freewheeling
diode is conducting during this time. The switching loss
for the low-side MOSFET is usually negligible. Also, the
gate-drive current for the low-side MOSFET is more
accurately calculated using CISS at VDS = 0 instead of
gate charge.
0.00
10.00
100.00
1000.00
10000.00
R20 (k Ohm)
Figure 6. Switching Frequency vs. R20
MOSFET Selection
The MIC2101/02 controllers work from input voltages of
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MIC2101/02
Making the assumption that the turn-on and turn-off
transition times are equal; the transition times can be
approximated by:
For the low-side MOSFET:
IG[LOW -SIDE] (AVG) CISS u VGS u f SW
Eq. 6
tT
Since the current from the gate drive comes from the
VDD, the power dissipated in the MIC2101/02 due to gate
drive is:
PGATEDRIVE
VDD u (IG[HIGH-SIDE] (AVG)
IG[LOW -SIDE] (AVG))
Voltage rating
x
On-resistance
x
Total gate charge
Eq. 7
The total high-side MOSFET switching loss is:
PAC
PAC
Eq. 12
The high-side MOSFET switching losses increase with
the switching frequency and the input voltage VHSD. The
low-side MOSFET switching losses are negligible and
can be ignored for these calculations.
PCONDUCTION PAC
PCONDUCTION
(VHSD VD ) u IPK u t T u f SW
where:
tT = Switching transition time
VD = Body diode drop (0.5V)
fSW = Switching Frequency
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor.
A good compromise between size, loss and cost is to set
the inductor ripple current to be equal to 20% of the
maximum output current.
The voltage ratings for the high-side and low-side
MOSFETs are essentially equal to the power stage input
voltage VHSD. A safety factor of 20% should be added to
the VDS(MAX) of the MOSFETs to account for voltage
spikes due to circuit parasitic elements.
The power dissipated in the MOSFETs is the sum of the
conduction losses during the on-time (PCONDUCTION) and
the switching losses during the period of time when the
MOSFETs turn on and off (PAC).
PSW
Eq.11
where:
CISS and COSS are measured at VDS = 0
IG = Gate-drive current
A convenient figure of merit for switching MOSFETs is
the on resistance times the total gate charge RDS(ON) ×
QG. Lower numbers translate into higher efficiency. Low
gate-charge logic-level MOSFETs are a good choice for
use with the MIC2101/02. Also, the RDS(ON) of the lowside MOSFET will determine the current-limit value.
Please refer to “Current Limit” subsection is Functional
Description for more details.
Parameters that are important to MOSFET switch
selection are:
x
C ISS u VIN C OSS u VHSD
IG
ISW(RMS) 2 u RDS(ON)
PAC(off ) PAC(on)
Eq.8
Eq. 9
Eq. 10
where:
RDS(ON) = On-resistance of the MOSFET switch
D = Duty Cycle = VOUT / VHSD
November 13, 2013
25
Revision 2.0
Micrel, Inc.
MIC2101/02
The inductance value is calculated by Equation 13:
L
VOUT u (VIN(MAX) VOUT )
VIN(MAX) u f sw u 20% u IOUT(MAX)
Copper loss in the inductor is calculated by Equation 17:
2
PINDUCTOR(Cu) = IL(RMS) u RWINDING
Eq. 13
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating temperature.
where:
fSW = Switching frequency
20% = Ratio of AC ripple current to DC output current
VIN(MAX) = Maximum power stage input voltage
PWINDING(Ht) = RWINDING(20°C) u
(1 + 0.0042 × (TH – T20°C))
The peak-to-peak inductor current ripple is:
ǻ,L(PP)
VOUT u (VIN(MAX) VOUT )
VIN(MAX) u f sw u L
Eq. 14
Output Capacitor Selection
The type of the output capacitor is usually determined by
its equivalent series resistance (ESR). Voltage and RMS
current capability are two other important factors for
selecting the output capacitor. Recommended capacitor
types are tantalum, low-ESR aluminum electrolytic, OSCON and POSCAP. The output capacitor’s ESR is
usually the main cause of the output ripple. The output
capacitor ESR also affects the control loop from a
stability point of view. The maximum value of ESR is
calculated:
Eq. 15
2
The RMS inductor current is used to calculate the I R
losses in the inductor.
IL(RMS)
IOUT(MAX) 2 ǻ,L(PP) 2
12
Eq. 16
ESR COUT d
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance. The
high frequency operation of the MIC2101/02 requires the
use of ferrite materials for all but the most cost sensitive
applications. Lower cost iron powder cores may be used
but the increase in core loss will reduce the efficiency of
the power supply. This is especially noticeable at low
output power. The winding resistance decreases
efficiency at the higher output current levels. The
winding resistance must be minimized although this
usually comes at the expense of a larger inductor. The
power dissipated in the inductor is equal to the sum of
the core and copper losses. At higher output loads, the
core losses are usually insignificant and can be ignored.
At lower output currents, the core losses can be a
significant contributor. Core loss information is usually
available from the magnetics vendor.
November 13, 2013
Eq. 18
where:
TH = temperature of wire under full load
T20°C = ambient temperature
RWINDING(20°C) = room temperature winding resistance
(usually specified by the manufacturer)
The peak inductor current is equal to the average output
current plus one half of the peak-to-peak inductor current
ripple.
IL(pk) =IOUT(MAX) 0.5 u ǻIL(PP)
Eq. 17
ǻ9OUT(pp)
ǻ,L(PP)
Eq. 19
where:
ǻVOUT(pp) = peak-to-peak output voltage ripple
ǻ,L(PP) = peak-to-peak inductor current ripple
26
Revision 2.0
Micrel, Inc.
MIC2101/02
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated in
Equation 20:
2
ǻ9OUT(pp)
ǻ,L(PP)
§
·
¨
¸ ǻ,L(PP) u ESR C
OUT
¨C
¸
© OUT u f SW u 8 ¹
Input Capacitor Selection
The input capacitor for the power stage input VIN should
be selected for ripple current rating and voltage rating.
Tantalum input capacitors may fail when subjected to
high inrush currents, caused by turning the input supply
on. A tantalum input capacitor’s voltage rating should be
at least two times the maximum input voltage to
maximize reliability. Aluminum electrolytic, OS-CON, and
multilayer polymer film capacitors can handle the higher
inrush currents without voltage de-rating. The input
voltage ripple will primarily depend on the input
capacitor’s ESR. The peak input current is equal to the
peak inductor current, so:
2
Eq. 20
where:
D = duty cycle
COUT = output capacitance value
fsw = switching frequency
ǻVIN = IL(pk) × ESRCIN
As described in the “Theory of Operation” subsection in
Functional Description, the MIC2101/02 requires at least
20mV peak-to-peak ripple at the FB pin to make the gm
amplifier and the error comparator behave properly.
Also, the output voltage ripple should be in phase with
the inductor current. Therefore, the output voltage ripple
caused by the output capacitors value should be much
smaller than the ripple caused by the output capacitor
ESR. If low-ESR capacitors, such as ceramic capacitors,
are selected as the output capacitors, a ripple injection
method should be applied to provide the enough
feedback voltage ripple. Please refer to the “Ripple
Injection” subsection for more details.
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated in Equation 21:
ICOUT (RMS)
ǻ,L(PP)
Eq. 23
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
ICIN(RMS) | IOUT(max) u D u (1 D)
Eq. 24
The power dissipated in the input capacitor is:
2
PDISS(CIN) = ICIN(RMS) × ESRCIN
Eq. 25
Voltage Setting Components
The MIC2101/02 requires two resistors to set the output
voltage as shown in Figure 7:
Eq. 21
12
The power dissipated in the output capacitor is:
PDISS(COUT )
2
ICOUT (RMS) u ESR COUT
Eq. 22
Figure 7. Voltage-Divider Configuration
November 13, 2013
27
Revision 2.0
Micrel, Inc.
MIC2101/02
The output voltage is determined by the equation:
VOUT
VFB u (1 R1
)
R2
2. Inadequate ripple at the feedback voltage due to the
small ESR of the output capacitors.
The output voltage ripple is fed into the FB pin
through a feedforward capacitor Cff in this situation,
as shown in Figure 8b. The typical Cff value is
between 1nF and 100nF. With the feedforward
capacitor, the feedback voltage ripple is very close
to the output voltage ripple:
Eq. 26
where, VFB = 0.8V. A typical value of R1 can be between
Nȍ DQGNȍ,I5LVWRRODUJH, it may allow noise to be
introduced into the voltage feedback loop. If R1 is too
small in value, it will decrease the efficiency of the power
supply, especially at light loads. Once R1 is selected, R2
can be calculated using:
R2
VFB u R1
VOUT VFB
ǻ9FB(pp) | ESR u ǻ,L (pp)
3. Virtually no ripple at the FB pin voltage due to the
very-low ESR of the output capacitors:
Eq. 27
Ripple Injection
The VFB ripple required for proper operation of the
MIC2101/02 gm amplifier and error comparator is 20mV
to 100mV. However, the output voltage ripple is
generally designed as 1% to 2% of the output voltage.
For a low output voltage, such as a 1V, the output
voltage ripple is only 10mV to 20mV, and the feedback
voltage ripple is less than 20mV. If the feedback voltage
ripple is so small that the gm amplifier and error
comparator can’t sense it, then the MIC2101/02 will lose
control and the output voltage is not regulated. In order
to have some amount of VFB ripple, a ripple injection
method is applied for low output voltage ripple
applications.
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
1. Enough ripple at the feedback voltage due to the
large ESR of the output capacitors.
As shown in Figure 8a, the converter is stable
without any ripple injection. The feedback voltage
ripple is:
ǻ9FB(pp)
R2
u ESR COUT u ǻ,L (pp)
R1 R2
Eq. 29
Figure 8a. Enough Ripple at FB
Figure 8b. Inadequate Ripple at FB
Eq. 28
where ǻ,L(pp) is the peak-to-peak value of the
inductor current ripple.
Figure 8c. Invisible Ripple at FB
November 13, 2013
28
Revision 2.0
Micrel, Inc.
MIC2101/02
The process of sizing the ripple injection resistor and
capacitors is:
Step 1. Select Cff to feed all output ripples into the
feedback pin and make sure the large time constant
assumption is satisfied. Typical choice of Cff is 1nF to
Q)LI5DQG5DUHLQNȍUDQJH
Step 2. Select Rinj according to the expected feedback
voltage ripple using Equation 35:
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor RINJ and a
capacitor Cinj, as shown in Figure 8c. The injected ripple
is:
ǻ9FB(pp)
K div
VIN u K div u D u (1 - D) u
R1//R2
R INJ R1//R2
1
fSW u W
Eq.30
K div
Eq. 31
ǻ9FB(pp)
VIN
u
fSW u W
D u (1 D)
Eq. 33
Then the value of RINJ is obtained as:
where:
VIN = Power stage input voltage
D = Duty cycle
fSW = Switching frequency
R INJ
(R1//R2) u (
1
K div
1)
Eq. 34
IJ = (R1//R2//Rinj) u Cff
Step 3. Select Cinj as 100nF, which could be considered
as short for a wide range of the frequencies.
In Equations 30 and 32, it is assumed that the time
constant associated with Cff must be much greater than
the switching period:
1
fSW u W
T
W
1
Eq. 32
,I WKH YROWDJH GLYLGHU UHVLVWRUV 5 DQG 5 DUH LQ WKH Nȍ
range, a Cff of 1nF to 100nF can easily satisfy the large
time constant requirements. Also, a 100nF injection
capacitor CINJ is used in order to be considered as short
for a wide range of the frequencies.
November 13, 2013
29
Revision 2.0
Micrel, Inc.
MIC2101/02
Inductor
PCB Layout Guidelines
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC2101/02 converter.
IC
x
The signal ground pin (AGND) must be connected
directly to the ground planes. Do not route the
AGND pin to the PGND pin on the top layer.
x
Place the IC close to the point of load (POL).
x
Use fat traces to route the input and output power
lines.
x
Signal and power grounds should be kept separate
and connected at only one location.
Place the input capacitor next.
x
Place the input capacitors on the same side of the
board and as close to the MOSFETs as possible.
x
Place several vias to the ground plane close to the
input capacitor ground terminal.
x
Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
x
Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
x
x
Do not route any digital lines underneath or close to
the inductor.
x
Keep the switch node (SW) away from the feedback
(FB) pin.
x
The SW pin should be connected directly to the
drain of the low-side MOSFET to accurate sense the
voltage across the low-side MOSFET.
To minimize noise, place a ground plane underneath
the inductor.
Output Capacitor
x
Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
x
Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
x
The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high-current
load trace can degrade the DC load regulation.
MOSFETs
Input Capacitor
x
Keep the inductor connection to the switch node
(SW) short.
x
The 4.7μF ceramic capacitors, which are connected
to the VDD and PVDD pins, must be located right at
the IC. The VDD pin is very noise sensitive and
placement of the capacitor is very critical. Use wide
traces to connect to the VDD, PVDD and AGND,
PGND pins respectively.
x
x
If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
x
Low-side MOSFET gate drive trace (DL pin to
MOSFET gate pin) must be short and routed over a
ground plane. The ground plane should be the
connection between the MOSFET source and
PGND.
x
Chose a low-side MOSFET with a high CGS/CGD ratio
and a low internal gate resistance to minimize the
effect of dv/dt inducted turn-on.
x
Do not put a resistor between the Low-side
MOSFET gate drive output and the gate.
x
Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than a
2.5V or 3.3V rated MOSFET. MOSFETs that are
rated for operation at less than 4.5V VGS should not
be used.
x
In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the overvoltage spike seen on the input supply with power is
suddenly applied.
RC Snubber
x
Place the RC snubber on the same side of the board
and as close to the SW pin as possible.
November 13, 2013
30
Revision 2.0
Micrel, Inc.
MIC2101/02
Evaluation Board Schematic
Figure 9. Schematic of MIC2101/02 Evaluation Board
(J1, J9, J12, R14, and R21 are for testing purposes)
November 13, 2013
31
Revision 2.0
Micrel, Inc.
MIC2101/02
Bill of Materials
Item
C1
C2, C3, C4
Part Number
EEU-FC1J221S
C3225X7R1H225K
TDK
C7, C17
C9
C3225X5ROJ107M
TDK
AVX
C1608X7R1H104K
TDK
AVX
C1608X5R0J475K
TDK
AVX
C1608X5R0J105K
TDK
C12
C13
C15 (OPEN)
C5 (OPEN)
C18
D1
L1
Q1, Q3
AVX
2.2μF/50V Ceramic Capacitor, X7R, Size 1210
3
100μF/6.3V Ceramic Capacitor, X7R, Size 1210
1
0.1μF/50V Ceramic Capacitor, X7R, Size 0603
3
4.7μF/6.3V Ceramic Capacitor, X7R, Size 0603
2
1μF/6.3V Ceramic Capacitor, X7R, Size 0603
1
0.47μF/100V,X7R,0805
1
1nF/50V Cermiac Capacitor, X7R, Size 0603
1
4.7nF/50V Cermiac Capacitor, X7R, Size 0603
1
Murata
AVX
C1608X7R1H102K
TDK
Murata
06035C472KAT2A
AVX
C1608X7R1H472K
TDK
6SEPC470MX
1
(9)
Murata
06035C102KAT2A
GRM188R71H472MA01D
220μF Aluminum Capacitor, 63V
Murata
06036C105KAT2A
08051C474KAT2A
Sanyo
(10)
470μF/6.3V, 7m:, OSCON
6SEPC470M
Sanyo
470μF/6.3V, 7m:, OSCON
6TPB470M
Sanyo
470μF/6.3V, POSCAP
GRM32ER60J107ME20L
Murata
100μF/6.3V Ceramic Capacitor, X7R, Size 1210
GRM1885C1H150JA01D
Murata
06035A150JAT2A
BAT46W-TP
CDEP147NP- 1R5M-95
BSC067N06LS3
Qty
Murata
06036D475KAT2A
GRM21BR72A474KA73
Description
Murata
06035C104KAT2A
GRM188R71H102KA01D
C11
Murata
AVX
GRM188R70J105KA01D
C8
(8)
12106D107MAT2A
GRM188R60J475KE19D
(6)
(7)
AVX
GRM188R71H104KA93D
C6, C16, C10
Panasonic
12105C225KAT2A
GRM32ER60J107ME20L
C14
Manufacturer
AVX
(11)
MCC
Sumida
1
15pF, 50V, 0603, NPO
1
100V Small Signal Schottky Diode, SOD123
1
(12)
1.5μH, 27/22Asat, 20Arms for 40C rise
1
(13)
MOSFET, N-CH, Power SO-8
2
Infineon
Notes:
6. Panasonic: www.panasonic.com.
7. AVX: www.avx.com
8. TDK: www.tdk.com.
9. Murata: www.murata.com.
10. Sanyo: www.sanyo.com.
11. MCC.: www.mccsemi.com.
12. Sumida: www.sumida.com
13. Infineon: www.infineon.com.
November 13, 2013
32
Revision 2.0
Micrel, Inc.
MIC2101/02
Bill of Materials (Continued)
Item
Part Number
Manufacturer
Description
Qty.
Q2, Q4 (OPEN)
Vishay Dale
(14)
R1
CRCW060310K0FKEA
R2, R23
CRCW08051R21FKEA
Vishay Dale
ȍ5HVLVWRU6L]H
2
R3
CRCW06035K23FKEA
Vishay Dale
5.23K,1%,1/10W,0603.
1
R4
CRCW060380K6FKEA
Vishay Dale
80.6kȍ Resistor, Size 0603, 1%
1
R5
CRCW060340K2FKEA
Vishay Dale
40.2kȍ Resistor, Size 0603, 1%
1
R6
CRCW060320K0FKEA
Vishay Dale
20kȍ Resistor, Size 0603, 1%
1
R7
CRCW060311K5FKEA
Vishay Dale
11.5kȍ Resistor, Size 0603, 1%
1
R8
CRCW06038K06FKEA
Vishay Dale
8.06kȍ Resistor, Size 0603, 1%
1
R9
CRCW06034K75FKEA
Vishay Dale
4.75kȍ Resistor, Size 0603, 1%
1
R10
CRCW06033K24FKEA
Vishay Dale
3.24kȍ Resistor, Size 0603, 1%
1
R11
CRCW06031K91FKEA
Vishay Dale
1.91kȍ Resistor, Size 0603, 1%
1
R12 (OPEN)
CRCW0603715R0FKEA
Vishay Dale
715ȍ Resistor, Size 0603, 1%
R13 (OPEN)
CRCW0603348R0FKEA
Vishay Dale
348ȍ5HVLVWRU6L]H
R14, R15, R19
CRCW06030000FKEA
Vishay Dale
0ȍ5HVLVWRU6L]H 5%
3
R16
CRCW08052R0FKEA
Vishay Dale
ȍ5HVLVWRU6L]H
1
R17
CRCW06031K65FKEA
Vishay Dale
1.65Nȍ5HVLVWRU6L]H
1
R18
CRCW060349K9FKEA
Vishay/Dale
49.9K,1%,1/10W,0603
1
R20 (OPEN)
No Load
R21
CRCW060349R9FKEA
Vishay Dale
49.9ȍ Resistor, Size 0603, 1%
1
R22
CRCW0603100KFKEA
Vishay Dale
100kȍ Resistor, Size 0603, 1%
1
U1
MIC2101YML
MIC2102YML
38V Synchronous Buck DC/DC Controller
1
(15)
Micrel. Inc.
10kȍ Resistor, Size 0603, 1%
1
Notes:
14. Vishay: www.vishay.com.
15. Micrel, Inc.: www.micrel.com.
November 13, 2013
33
Revision 2.0
Micrel, Inc.
MIC2101/02
PCB Layout
Figure 10. MIC2101/02 Evaluation Board Top Layer
Figure 11. MIC2101/02 Evaluation Board Mid-Layer 1 (Ground Plane)
November 13, 2013
34
Revision 2.0
Micrel, Inc.
MIC2101/02
PCB Layout (Continued)
Figure 12. MIC2101/02 Evaluation Board Mid-Layer 2
Figure 13. MIC2101/02 Evaluation Board Bottom Layer
November 13, 2013
35
Revision 2.0
Micrel, Inc.
MIC2101/02
Package Information
16-Pin 3mm u 3mm QFN (ML)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
November 13, 2013
N
36
© 2012 Micrel, Incorporated.
Revision 2.0