M MIC2409 91/92 19V V, 6A High h-Efficiency Buck Re egulator S SuperSwitc cher™ PRELIMINA ARY Gen neral Desc cription The Micrel MIC C24091/92 is a cons stant-frequenc cy, f a unique adaptive synchronous buck regulator featuring me control architecture. a The T MIC2409 91/92 operattes on-tim over an input sup pply range of 4.5V to 19V and provides sa o up to 6A of o output curre ent. The outp put regullated output of voltage is adjusttable down to t 0.6V with a guaranteed o with programmab ble accuracy of ±1%.The device operates cy from 200kHz to 800kHz z. switcching frequenc Micre el’s Hyper Speed S Contro ol™ architectture allows for f ultra--fast transien nt response while reducing the outp put capa acitance and d also make es (High VIN)/(Low VOUUT) opera ation possib ble. This ad daptive tON ripple control architecture comb bines the adv vantages of fixed-frequen f ncy ation and fas st transient re esponse in a single devic ce. opera The M MIC24091/92 2 has program mmable curren nt limit. The MIC24091/92 2 offers a full suite of prottection featurres nsure protec ction of the IC during fa ault condition ns. to en Thesse include undervoltage lockout (UVLO) to ensu ure prope er operation under u power-sag condition ns, internal so oftstart to reduce inrush current, “hiccup mod de” short-circ cuit ection and th hermal shutdown. An ope en-drain pow wer prote good d (PG) pin is provided. p Datasheets and support s docu umentation arre available on el’s web site at: a www.micre el.com. Micre FETzilla™ ™ Featu ures Inco orporates Miccrel’s proprie etary FETzilla a™ MOSFET T tech hnology Hyper Speed Co ontrol architeccture enabless (MIC24091) h delta V ope eration (VIN = 19V and VOUUT = 0.6V) and d high sma all output capa acitance d® architectu Hyp perLight Load ure enabless (MIC24092 2) erior light load d efficiency supe 4.5V V to 19V volta age input 6A o output currentt capability, u up to 95% efficciency Adju ustable output, ±1% feedba ack accuracyy Capacitor Any sstable - zero-to-high ESR Prog grammable sw witching frequ uency 200kHzz to 800kHz No e external comp pensation Pow wer good (PG) output Prog grammable ccurrent-limit, ““hiccup mode e” short-circuit prottection and sa afe start-up in nto a pre-biase ed load –40C to +125C C junction tem mperature rang ge Ava ilable in 30-pin 5mm × 6m mm QFN packkage Appllications Servvers and workk stations Rou uters, switchess, telecom, an nd base statio ons Typ pical Application Efficiency (VIN = 12V) vs. Output Currrent 100 5.0V 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 90 EFFICIENCY (%) 80 70 60 50 40 30 20 fsw = 330kHz 10 0 1 2 3 4 5 6 7 8 OUTPUT CURREN NT (A) Hype erLight Load is a registered trade emark of Micrel, Inc. I Any Capacitor, Hype er Speed Control,, SuperSwitcher, and FETzilla are e trademarks of Micrel, Inc. Micrel Inc. • 2180 Fortune Driv ve • San Jose, CA C 95131 • USA • tel +1 (408) 94 44-0800 • fax + 1 (408) 474-1000 0 • http://www.m micrel.com March h 5, 2015 Revision 1.0 Micrel, Inc. MIC24091/92 Ordering Information Part Number Switching Frequency Voltage Package Junction Temperature Range Lead Finish MIC24091YJL 200kHz − 800kHz Adjustable 30-Pin 5mm × 6mm QFN −40°C to +125°C Pb-Free MIC24092YJL 200kHz − 800kHz Adjustable 30-Pin 5mm × 6mm QFN −40°C to +125°C Pb-Free Pin Configuration 30-Pin 5mm × 5mm QFN (JL) (Top View) March 5, 2015 2 Revision 1.0 Micrel, Inc. MIC24091/92 Pin Description Pin Number Pin Name 1 PVDD PVDD is the power MOSFET gate drive supply voltage and created from internal LDO. Connect a 2.2Ω resistor between VDD and PVDD. When VIN < +5.5V, PVDD should be tied to PVIN pins. A 2.2µF ceramic capacitor from the PVDD pin to PGND (Pin 2) must be place next to the IC. 3 ILIM Current-Limit Setting. Connect a resistor from SW to ILIM to set the over-current threshold for the converter. 4 FREQ Switching Frequency Adjust Input. Tie this pin to VIN to operate at 800kHz and place a resistor divider to reduce the frequency. 2, 6, 7, 8, 9, 22 PGND Power Ground. PGND is the ground path for the MIC24091/92 buck converter power stage. The PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of output capacitors. The loop for the power ground should be as small as possible and separate from the signal ground (SGND) loop. 5, 10, 11, 12, 13, 21 SW Switch Node output. Internal connection for the high-side MOSFET source and low-side MOSFET drain. Due to the high-speed switching on this pin, the SW pin should be routed away from sensitive nodes. Pin 21 is return current path for high-side driver. 14, 15, 16, 17, 18, 19 PVIN High-Side N-internal MOSFET Drain Connection Input. The PVIN operating voltage range is from 4.5V to 19V. Input capacitors between the PVIN pins and the power ground (PGND) are required and keep the connection short. 20 BST Boost Output. Bootstrapped voltage to the high-side N-channel MOSFET driver. Internal MOSFET switch is connected between the PVDD pin and the BST pin. A boost capacitor of 0.1μF is connected between the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turnon time of high-side N-Channel MOSFETs. 23 OVP Redundant Output Overvoltage Protection (OVP) Input. Connect a resistive divider from VOUT to set OVP threshold. In the case of OVP, the part latch off to protect the load. 24 NC 25 SGND 26 FB Feedback Input. Input to the transconductance amplifier of the control loop. The FB pin is regulated to 0.6V. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage. 27 PG Power Good Output. Open drain output. The PG pin is externally tied with a resistor to VDD. A high output is asserted when VOUT > 92% of nominal. 28 EN Enable Input. A logic level control of the output. The EN pin is CMOS-compatible. Logic high = enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced (typically 5µA). The EN pin should not be left floating. 29 VIN Power Supply Voltage Input. Requires bypass capacitor to SGND. VDD 5V Internal Linear Regulator Output. VDD supply is the power MOSFET gate drive supply voltage and the supply bus for the IC. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD should be tied to PVIN pins. A 1µF ceramic capacitor from the VDD pin to SGND pins must be place next to the IC. 30 March 5, 2015 Pin Function No Connect. Signal Ground of IC. 3 Revision 1.0 Micrel, Inc. MIC24091/92 Absolute Maximum Ratings(1) Operating Ratings(2) PVIN to PGND............................................... −0.3V to +24V VIN to PGND ................................................. −0.3V to PVIN PVDD, VDD to PGND ..................................... −0.3V to +6V VSW , VCS to PGND ............................. −0.3V to (PVIN +0.3V) VBST to VSW ........................................................ −0.3V to 6V VBST to PGND .................................................. −0.3V to 35V VFB, VPG to PGND ............................. −0.3V to (VDD + 0.3V) VEN to PGND ....................................... −0.3V to (VIN +0.3V) PGND to SGND............................................ −0.3V to +0.3V Junction Temperature .............................................. +150°C Storage Temperature (TS) ......................... −65°C to +150°C Lead Temperature (soldering, 10s) ............................ 260°C (4) ESD Rating ……………………………… ..... ESD Sensitive Supply Voltage (PVIN, VIN) .............................. 4.5V to 19V PVDD, VDD Supply Voltage (PVDD, VDD) ..... 4.5V to 5.5V Enable Input (VEN) ................................................. 0V to VIN Junction Temperature (TJ) ........................ −40°C to +125°C (3) Package Thermal Resistance 5mm × 6mm QFN-30 (θJA) ................................ 28°C/W 5mm × 6mm QFN-30 (θJC) ............................... 2.5°C/W Electrical Characteristics(5) PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate −40°C ≤ TJ ≤ +125°C. Parameter Condition Min. Typ. Max. Units 19 V 400 750 µA 5 10 µA Power Supply Input 4.5 Input Voltage Range (VIN, PVIN) Quiescent Supply Current VFB = 1.5V (Non-Switching) Shutdown Supply Current VEN = 0V VDD Supply Voltage VDD Output Voltage VIN = 7V to 19V, IDD = 40mA 4.8 5 5.4 V VDD UVLO Threshold VDD Rising 3.7 4.2 4.5 V VDD UVLO Hysteresis Dropout Voltage (VIN – VDD) 400 IDD = 25mA 750 mV 1000 mV 5.5 V DC-to-DC Controller Output-Voltage Adjust Range (VOUT) 0.6 Reference Feedback Reference Voltage TJ = 25°C (±0.5%) 0.597 0.6 0.603 −40°C ≤ TJ ≤ 125°C (±1.0%) 0.594 0.6 0.606 V Load Regulation IOUT = 0A to 6A (Continuous Mode) 0.25 % Line Regulation VIN = 4.5V to 19V 0.25 % FB Bias Current VFB = 0.6V 50 500 nA Notes: 1. Exceeding the absolute maximum ratings may damage the device. 2. The device is not guaranteed to function outside its operating ratings. 3. PD(MAX) = (TJ(MAX) – TA)/ θJA, where θJA depends upon the printed circuit layout. A 5 square inch 4 layer, 0.62”, FR-4 PCB with 2oz finish copper weight per layer is used for the θJA. 4. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF. 5. Specification for packaged product only. March 5, 2015 4 Revision 1.0 Micrel, Inc. MIC24091/92 Electrical Characteristics(5) (Continued) PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate −40°C ≤ TJ ≤ +125°C. Parameter Condition Min. Typ. Max. Units Enable Control 1.6 EN Logic Level High V 0.6 V 6 30 µA 800 880 kHz EN Logic Level Low EN Bias Current VEN = 12V Oscillator (6) VOUT = 2.5V, FREQ = VIN (7) VFB = 0V 85 % VFB = 1.0V 0 % 200 ns 7 ms Switching Frequency Maximum Duty Cycle Minimum Duty Cycle 720 Minimum Off-Time Soft-Start Soft-Start Time Short-Circuit Protection & OVP Peak Inductor Current-Limit Threshold VFB = 0.6V, TJ = 25°C -14 -4 6 mV Current Limit Source Current VFB = 0.6V 30 36 42 µA Over Voltage Protection threshold 0.62 V Internal FETs Top-MOSFET RDS(ON) ISW = 1A 42 mΩ Bottom-MOSFET RDS(ON) ISW = 1A 12.5 mΩ Bottom FET Leakage Current VEN = 0V 1 µA Top FET Leakage Current VEN = 0V 1 µA Power Good (PG) 85 Sweep VFB from Low-to-High PG Hysteresis Sweep VFB from High-to-Low 6 %VOUT PG Delay Time Sweep VFB from Low-to-High 100 µs PG Low Voltage Sweep VFB < 0.9 × VNOM, IPG = 1mA 70 200 mV 10 100 nA PG Leakage Current 92 95 PG Threshold Voltage %VOUT Thermal Protection Overtemperature Shutdown TJ Rising Overtemperature Shutdown Hysteresis 150 °C 15 °C Notes: 6. Measured in test mode. 7. The maximum duty-cycle is limited by the fixed mandatory off-time tOFF of typically 200ns. March 5, 2015 5 Revision 1.0 Micrel, Inc. MIC24091/92 Typical Characteristics VIN Shutdown Current vs. Input Voltage VIN Operating Supply Current vs. Input Voltage 100 VOUT = 1.8V IOUT = 0A SWITCHING 1.6 1.2 0.8 0.4 10 90 80 8 VDD VOLTAGE (V) SHUTDOWN CURRENT (µA) 2.0 SUPPLY CURRENT (mA) VDD Voltage vs. Input Voltage 70 60 50 40 30 VEN = 0V R14 = OPEN 20 6 4 VOUT = 1.8V IDD = 10mA 2 10 0.0 0 0 7 4 10 13 16 19 4 7 10 INPUT VOLTAGE (V) 13 16 SWITCHING FREQUENCY (kHz) TOTAL REGULATION (%) FEEDBACK VOLTAGE (V) 0.60 VOUT = 1.8V IOUT = 0A 0.56 0.6% 0.4% 0.2% 0.0% -0.2% -0.4% VOUT = 1.8V IOUT = 0A to 6A -0.6% -0.8% -1.0% 0.54 4 7 10 13 16 7 10 13 16 VEN = VDD IOUT = 0A 0.060 0.040 0.020 0.000 -0.020 -0.040 -0.060 4 7 10 13 INPUT VOLTAGE (V) March 5, 2015 16 19 VOUT = 1.8V IOUT = 2A FREQ = 330kHz 270 10 7 13 16 INPUT VOLTAGE (V) VIN Operating Supply Current vs. Temperature VIN Shutdown Current vs. Temperature 19 100 VIN = 12V VOUT = 1.8V IOUT = 0A 1.6 1.2 0.8 0.4 -0.080 -0.100 300 4 SHUTDOWN CURRENT (µA) SUPPLY CURRENT (mA) 0.080 330 19 2.0 0.100 360 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Enable Input Current vs. Input Voltage 390 240 4 19 19 420 0.8% 0.62 16 Switching Frequency vs. Input Voltage 1.0% 0.64 13 INPUT VOLTAGE (V) Output Regulation vs. Input Voltage 0.66 0.58 10 7 INPUT VOLTAGE (V) Feedback Voltage vs. Input Voltage ENABLE INPUT CURRENT (µA) 4 19 80 60 40 VIN =12V VEN = 0V IOUT = 0A 20 0 0.0 -50 -25 0 25 50 75 TEMPERATURE (°C) 6 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) Revision 1.0 Micrel, Inc. MIC24091/92 Typical Characteristics (Continued) VDD Voltage vs. Temperature 5.5 5.0 5.3 5.2 5.1 VIN = 12V IOUT = 0A 5.0 FALLING 3.0 2.0 HYSTERESIS 25 50 75 100 125 -25 25 0 TEMPERATURE (°C) LOAD REGULATION (%) 0.64 0.62 0.60 VIN = 12V VOUT = 1.8V IOUT = 0A 0.56 50 75 100 -50 125 25 50 75 0.3% 0.3% 0.2% 0.1% 0.0% -0.1% VIN = 12V VOUT = 1.8V IOUT = 0A to 6A -0.2% 100 390 1.84 360 330 300 VIN = 12V VOUT = 1.8V IOUT = 2A fSW = 330kHz -25 0 25 50 75 100 0 25 50 75 TEMPERATURE (°C) March 5, 2015 100 125 100 125 0.2% 0.1% 0.0% -0.1% -0.2% 125 VIN = 5V to 19V VOUT = 1.8V IOUT = 2A -50 -25 0 25 50 75 TEMPERATURE (°C) Output Voltage vs. Temperature Output Voltage vs. Output Current 100 125 1.86 1.82 1.80 1.78 VIN = 12V VOUT = 1.8V IOUT = 0A 1.84 1.82 1.80 1.78 VIN = 12V VOUT = 1.8V 1.76 1.74 1.74 -25 75 TEMPERATURE (°C) 1.76 240 50 -0.3% OUTPUT VOLTAGE (V) 1.86 OUTPUT VOLTAGE (V) 420 25 -0.4% -50 125 Switching Frequency vs. Output Current -50 0 Line Regulation vs. Temperature 0.4% TEMPERATURE (°C) 270 -25 TEMPERATURE (°C) -0.4% 0 VIN =12V VOUT = 1.8V 0.4% -0.3% 0.54 -25 4 Load Regulation vs. Temperature 0.66 -50 6 TEMPERATURE (°C) Feedback Voltage vs. Temperature 0.58 8 0 -50 LINE REGULATION (%) 0 -25 10 1.0 0.0 -50 12 2 4.9 FEEDBACK VOLTAGE (V) 14 4.0 CURRENT LIMIT (A) VDD THRESHOLD (V) VDD VOLTAGE (V) 16 RISING 5.4 SWITCHING FREQUENCY (kHz) Output Current Limit vs. Temperature VDD UVLO Threshold vs. Temperature -50 -25 0 25 50 75 TEMPERATURE (°C) 7 100 125 0 1 2 3 4 5 6 OUTPUT CURRENT (A) Revision 1.0 Micrel, Inc. MIC24091/92 Typical Characteristics (Continued) Switching Frequency vs. Output Current Line Regulation vs. Output Current Feedback Voltage vs. Output Current 420 SWITCHING FREQUENCY (kHz) 1.0% 0.66 0.64 LINE REGULATION (%) FEEDBACK VOLTAGE (V) 0.8% 0.62 0.60 0.58 VIN = 12V VOUT = 1.8V 0.56 0.6% 0.4% 0.2% 0.0% -0.2% -0.4% VIN = 5V to 19V VOUT = 1.8V -0.6% -0.8% 0.54 2 3 4 5 6 0 1 OUTPUT CURRENT (A) 3 4 5 2 3 40 fSW = 330kHz 6 70 60 50 40 80 70 60 50 40 30 fsw = 330kHz 30 5.0V 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 90 fSW = 330kHz 20 20 20 5 Efficiency (VIN = 18V) vs. Output Current EFFICIENCY (%) 50 4 OUTPUT CURRENT (A) 100 80 60 30 VIN = 12V VOUT = 1.8V 270 6 5.0V 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 90 EFFICIENCY (%) EFFICIENCY (%) 2 100 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 70 300 Efficiency (VIN = 12V) vs. Output Current 100 80 330 OUTPUT CURRENT (A) Efficiency (VIN = 5V) vs. Output Current 90 360 240 -1.0% 1 0 390 10 10 10 0 1 2 3 4 5 6 OUTPUT CURRENT (A) March 5, 2015 7 8 0 0 1 2 3 4 5 6 OUTPUT CURRENT (A) 8 7 1 2 3 4 5 6 7 8 8 OUTPUT CURRENT (A) Revision 1.0 Micrel, Inc. MIC24091/92 Functional Characteristics March 5, 2015 9 Revision 1.0 Micrel, Inc. MIC24091/92 Functional Characteristics (Continued) March 5, 2015 10 Revision 1.0 Micrel, Inc. MIC24091/92 Functional Characteristics (Continued) March 5, 2015 11 Revision 1.0 Micrel, Inc. MIC24091/92 Functional Diagram March 5, 2015 12 Revision 1.0 Micrel, Inc. MIC24091/92 Functional Description The maximum duty cycle is obtained from the 300ns tOFF(min): The MIC24091/92 is an adaptive ON-time synchronous step-down DC-to-DC regulator with an internal 5V linear regulator and a power good (PG) output. It is designed to operate over a wide input voltage range from 4.5V to 19V and provides a regulated output voltage at up to 6A of output current. An adaptive ON-time control scheme is employed in to obtain a constant switching frequency and to simplify the control compensation. Overcurrent protection is implemented without the use of an external sense resistor and current limit threshold is programmable. The device includes an internal soft-start function which reduces the power supply input surge current at start-up by controlling the output voltage rise time. The MIC24091/92 integrates Micrel’s high performance Verticla DMOS MOSFETs for achieving high system performance. D MAX = 300ns tS Eq. 2 The actual ON-time and resulting switching frequency will vary with the part-to-part variation in the rise and fall times of the internal MOSFETs, the output load current, and variations in the VDD voltage. Also, the minimum tON results in a lower switching frequency in high VIN to VOUT applications, such as 18V to 1.0V. The minimum tON measured on the MIC24091/92 evaluation board is about 100ns. During load transients, the switching frequency is changed due to the varying OFF-time. To illustrate the control loop operation, we will analyze both the steady-state and load transient scenarios. Figure 1 shows the MIC24091/92 control loop timing during steady-state operation. During steady-state, the gm amplifier senses the feedback voltage ripple, which is proportional to the output voltage ripple and the inductor current ripple, to trigger the ON-time period. The ON-time is predetermined by the tON estimator. The termination of the OFF-time is controlled by the feedback voltage. At the valley of the feedback voltage ripple, which occurs when VFB falls below VREF, the OFF period ends and the next ON-time period is triggered through the control logic circuitry. Eq. 1 where VOUT is the output voltage and VIN is the power stage input voltage. At the end of the ON-time period, the internal high-side driver turns off the high-side MOSFET and the low-side driver turns on the low-side MOSFET. The OFF-time period length depends upon the feedback voltage in most cases. When the feedback voltage decreases and the output of the gm amplifier is below 0.6V, the ON-time period is triggered and the OFF-time period ends. If the OFF-time period determined by the feedback voltage is less than the minimum OFF-time tOFF(min), which is about 300ns, the MIC24091/92 control logic will apply the tOFF(min) instead. tOFF(min) is required to maintain enough energy in the boost capacitor (CBST) to drive the high-side MOSFET. March 5, 2015 = 1− It is not recommended to use MIC24091/92 with a OFFtime close to tOFF(min) during steady-state operation. Also, as VOUT increases, the internal ripple injection will increase and reduce the line regulation performance. Therefore, the maximum output voltage of the MIC24091/92 should be limited to 5.5V and the maximum external ripple injection should be limited to 200mV. Please refer to “Setting Output Voltage” subsection in Application Information for more details. Continuous Mode In continuous mode, the output voltage is sensed by the MIC24091/92 feedback pin FB via the voltage divider R1 and R2, and compared to a 0.6V reference voltage VREF at the error comparator through a low gain transconductance (gm) amplifier. If the feedback voltage decreases and the output of the gm amplifier are below 0.6V, then the error comparator will trigger the control logic and generate an ON-time period. The ON-time period length is predetermined by the “FIXED tON ESTIMATION” circuitry: VOUT VIN × 800kHz tS where tS = 1/800kHz = 1.25µs. Theory of Operation The MIC24091/92 operates in a continuous mode as shown in the Functional Diagram. t ON(ESTIMATED) = t S − t OFF(MIN) 13 Revision 1.0 Micrel, Inc. MIC24091/92 Unlike true current-mode control, the MIC24091/92 uses the output voltage ripple to trigger an ON-time period. The output voltage ripple is proportional to the inductor current ripple if the ESR of the output capacitor is large enough. The MIC24091/92 control loop has the advantage of eliminating the need for slope compensation. In order to meet the stability requirements, the MIC24091/92 feedback voltage ripple should be in phase with the inductor current ripple and large enough to be sensed by the gm amplifier and the error comparator. The recommended feedback voltage ripple is 20mV~100mV. If a low-ESR output capacitor is selected, then the feedback voltage ripple may be too small to be sensed by the gm amplifier and the error comparator. Also, the output voltage ripple and the feedback voltage ripple are not necessarily in phase with the inductor current ripple if the ESR of the output capacitor is very low. In these cases, ripple injection is required to ensure proper operation. Please refer to “Ripple Injection” subsection in Application Information for more details about the ripple injection technique. Figure 1. MIC24091/92 Control Loop Timing Figure 2 shows the operation of the MIC24091/92 during a load transient. The output voltage drops due to the sudden load increase, which causes the VFB to be less than VREF. This will cause the error comparator to trigger an ON-time period. At the end of the ON-time period, a minimum OFF-time tOFF(min) is generated to charge CBST since the feedback voltage is still below VREF. Then, the next ON-time period is triggered due to the low feedback voltage. Therefore, the switching frequency changes during the load transient, but returns to the nominal fixed frequency once the output has stabilized at the new load current level. With the varying duty cycle and switching frequency, the output recovery time is fast and the output voltage deviation is small in MIC24091/92 converter. VDD Regulator The MIC24091/92 provides a 5V regulated output for input voltage VIN ranging from 5.5V to 19V. When VIN < 5.5V, VDD should be tied to PVIN pins to bypass the internal linear regulator. Soft-Start Soft-start reduces the power supply input surge current at startup by controlling the output voltage rise time. The input surge appears while the output capacitor is charged up. A slower output rise time will draw a lower input surge current. The MIC24091/92 implements an internal digital soft-start by making the 0.6V reference voltage VREF ramp from 0 to 100% in about 7ms with 9.7mV steps. Therefore, the output voltage is controlled to increase slowly by a staircase VFB ramp. Once the soft-start cycle ends, the related circuitry is disabled to reduce current consumption. VDD must be powered up at the same time or after VIN to make the soft-start function correctly. Figure 2. MIC24091/92 Load Transient Response March 5, 2015 14 Revision 1.0 Micrel, Inc. MIC24091/92 Current Limit The MIC24091/92 uses the RDS(ON) of the internal lowside power MOSFET to sense over-current conditions. This method will avoid adding cost, board space and power losses taken by a discrete current sense resistor. The low-side MOSFET is used because it displays much lower parasitic oscillations during switching than the highside MOSFET. The short circuit current limit can be programmed by using the formula illustrated in Equation 3: R CL = (ICLIM − Δ PP × 0.5) × R DS(ON) + VCL ICL Eq. 3 In each switching cycle of the MIC24091/92 converter, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. If the peak inductor current is greater than 11A, then the MIC24091/92 turns off the high-side MOSFET and a soft-start sequence is triggered. This mode of operation is called “hiccup mode” and its purpose is to protect the downstream load in case of a hard short. The current limit can be programmed by connecting a resistor from ILIM to SW node as shown in Figure 3. Where ISH = Desired current limit ΔPP = Inductor current peak-to-peak RDS (ON) = On-resistance of low-side power MOSFET VCL = Current-limit threshold, the typical value is 14mV in EC table ICL = Current-limit source current, the typical value is 36µA. Setting the Switching Frequency The MIC24091/92are adjustable-frequency, synchronous buck controllers featuring unique adaptive on-time control architecture. The switching frequency can be adjusted between 200kHz and 800kHz by changing the resistor divider network consisting of R19 and R20. Figure 3. MIC24091/92 Current Limiting Circuit The small capacitor (CCL) connected from ILIM pin to PGND filters the switching node ringing during the off time allowing a better short limit measurement. The time constant created by RCL and CCL should be much less than the minimum off time. Figure 4. Switching Frequency Adjustment The VCL drop allows programming of short limit through the value of the resistor (RCL), If the absolute value of the voltage drop on the bottom FET is greater than VCL’ in that case the V(ILIM) is lower than PGND and a short circuit event is triggered. A hiccup cycle to treat the short event is generated. The hiccup sequence including the soft start reduces the stress on the switching FETs and protects the load and supply for severe short conditions. March 5, 2015 Equation 4 gives the estimated switching frequency: f SW_ADJ = f O × R20 R19 + R20 Eq. 4 Where fO = Switching frequency when R19 is 100kΩ and R20 being open, fO is typically 800kHz. 15 Revision 1.0 Micrel, Inc. MIC24091/92 Power Good (PG) The power good (PG) pin is an open drain output which indicates logic high when the output is nominally 92% of its steady state voltage. A pull-up resistor of more than 10kΩ should be connected from PG to VDD. MOSFET Gate Drive The Functional Diagram shows a bootstrap circuit, consisting of D1 (a Schottky diode is recommended) and CBST. This circuit supplies energy to the high-side drive circuit. Capacitor CBST is charged, while the low-side MOSFET is on, and the voltage on the SW pin is approximately 0V. When the high-side MOSFET driver is turned on, energy from CBST is used to turn the MOSFET on. As the high-side MOSFET turns on, the voltage on the SW pin increases to approximately VIN. Diode D1 is reverse biased and CBST floats high while continuing to keep the high-side MOSFET on. The bias current of the high-side driver is less than 10mA so a 0.1μF to 1μF is sufficient to hold the gate voltage with minimal droop for the power stroke (high-side switching) cycle, i.e. ΔBST = 10mA x 1.67μs/0.1μF = 167mV. When the low-side MOSFET is turned back on, CBST is recharged through D1. A small resistor RG, which is in series with CBST, can be used to slow down the turn-on time of the high-side Nchannel MOSFET. The drive voltage is derived from the VDD supply voltage. The nominal low-side gate drive voltage is VDD and the nominal high-side gate drive voltage is approximately VDD – VDIODE, where VDIODE is the voltage drop across D1. An approximate 30ns delay between the high-side and lowside driver transitions is used to prevent current from simultaneously flowing unimpeded through both MOSFETs. March 5, 2015 16 Revision 1.0 Micrel, Inc. MIC24091/92 Application Information Inductor Selection Values for inductance, peak, and RMS currents are required to select the output inductor. The input and output voltages and the inductance value determine the peak-to-peak inductor ripple current. Generally, higher inductance values are used with higher input voltages. Larger peak-to-peak ripple currents will increase the power dissipation in the inductor and MOSFETs. Larger output ripple currents will also require more output capacitance to smooth out the larger ripple current. Smaller peak-to-peak ripple currents require a larger inductance value and therefore a larger and more expensive inductor. A good compromise between size, loss and cost is to set the inductor ripple current to be equal to 20% of the maximum output current. The inductance value is calculated in Equation 3. L= VOUT × ( VIN(MAX ) − VOUT ) VIN(MAX ) × f SW × 20% × IOUT(MAX ) The RMS inductor current is used to calculate the I2R losses in the inductor. 2 IL(RMS ) = IOUT(MAX ) + Eq. 3 fSW = switching frequency, 600kHz 20% = ratio of AC ripple current to DC output current VIN(MAX) = maximum power stage input voltage The peak-to-peak inductor current ripple is: VOUT × ( VIN(MAX ) − VOUT ) VIN(MAX ) × f SW × L 2 12 Eq. 6 Maximizing efficiency requires the proper selection of core material and minimizing the winding resistance. The high-frequency operation of the MIC24091/92 requires the use of ferrite materials for all but the most cost sensitive applications. Lower cost iron powder cores may be used but the increase in core loss will reduce the efficiency of the power supply. This is especially noticeable at low output power. The winding resistance decreases efficiency at the higher output current levels. The winding resistance must be minimized although this usually comes at the expense of a larger inductor. The power dissipated in the inductor is equal to the sum of the core and copper losses. At higher output loads, the core losses are usually insignificant and can be ignored. At lower output currents, the core losses can be a significant contributor. Core loss information is usually available from the magnetics vendor. Copper loss in the inductor is calculated by Equation 7: where: ∆IL(PP ) = ∆IL(PP ) PINDUCTOR( CU) = IL(RMS Eq. 4 2 ) × R WINDING Eq. 7 The resistance of the copper wire, RWINDING, increases with the temperature. The value of the winding resistance used should be at the operating temperature. The peak inductor current is equal to the average output current plus one half of the peak-to-peak inductor current ripple. PWINDING (Ht ) = R WINDING ( 20°C ) × (1 + 0.0042 × (TH − T20°C )) Eq. 8 IL(PK ) = IOUT(MAX ) + 0.5 × ∆IL(PP ) Eq. 5 where: TH = temperature of wire under full load T20°C = ambient temperature RWINDING(20°C) = room temperature winding resistance (usually specified by the manufacturer) March 5, 2015 17 Revision 1.0 Micrel, Inc. MIC24091/92 Output Capacitor Selection The type of the output capacitor is usually determined by its equivalent series resistance (ESR). Voltage and RMS current capability are two other important factors for selecting the output capacitor. Recommended capacitor types are ceramic, low-ESR aluminum electrolytic, OSCON and POSCAP. The output capacitor’s ESR is usually the main cause of the output ripple. The output capacitor ESR also affects the control loop from a stability point of view. If low-ESR capacitors, such as ceramic capacitors, are selected as the output capacitors, a ripple injection method should be applied to provide the enough feedback voltage ripple. Please refer to the “Ripple Injection” subsection for more details. The voltage rating of the capacitor should be twice the output voltage for a tantalum and 20% greater for aluminum electrolytic or OS-CON. The output capacitor RMS current is calculated in Equation 11: The maximum value of ESR is calculated: ICOUT (RMS ) = ESR COUT ≤ ∆VOUT(PP ) ∆IL(PP ) Eq. 11 12 Eq. 9 ∆IL(PP ) The power dissipated in the output capacitor is: where: PDISS( COUT ) = ICOUT (RMS ) × ESR COUT ΔVOUT(pp) = peak-to-peak output voltage ripple Eq. 12 ΔIL(PP) = peak-to-peak inductor current ripple Input Capacitor Selection The input capacitor for the power stage input VIN should be selected for ripple current rating and voltage rating. Tantalum input capacitors may fail when subjected to high inrush currents, caused by turning the input supply on. A tantalum input capacitor’s voltage rating should be at least two times the maximum input voltage to maximize reliability. Aluminum electrolytic, OS-CON, and multilayer polymer film capacitors can handle the higher inrush currents without voltage de-rating. The input voltage ripple will primarily depend on the input capacitor’s ESR. The peak input current is equal to the peak inductor current, so: The total output ripple is a combination of the ESR and output capacitance. The total ripple is calculated in Equation 10: 2 ∆IL(PP ) + ∆IL(PP ) × ESR C ∆VOUT(PP ) = OUT C OUT ×f SW × 8 ( )2 Eq. 10 where: ∆VIN = IL(PK ) × ESR CIN D = duty cycle Eq. 13 COUT = output capacitance value fSW = switching frequency The input capacitor must be rated for the input current ripple. The RMS value of input capacitor current is determined at the maximum output current. Assuming the peak-to-peak inductor current ripple is low: As described in the “Theory of Operation” subsection in Functional Description, the MIC24091/92 requires at least 20mV peak-to-peak ripple at the FB pin to make the gm amplifier and the error comparator behave properly. Also, the output voltage ripple should be in phase with the inductor current. Therefore, the output voltage ripple caused by the output capacitors value should be much smaller than the ripple caused by the output capacitor ESR. March 5, 2015 ICIN (RMS) ≈ IOUT(MAX ) × D × (1 − D) 18 Eq. 14 Revision 1.0 Micrel, Inc. MIC24091/92 The power dissipated in the input capacitor is: PDISS( CIN ) = ICIN (RMS ) × ESR CIN Eq. 15 Ripple Injection The VFB ripple required for proper operation of the MIC24091/92 gm amplifier and error comparator is 20mV to 100mV. However, the output voltage ripple is generally designed as 1% to 2% of the output voltage. For a low output voltage, such as a 1V, the output voltage ripple is only 10mV to 20mV, and the feedback voltage ripple is less than 20mV. If the feedback voltage ripple is so small that the gm amplifier and error comparator can’t sense it, then the MIC24091/92 will lose control and the output voltage is not regulated. In order to have some amount of VFB ripple, a ripple injection method is applied for low output voltage ripple applications. Figure 5. Enough Ripple at FB Figure 6. Inadequate Ripple at FB The applications are divided into three situations according to the amount of the feedback voltage ripple: Enough ripple at the feedback voltage due to the large ESR of the output capacitors. As shown in Figure 5, the converter is stable without any ripple injection. The feedback voltage ripple is: ∆VFB(PP ) = R2 × ESR COUT × ∆IL(PP ) R1 + R2 Eq. 16 Figure 7. Invisible Ripple at FB where ΔIL(pp) is the peak-to-peak value of the inductor current ripple. In this situation, the output voltage ripple is less than 20mV. Therefore, additional ripple is injected into the FB pin from the switching node SW via a resistor Rinj and a capacitor Cinj, as shown in Figure 7. The injected ripple is: Inadequate ripple at the feedback voltage due to the small ESR of the output capacitors. The output voltage ripple is fed into the FB pin through a feedforward capacitor Cff in this situation, as shown in Figure 6. The typical Cff value is between 1nF and 100nF. With the feedforward capacitor, the feedback voltage ripple is very close to the output voltage ripple: ∆VFB(PP ) ≈ ESR × ∆IL(PP ) ∆VFB(PP ) = VIN × K ∆IV × ∆ × (1 − ∆) × K DIV = R1 / R2 R INJ + R1 // R2 1 f SW × τ Eq. 18 Eq. 19 Eq. 17 where: VIN = Power stage input voltage Virtually no ripple at the FB pin voltage due to the verylow ESR of the output capacitors. D = Duty cycle fSW = Switching frequency τ = (R1//R2//RINJ) × Cff March 5, 2015 19 Revision 1.0 Micrel, Inc. MIC24091/92 A typical value of R1 can be between 3kΩ and 10kΩ. If R1 is too large, it may allow noise to be introduced into the voltage feedback loop. If R1 is too small, it will decrease the efficiency of the power supply, especially at light loads. Once R1 is selected, R2 can be calculated using: In Equations 18 and 19, it is assumed that the time constant associated with Cff must be much greater than the switching period: 1 T = << 1 fsw × τ τ Eq. 20 R2 = If the voltage divider resistors R1 and R2 are in the kΩ range, a Cff of 1nF to 100nF can easily satisfy the large time constant requirements. Also, a 100nF injection capacitor Cinj is used in order to be considered as short for a wide range of the frequencies. VFB × R1 VOUT − VFB Eq. 24 The process of sizing the ripple injection resistor and capacitors is: Step 1. Select Cff to feed all output ripples into the feedback pin and make sure the large time constant assumption is satisfied. Typical choice of Cff is 1nF to 100nF if R1 and R2 are in kΩ range. Step 2. Select Rinj according to the expected feedback voltage ripple using Equation 19. K DIV = DVFB(PP) VIN f ×τ × SW D × (1 − D) Figure 8. Voltage-Divider Configuration In addition to the external ripple injection added at the FB pin, internal ripple injection is added at the inverting input of the comparator inside the MIC24091, as shown in Figure 9. The inverting input voltage VINJ is clamped to 1.2V. As VOUT is increased, the swing of VINJ will be clamped. The clamped VINJ reduces the line regulation because it is reflected as a DC error on the FB terminal. Therefore, the maximum output voltage of the MIC24091/92 should be limited to 5.5V to avoid this problem. Eq. 21 Then the value of Rinj is obtained as: 1 Rinj = (R1 // R 2) × − 1 K DIV Eq. 22 Step 3. Select Cinj as 100nF, which could be considered as short for a wide range of the frequencies. Setting Output Voltage The MIC24091/92 requires two resistors to set the output voltage as shown in Figure 8. The output voltage is determined by Equation 23: R1 VOUT = VFB × 1 + 2 R Eq. 23 Figure 9. Internal Ripple Injection where VFB = 0.6V. March 5, 2015 20 Revision 1.0 Micrel, Inc. MIC24091/92 Output Overvoltage Protection (OVP) The MIC24091/92 has a dedicated pin for overvoltage protection (OVP). The OVP pin senses the output voltage through a voltage divider. If this voltage is higher than the reference voltage, the overvoltage protection engages and MMIC24091/92 turn off high side and low side FETs. Two methods of temperature measurement are using a smaller thermal couple wire or an infrared thermometer. If a thermal couple wire is used, it must be constructed of 36 gauge wire or higher then (smaller wire size) to minimize the wire heat-sinking effect. In addition, the thermal couple tip must be covered in either thermal grease or thermal glue to make sure that the thermal couple junction is making good contact with the case of the IC. Omega brand thermal couple (5SC-TT-K-36-36) is adequate for most applications. This OVP function typically protects against open feedback loop or VFB short-to-GND. This will protect the costly load from damaging the DC-to-DC converter. The OVP level can be programmed through resistive divider at OVP pin as follows. Select R4 same as lower feedback resistor. R1 can be calculated based upon required OVP level as illustrated in Equation 24 and 10. − 0.6 V V R1 = R 2 × OUT 0.6 V Wherever possible, an infrared thermometer is recommended. The measurement spot size of most infrared thermometers is too large for an accurate reading on a small form factor ICs. However, an IR thermometer from Optris has a 1mm spot size, which makes it a good choice for measuring the hottest point on the case. An optional stand makes it easy to hold the beam on the IC for long periods of time. Eq. 24 Figure 10. OVP Programming After the OVP fault is triggered, there will be shut down and latched off. It is required to cycle either VIN or EN for enabling the converter. Thermal Measurements Measuring the IC’s case temperature is recommended to insure it is within its operating limits. Although this might seem like a very elementary task, it is easy to get erroneous results. The most common mistake is to use the standard thermal couple that comes with a thermal meter. This thermal couple wire gauge is large, typically 22 gauge, and behaves like a heatsink, resulting in a lower case measurement. March 5, 2015 21 Revision 1.0 Micrel, Inc. MIC24091/92 PCB Layout Guidelines Warning!!! To minimize EMI and output noise, follow these layout recommendations. Inductor PCB Layout is critical to achieve reliable, stable and efficient performance. A ground plane is required to control EMI and minimize the inductance in power, signal and return paths. • Keep the inductor connection to the switch node (SW) short. • Do not route any digital lines underneath or close to the inductor. • Keep the switch node (SW) away from the feedback (FB) pin. • The CS pin should be connected directly to the SW pin to accurate sense the voltage across the low-side MOSFET. • To minimize noise, place a ground plane underneath the inductor. • The inductor can be placed on the opposite side of the PCB with respect to the IC. It does not matter whether the IC or inductor is on the top or bottom as long as there is enough air flow to keep the power components within their temperature limits. The input and output capacitors must be placed on the same side of the board as the IC. The following guidelines should be followed to insure proper operation of the MIC24091 regulator: IC • A 2.2µF ceramic capacitor, which is connected to the PVDD pin, must be located right at the IC. The PVDD pin is very noise sensitive and placement of the capacitor is very critical. Use wide traces to connect to the PVDD and PGND pins. • A 1µF ceramic capacitor must be placed right between VDD and the signal ground SGND. The SGND must be connected directly to the ground planes. Do not route the SGND pin to the PGND Pad on the top layer. • Place the IC close to the point-of-load (POL). • Use fat traces to route the input and output power lines. • Signal and power grounds should be kept separate and connected at only one location. Output Capacitor • Use a wide trace to connect the output capacitor ground terminal to the input capacitor ground terminal. • Phase margin will change as the output capacitor value and ESR changes. Contact the factory if the output capacitor is different from what is shown in the BOM. • The feedback trace should be separate from the power trace and connected as close as possible to the output capacitor. Sensing a long high-current load trace can degrade the DC load regulation. Input Capacitor • Place the input capacitor next. • Place the input capacitors on the same side of the board and as close to the IC as possible. • Keep both the PVIN pin and PGND connections short. • Place several vias to the ground plane close to the input capacitor ground terminal. • Use either X7R or X5R dielectric input capacitors. Do not use Y5V or Z5U type capacitors. • Do not replace the ceramic input capacitor with any other type of capacitor. Any type of capacitor can be placed in parallel with the input capacitor. • If a Tantalum input capacitor is placed in parallel with the input capacitor, it must be recommended for switching regulator applications and the operating voltage must be derated by 50%. • In “Hot-Plug” applications, a Tantalum or Electrolytic bypass capacitor must be used to limit the over-voltage spike seen on the input supply with power is suddenly applied. March 5, 2015 Optional RC Snubber • Place the RC snubber on either side of the board and as close to the SW pin as possible. 22 Revision 1.0 Micrel, Inc. MIC24091/92 Package Information and Recommended Landing Pattern(8) 30-Pin 5mm × 6mm QFN (MM) Note: 8. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. March 5, 2015 23 Revision 1.0 Micrel, Inc. MIC24091/92 Package Information and Recommended Landing Pattern(8) (Continued) 30-Pin 5mm × 6mm QFN (MM) March 5, 2015 24 Revision 1.0 Micrel, Inc. MIC24091/92 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. 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A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2015 Micrel, Incorporated. March 5, 2015 25 Revision 1.0