QS5U28 Transistor Small switching (−20V, −2.0A) QS5U28 zExternal dimensions (Unit : mm) 2.8 TSMT5 0.3~0.6 1.0MAX (4) 0.85 0.7 0~0.1 (1)Gate (2)Source (3)Anode (4)Cathode (5)Drain (3) (2) 0.4 (1) (5) 0.95 0.95 1.9 2.9 1.6 0.16 zFeatures 1) The QS5U28 conbines Pch Treueh MOSFET with a Schottky barrier diode in a single TSMT5 package. 2) Pch Treueh MOSFET have a low on-state resisternce with a fast switching. 3) Pch Treueh MOSFET is neucted a low voltage drive (2.5V). 4) The independently connected Schottky barrier diode have a low forward voltage. Each lead has same dimensions Abbreviated symbol : U28 zApplications load switch, DC/DC conversion zEquivalent circuit zStructure •Silicon P-channel MOS FET •Schottky Barrier DIODE (5) (4) ∗2 zPackaging specifications Package Type Code Basic ordering unit (pieces) QS5U28 Taping TR ∗1 3000 (1) ∗1 ESD protection diode ∗2 Body diode (2) (3) (1)Gate (2)Source (3)Anode (4)Cathode (5)Drain ∗ A protection diode has been buitt in between the gate and the source to protect against static electricity when the product is in use. Use the protection circuit when rated voltages are exceeded. 1/4 QS5U28 Transistor zAbsolute maximum ratings (Ta=25°C) <MOSFET> Parameter Drain-source voltage Gate-source voltage Channel temperature Power dispation Symbol VDSS VGSS ID IDP IS ISP Tch PD Limits −20 ±12 ±2.0 ±8.0 −1.0 −8.0 150 0.9 Unit V V A A ∗1 A A ∗1 °C W /ELEMENT ∗3 Parameter Repetitive peak reverse voltage Reverse voltage Forward current Forward current surge peak Junction temperature Symbol VRM VR IF IFSM Tj Limits 25 20 1.0 3.0 150 Unit V V A A ∗2 °C PD 0.7 W /ELEMENT ∗3 Symbol Limits PD Tstg 1.25 −55 to +150 Drain current Source current (Body diode) Continuous Pulsed Continuous Pulsed <Di > Power dispation <MOSFET AND Di > Parameter Total power dispation Range of strage temperature Unit W / TOTAL ∗3 °C ∗1 Pw≤10µs, Duty cycle≤1% ∗2 60Hz • 1cyc. ∗3 Mounted on a ceramic board. zElectrical characteristics (Ta=25°C) <MOSFET> Parameter Symbol Min. Gate-source leakage IGSS − Drain-source breakdown voltage V(BR) DSS −20 Zero gate voltage drain current IDSS − Gate threshold voltage VGS (th) −0.7 − Static drain-source on-starte RDS (on) − resistance − Forward transfer admittance 1.6 Yfs Input capacitance Ciss − Output capacitance Coss − Reverse transfer capacitance Crss − Tum-on delay time td (on) − Rise time − tr Tum-off delay time td (off) − Fall time − tf Typ. − − − − 90 97 175 − 450 70 52 10 16 32 15 Max. ±10 − −1 −2.0 125 135 245 − − − − − − − − Unit µA V µA V mΩ mΩ mΩ S pF pF pF ns ns ns ns Total gate charge Qg − 4.8 − nC Gate-source charge Qgs − 1.0 − nC Gate-drain charge Qgd − 1.3 − nC Conditions VGS= ±12V, VDS= 0V ID= −1mA, VGS= 0V VDS= −20V, VGS= 0V VDS= −10V, ID= −1mA ID= −2A, VGS= −4.5V ID= −2A, VGS= −4.0V ID= −1A, VGS= −2.5V VDS= −10V, ID= −1A ∗ VDS= −10V VGS= 0V f=1MHz VDD −15V VGS= −4.5V ID= −1A RL 15Ω RG= 10Ω VDD −15V VGS= −4.5V ID= −2A RL 7.5Ω RG= 10Ω Symbol VSD Min. − Typ. − Max. −1.2 Unit V Conditions IS= −1.0V , VGS= 0V Symbol VF Min. − Typ. − Max. 0.45 Unit V IS= −1.0V IR − − 200 µA VR= 20V <MOSFET> Body diode (Source-drain) Parameter Forward voltage ∗ Pulsed <Di> Parameter Forward voltage Reverse leakage Conditions 2/4 QS5U28 Transistor 1000 STATIC DRAIN-SOURCE ON-STATE RESISTANCE : RDS (on) (mΩ) VDS= −10V Pulsed 1 Ta=125°C 75°C 25°C −25°C 0.1 0.01 0.001 0 0.5 1.0 1.5 2.0 2.5 3.0 VGS= −4.5V Pulsed Ta=125°C 75°C 25°C −25°C 100 10 0.01 1 VGS= −4V Pulsed Ta=125°C 75°C 25°C −25°C 100 10 10 0.01 0.1 1 10 Fig.1 Typical Transfer Characteristics Fig.2 Static Drain-Source On-State Resistance vs. Drain Current (Ι) Fig.3 Static Drain-Source On-State Resistance vs. Drain Current (ΙΙ) VGS= −2.5V Pulsed 100 Ta=125°C 75°C 25°C −25°C 10 0.01 0.1 1 500 400 300 200 100 0 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 6 1000 CAPACITANCE : C (pF) Ta=125°C 75°C 25°C −25°C 0.1 0.01 4 8 10 12 Ta=25°C Pulsed 100 VGS=−2.5V −4.0V −4.5V 10 0.01 1.6 100 Coss Crss 10 0.01 0.1 1 10 100 1 10 Fig.6 Static Drain-Source On-State Resistance vs. Drain Current 1000 Ta=25°C f=1MHZ VGS=0V Ciss 0.1 DRAIN CURRENT : −ID (A) Fig.5 Static Drain-Source On-State Resistance vs. Gate-Source Voltage VGS=0V Pulsed 1 2 1000 GATE-SOURCE VOLTAGE : −VGS (V) Fig.4 Static Drain-Source On-State Resistance vs. Drain Current (ΙΙΙ) 10 Ta=25°C Pulsed ID= −1A ID= −2A SWITCHING TIME : t (ns) 1000 STATIC DRAIN-SOURCE ON-STATE RESISTANCE : RDS (on) (mΩ) DRAIN CURRENT : −ID (A) STATIC DRAIN-SOURCE ON-STATE RESISTANCE : RDS (on) (mΩ) DRAIN CURRENT : −ID (A) DRAIN CURRENT : −ID (A) REVERCE DRAIN CURRENT : −IDR (A) 0.1 1000 GATE-SOURCE VOLTAGE : −VGS (V) STATIC DRAIN-SOURCE ON-STATE RESISTANCE : RDS (on) (mΩ) DRAIN CURRENT : −ID (A) 10 STATIC DRAIN-SOURCE ON-STATE RESISTANCE : RDS (on) (mΩ) zElectrical characteristic curves Ta=25°C VDD= −15V VGS= −4.5V RG=10Ω Pulsed tf 100 td(off) td(on) 10 tr 1 0.01 0.1 1 10 SOURCE-DRAIN VOLTAGE : −VSD (V) DRAIN-SOURCE VOLTAGE : −VDS (V) DRAIN CURRENT : −ID (A) Fig.7 Reverse Drain Current vs. Source-Drain Voltage Fig.8 Typical Capacitance vs. Drain-Source Voltage Fig.9 Switching Characteristics 3/4 QS5U28 GATE-SOURCE VOLTAGE : −VGS (V) Transistor 8 Ta=25°C VDD= −15V ID= −2A RG=10Ω Pulsed 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 TOTAL GATE CHARGE : Qg (nC) Fig.10 Dynamic Input Characteristics zMeasurement circuits Pulse Width VGS ID VDS VGS 10% 50% 90% RL D.U.T. 50% 10% 10% RG VDD VDS 90% td(on) tr ton Fig.11 Switching Time Measurement Circuit 90% td(off) tr toff Fig.12 Switching Waveforms VG VGS ID VDS RL IG(Const) D.U.T. Qg VGS Qgs RG Qgd VDD Charge Fig.13 Gate Charge Measurement Circuit Fig.14 Gate Charge Waveforms 4/4 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.1