FDMS8090 - Fairchild Semiconductor

FDMS8090
PowerTrench® Symmetrical Dual
100 V N-Channel MOSFET
Features
General Description
This device includes two fast switching (Qgd minimized) 100V
N-Channel MOSFETs in a dual Power 56 (5 mm X 6 mm MLP)
package. The package is enhanced for exceptional thermal
performance.
„ Max rDS(on) = 13 mΩ at VGS = 10 V, ID = 10 A
„ Max rDS(on) = 20 mΩ at VGS = 6 V, ID = 8 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
Applications
„ 100% UIL tested
„ Bridge Topologies
„ RoHS Compliant
„ Synchronous Rectifier Pair
„ Motor Drives
Bottom
Top
S2 S2 S2 G2
D2
Pin 1
D1
G1
1
S1
2
S1
3
S1 S1 S1 G1
8 G2
7
S2
6 S2
Q1
S1
Power 56
Contact to D1 Contact to D2
(backside)
(backside)
Q2
4
5 S2
Pin 1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
TC = 25 °C
-Continuous
TA = 25 °C
ID
-Pulsed
Single Pulse Avalanche Energy
EAS
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Ratings
100
Units
V
±20
V
40
(Note 1a)
10
(Note 4)
120
(Note 3)
253
59
(Note 1a)
Operating and Storage Junction Temperature Range
2.2
-55 to +150
A
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
2.1
(Note 1a)
55
°C/W
Package Marking and Ordering Information
Device Marking
FDMS8090
Device
FDMS8090
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
Package
Power 56
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
April 2013
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 80 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
4.0
V
100
V
70
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
2.0
3.0
-10
mV/°C
VGS = 10 V, ID = 10 A
11
13
VGS = 6 V, ID = 8 A
15
20
VGS = 10 V, ID = 10 A, TJ = 125 °C
18
20
VDS = 10 V, ID = 10 A
24
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 50 V, VGS = 0 V,
f = 1 MHz
0.1
1285
1800
pF
301
400
pF
16
28
pF
1.7
3.5
Ω
ns
Switching Characteristics
td(on)
Turn-On Delay Time
10.6
21
tr
Rise Time
4.6
10
ns
td(off)
Turn-Off Delay Time
17.4
31
ns
VDD = 50 V, ID = 10 A,
VGS = 10 V, RGEN = 6 Ω
tf
Fall Time
Qg
Total Gate Charge
VGS = 0 V to 10 V
VGS = 0 V to 5 V
Qg
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 50 V,
ID = 10 A
4
10
ns
19
27
nC
10
15
nC
6.1
nC
4.1
nC
Drain-Source Diode Characteristics
VSD
Source-Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 2 A
(Note 2)
0.7
1.2
VGS = 0 V, IS = 10 A
(Note 2)
0.8
1.3
IF = 10 A, di/dt = 100 A/μs
V
49
78
ns
54
86
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 55 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 138 °C/W when mounted on a
minimum pad of 2 oz copper.
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 253 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 13 A, VDD = 100 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 29 A.
4. Pulsed Id limited by junction temperature,td<=10uS. Please refer to SOA curve for more details.
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
2
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
Electrical Characteristics TJ = 25 °C unless otherwise noted
120
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
4.5
VGS = 10 V
ID, DRAIN CURRENT (A)
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
80
VGS = 7 V
60
VGS = 6 V
40
VGS = 5.5 V
20
VGS = 5 V
0
0
1
2
3
4
VGS = 5 V
3.6
VGS = 5.5 V
2.7
VGS = 6 V
1.8
VGS = 7 V
0.9
0.0
5
0
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
80
100
120
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
60
ID = 10 A
VGS = 10 V
rDS(on), DRAIN TO
1.8
1.6
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
2.0
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
40
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
120
30
TJ = 125 oC
20
10
TJ = 25 oC
IS, REVERSE DRAIN CURRENT (A)
60
40
TJ = 25 oC
20
TJ = -55 oC
0
4
6
8
200
100
7
8
9
10
VGS = 0 V
10
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
10
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
6
Figure 4. On-Resistance vs Gate to
Source Voltage
80
TJ = 150 oC
5
VGS, GATE TO SOURCE VOLTAGE (V)
VDS = 5 V
2
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
40
4
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
100
ID = 10 A
50
0
-50
Figure 3. Normalized On Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
Typical Characteristics TJ = 25 °C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE (V)
10
10000
ID = 10 A
Ciss
8
CAPACITANCE (pF)
VDD = 50 V
VDD = 25 V
6
VDD = 75 V
4
1000
Coss
100
Crss
10
2
0
0
4
8
12
16
f = 1 MHz
VGS = 0 V
1
0.1
20
Figure 7. Gate Charge Characteristics
100
60
ID, DRAIN CURRENT (A)
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
48
VGS = 10 V
36
Limited by Package
24
VGS = 6 V
12
o
RθJC = 2.1 C/W
1
0.01
0.1
1
10
0
25
100
50
125
150
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
200
100
P(PK), PEAK TRANSIENT POWER (W)
10000
100 us
10
1
1 ms
10 ms
100 ms
1s
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
0.01
100
o
Figure 9. Unclamped Inductive
Switching Capability
0.1
75
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
10
Figure 8. Capacitance vs Drain
to Source Voltage
100
IAS, AVALANCHE CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
RθJA = 138 oC/W
TA = 25 oC
0.001
0.01
0.1
10 s
DC
CURVE BENT TO
MEASURED DATA
1
10
100
500
VDS, DRAIN to SOURCE VOLTAGE (V)
100
10
SINGLE PULSE
RθJA = 138 oC/W
1
TA = 25 oC
0.1
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe
Operating Area
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
1000
Figure 12. Single Pulse Maximum
Power Dissipation
4
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
Typical Characteristics TJ = 25 °C unless otherwise noted
NORMALIZED THERMAL
IMPEDANCE, ZθJA
2
1
0.1
0.01
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
0.001
SINGLE PULSE
o
RθJA = 138 C/W
0.0001 -4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
5
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMS8090 PowerTrench® Symmetrical Dual
Dimensional Outline and Pad Layout
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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As used here in:
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expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I64
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
7
www.fairchildsemi.com
FDMS8090 PowerTrench® Symmetrical Dual
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