BB503C Built in Biasing Circuit MOS FET IC UHF RF Amplifier REJ03G0834-0500 (Previous ADE-208-812C) Rev.5.00 Aug.10.2005 Features • • • • Built in Biasing Circuit; To reduce using parts cost & PC board space. Low noise; NF = 1.8 dB typ. at f = 900 MHz High gain; PG = 22 dB typ. at f = 900 MHz Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; CMPAK-4(SOT-343mod) Outline RENESAS Package code: PTSP0004ZA-A (Package name: CMPAK-4) 2 3 1 4 Notes: 1. Marking is “CS–”. 2. BB503C is individual type number of RENESAS BBFET. Rev.5.00 Aug 10, 2005 page 1 of 10 1. Source 2. Gate1 3. Gate2 4. Drain BB503C Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Symbol VDS VG1S Ratings 6 Unit V +6 –0 V Gate2 to source voltage VG2S V Drain current Channel power dissipation Channel temperature Storage temperature ID Pch Tch Tstg +6 –0 20 100 150 –55 to +150 mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) Min 6 +6 +6 — — 0.5 Typ — — — — — 0.7 Max — — — +100 +100 1.0 Unit V V V nA nA V VG2S(off) 0.5 0.7 1.0 V Drain current ID(op) 7 10 13 mA VDS = 5 V, VG1 = 5 V VG2S = 4 V, RG = 47 kΩ Forward transfer admittance |yfs| 19 24 29 mS Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Ciss Coss Crss PG NF 1.4 0.7 — 17 — 1.7 1.1 0.025 22 1.8 2.0 1.5 0.05 — 2.4 pF pF pF dB dB VDS = 5 V, VG1 = 5 V, VG2S =4 V RG = 47 kΩ, f = 1 kHz VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 47 kΩ f = 1 MHz Gate2 to source cutoff voltage Rev.5.00 Aug 10, 2005 page 2 of 10 Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 IG2 = +10 µA, VG1S = VDS = 0 VG1S = +5 V, VG2S = VDS = 0 VG2S = +5 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 47 kΩ f = 900 MHz BB503C Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 VG1 RG Gate 2 Gate 1 Drain Source A ID Application Circuit VDS = 5 V VAGC = 4 to 0.3 V BBFET Input RG VGG = 5 V Rev.5.00 Aug 10, 2005 page 3 of 10 RFC Output BB503C 900MHz Power Gain, Noise Figure Test Circuit VD VG1 VG2 C6 C4 C5 R1 R2 C3 R3 RFC Output (50Ω) D G2 L3 Input (50Ω) L4 G1 S L1 L2 C1 C1, C2 : C3 : C4 to C6 : R1 : R2 : R3 : C2 Variable Capacitor (10pF MAX) Disk Capacitor (1000pF) Air Capacitor (1000pF) 47 kΩ 47 kΩ 4.7 kΩ L2: L1: 10 3 3 8 10 26 (φ1mm Copper wire) Unit: mm 21 L4: L3: 18 10 10 7 7 29 RFC:φ1mm Copper wire with enamel 4turns inside dia 6mm Rev.5.00 Aug 10, 2005 page 4 of 10 BB503C Typical Output Characteristics 20 200 Drain Current ID (mA) Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 150 100 50 0 50 100 150 16 Drain Current ID (mA) Drain Current ID (mA) 12 4V 3V 8 4 VG2S = 1 V 2 3 2 3 4 5 4V 8 4 VG2S = 1 V 2V 8 3V VG2S = 1 V 4 Gate1 Voltage VG1 (V) Rev.5.00 Aug 10, 2005 page 5 of 10 5 Forward Transfer Admittance |yfs| (mS) 12 3 1 2 3 4 5 Forward Transfer Admittance vs. Gate1 Voltage VDS = 5 V RG = 68 kΩ 2 3V Gate1 Voltage VG1 (V) 20 4 VDS = 5 V RG = 47 kΩ 2V Drain Current vs. Gate1 Voltage Drain Current ID (mA) 1 12 0 5 4 16 Gate1 Voltage VG1 (V) 1 kΩ 47 Ω 68 k kΩ 0 0 1 20 2V 0 kΩ Drain Current vs. Gate1 Voltage 16 16 kΩ Drain to Source Voltage VDS (V) VDS = 5 V RG = 33 kΩ 1 33 4 Drain Current vs. Gate1 Voltage 0 22 RG 8 Ambient Temperature Ta (°C) 20 = 12 0 200 VG2S = 4 V VG1 = VDS 30 24 VDS = 5 V RG = 33 kΩ f = 1 kHz 4V 3V 18 2V 12 6 VG2S = 1 V 0 1 2 3 4 Gate1 Voltage VG1 (V) 5 BB503C Forward Transfer Admittance vs. Gate1 Voltage 30 24 VDS = 5 V RG = 47 kΩ f = 1 kHz 4V 3V 2V 18 12 6 VG2S = 1 V 0 1 2 3 Gate1 Voltage 4 5 Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance vs. Gate1 Voltage 30 VDS = 5 V RG = 68 kΩ 24 f = 1 kHz 6 VG2S = 1 V 0 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 20 50 3 5 VG1 (V) 0 10 100 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 1 20 50 100 Gate Resistance RG (kΩ) Power Gain vs. Drain Current Noise Figure vs. Drain Current 30 4 25 Noise Figure NF (dB) Power Gain PG (dB) 4 2 Gate Resistance RG (kΩ) 20 15 0 0 3 Noise Figure vs. Gate Resistance Noise Figure NF (dB) Power Gain PG (dB) 15 5 2 4 20 10 1 Gate1 Voltage 25 0 10 2V 12 VG1 (V) 30 5 3V 18 Power Gain vs. Gate Resistance 10 4V VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 5 10 15 Drain Current ID (mA) Rev.5.00 Aug 10, 2005 page 6 of 10 20 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 3 2 1 0 0 5 10 15 Drain Current ID (mA) 20 BB503C Power Gain vs. Gate2 to Source Voltage Drain Current vs. Gate Resistance 25 Power Gain PG (dB) Drain Current ID (mA) 20 15 10 VDS = VG1 = 5 V VG2S = 4 V 5 0 10 20 50 20 15 10 VDS = 5 V RG = 47 kΩ f = 900 MHz 5 0 1 100 Noise Figure vs. Gate2 to Source Voltage Input Capacitance vs. Gate2 to Source Voltage 4 VDS = 5 V RG = 47 kΩ f = 900 MHz 4 Input Capacitance Ciss (pF) Noise Figure NF (dB) 5 3 2 1 1 2 4 3 Gate2 to Source Voltage VG2S (V) Gain Reduction vs. Gate2 to Source Voltage 0 Gain Reduction GR (dB) 4 3 Gate2 to Source Voltage VG2S (V) Gate Resistance RG (kΩ) 10 20 30 VDS = VG1 = 5 V VG2S = 4 V RG = 47 kΩ 40 50 2 4 3 2 1 0 Gate2 to Source Voltage VG2S (V) Rev.5.00 Aug 10, 2005 page 7 of 10 3 2 1 0 VDS = 5 V RG = 47 kΩ f = 1 MHz 0 1 2 3 4 Gate2 to Source Voltage VG2S (V) BB503C S21 Parameter vs. Frequency S11 Parameter vs. Frequency .8 1 .6 90° 1.5 Scale: 1 / div. 60° 120° 2 .4 3 30° 150° 4 5 .2 10 .2 0 .4 .6 .8 1 1.5 2 3 45 10 180° 0° –10 –5 –4 –.2 –.4 –30° –150° –3 –2 –.6 –.8 –1 –90° Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 47 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 47 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency 90° –60° –120° –1.5 S22 Parameter vs. Frequency Scale: 0.002 / div. .8 60° 120° 1 .6 1.5 2 .4 3 30° 150° 4 5 .2 10 180° 0° .2 0 .4 .6 .8 1 1.5 2 3 45 10 –10 –5 –4 –.2 –30° –150° –3 –.4 –60° –120° –90° Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 47 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Rev.5.00 Aug 10, 2005 page 8 of 10 –2 –.6 –.8 –1 –1.5 Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 47 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) BB503C S Parameter (VDS = VG1 = 5V, VG2S = 4V, RG = 47kΩ, Zo = 50Ω) f(MHz) S11 S21 S12 S22 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 MAG. 0.975 0.977 0.975 0.972 0.968 0.963 0.954 0.946 0.937 0.930 0.920 0.914 0.902 0.886 0.879 0.873 ANG. –2.6 –6.5 –9.1 –12.4 –15.6 –18.9 –22.2 –25.3 –28.2 –31.5 –34.7 –37.4 –40.4 –43.5 –46.1 –48.9 MAG. 2.37 2.37 2.36 2.33 2.32 2.30 2.28 2.25 2.22 2.19 2.16 2.13 2.09 2.07 2.03 1.99 ANG. 176.1 172.1 168.0 163.8 159.9 156.0 151.8 148.2 144.1 140.2 136.3 132.7 129.3 125.4 122.0 118.3 MAG. 0.00097 0.00162 0.00222 0.00282 0.00388 0.00437 0.00518 0.00567 0.00631 0.00637 0.00720 0.00747 0.00738 0.00758 0.00757 0.00729 ANG. 74.4 89.8 78.2 83.8 81.1 76.0 73.6 75.6 72.5 72.7 70.3 67.0 69.2 68.6 66.0 67.5 MAG. 0.995 0.998 0.997 0.996 0.994 0.993 0.991 0.989 0.986 0.984 0.981 0.978 0.975 0.972 0.968 0.966 ANG. –1.9 –3.9 –5.8 –8.0 –10.0 –11.8 –13.9 –15.8 –17.8 –19.6 –21.6 –23.4 –25.4 –27.3 –29.0 –31.0 850 900 950 1000 0.857 0.845 0.838 0.824 –52.0 –54.5 –57.2 –59.6 1.96 1.93 1.90 1.86 114.9 111.4 108.1 104.9 0.00723 0.00706 0.00659 0.00574 68.8 68.3 67.5 71.0 0.962 0.959 0.954 0.952 –32.9 –34.8 –36.6 –38.5 Rev.5.00 Aug 10, 2005 page 9 of 10 BB503C Package Dimensions JEITA Package Code RENESAS Code SC-82A Package Name PTSP0004ZA-A CMPAK-4(T) / CMPAK-4(T)V D MASS[Typ.] 0.006g A e2 e Q b1 c B B E HE LP Reference Symbol L A A x M L1 S A e2 A2 e l1 b5 S b c A A1 y S b2 A3 b e1 b1 b3 c1 c1 c A-A Section l1 b4 B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 l1 Q Dimension in Millimeters Min 0.8 0 0.8 0.25 0.35 0.1 1.8 1.15 1.8 0.3 0.1 0.2 Nom 0.9 0.25 0.32 0.42 0.3 0.4 0.13 0.11 2.0 1.25 0.65 0.6 2.1 Max 1.1 0.1 1.0 0.4 0.5 0.15 2.2 1.35 2.4 0.7 0.5 0.6 0.05 0.05 0.45 0.55 1.5 0.9 0.2 Ordering Information Part Name BB503CCS-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Aug 10, 2005 page 10 of 10 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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