BB302M Built in Biasing Circuit MOS FET IC VHF RF Amplifier REJ03G0825-0400 (Previous ADE-208-572B) Rev.4.00 Aug.10.2005 Features • Built in Biasing Circuit; To reduce using parts cost & PC board space. • Low noise characteristics; (NF = 1.7 dB typ. at f = 200 MHz) • Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 240V at C=200pF, Rs=0 conditions. • Provide mini mold packages; MPAK-4(SOT-143Rmod) Outline RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4) 2 3 1 4 Notes: 1. Marking is “BW –”. 2. BB302M is individual type number of RENESAS BBFET. Rev.4.00 Aug 10, 2005 page 1 of 9 1. Source 2. Gate1 3. Gate2 4. Drain BB302M Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Symbol VDS VG1S Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Ratings 12 +10 –0 ±10 25 150 150 –55 to +150 VG2S ID Pch Tch Tstg Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Symbol V(BR)DSS V(BR)G1SS Min 12 +10 Typ — — Max — — Unit V V Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 Gate2 to source breakdown voltage Gate1 to source cutoff current V(BR)G2SS IG1SS ±10 — — — — +100 V nA IG2 = ±10 µA, VG1S = VDS = 0 VG1S = +9 V, VG2S = VDS = 0 Gate2 to source cutoff current Gate1 to source cutoff voltage IG2SS VG1S(off) — 0.4 — — ±100 1.0 nA V VG2S = ±9 V, VG1S = VDS = 0 Gate2 to source cutoff voltage VG2S(off) 0.4 — 1.0 V Drain current ID(op) 9 13 18 mA VDS = 9 V, VG1 = 9 V VG2S = 6 V, RG = 120 kΩ Forward transfer admittance |yfs| 15 20 — mS Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Ciss Coss Crss PG NF 2.2 0.8 — 22 — 3.0 1.1 0.017 26 1.7 4.0 1.5 0.04 — 2.2 pF pF pF dB dB VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 120 kΩ, f = 1 kHz VDS = 9 V, VG1 = 9 V VG2S = 6 V, RG = 120 kΩ f = 1 MHz VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 120 kΩ, f = 200 MHz Rev.4.00 Aug 10, 2005 page 2 of 9 VDS = 9 V, VG2S = 6 V ID = 100 µA VDS = 9 V, VG1S = 9 V ID = 100 µA BB302M Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 VG1 RG Gate 2 Gate 1 Drain Source A ID Application Circuit VDS = 9 V VAGC = 6 to 0.3 V BBFET Input RG VGG = 9 V Rev.4.00 Aug 10, 2005 page 3 of 9 RFC Output BB302M Typical Output Characteristics 25 150 100 50 20 10 5 RG = 0 50 100 150 0 200 25 kΩ Drain Current ID (mA) 100 k Ω 120 k Ω 150 k Ω 180 k Ω 200 k Ω 10 5 0 RG = 220 kΩ VDS = VG1 = 9 V 1.2 2.4 3.8 4.8 16 10 6V 5V 4V 8 4 0 6.0 VDS = 9 V RG = 100 kΩ 3V 2V VG2S = 1 V 2 4 6 8 10 Gate1 Voltage VG1 (V) Drain Current vs. Gate1 Voltege Drain Current vs. Gate1 Voltege 20 20 6V 5V 4V 3V 8 2V 4 VG2S = 1 V 2 4 6 Gate1 Voltage VG1 (V) Rev.4.00 Aug 10, 2005 page 4 of 9 8 10 Drain Current ID (mA) VDS = 9 V RG = 120 kΩ 12 0 8 12 Gate2 to Source Voltage VG2S (V) 16 6 20 82 k Ω 15 4 kΩ Drain Current vs. Gate1 Voltage 68 k Ω 56 20 2 270 Drain to Source Voltage VDS (V) Drain Current vs. Gate2 to Source Voltage Drain Current ID (mA) kΩ 0 10 k Ω 0 12 k Ω 0 15 k Ω 180 k Ω 220 15 Ambient Temperature Ta (°C) Drain Current ID (mA) VG2S = 6 V VG1 = V 56 k 68 Ω 82 k Ω k Ω 200 Drain Current ID (mA) Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 16 VDS = 9 V RG = 150 kΩ 6V 5V 4V 12 8 3V 2V 4 0 VG2S = 1 V 2 4 6 Gate1 Voltage VG1 (V) 8 10 BB302M Forward Transfer Admittance vs. Gate1 Voltage 25 6V 5V VDS = 9 V RG = 100 kΩ f = 1 kHz 20 4V 3V 15 10 2V 5 VG2S = 1 V 0 2 4 6 8 10 Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance vs. Gate1 Voltage 25 20 10 2V 5 VG2S = 1 V 0 2 4 6 8 10 Gate1 Voltage VG1 (V) Forward Transfer Admittance vs. Gate1 Voltage Power Gain vs. Gate Resistance 30 25 VDS = 9 V RG = 150 kΩ f = 1 kHz 20 6V 5V 4V 25 Power Gain PG (dB) Forward Transfer Admittance |yfs| (mS) 4V 3V 15 Gate1 Voltage VG1 (V) 3V 15 2V 10 5 VG2S = 1 V 0 2 4 6 8 20 15 10 5 0 10 10 Gate1 Voltage VG1 (V) 50 100 200 500 1000 30 VDS = 9 V VG1 = 9 V VG2S = 6 V f = 200 MHz Power Gain PG (dB) 25 2 1 20 15 10 5 0 10 20 Power Gain vs. Drain Current 4 3 VDS = 9 V VG1 = 9 V VG2S = 6 V f = 200 MHz Gate Resistance RG (kΩ) Noise Figure vs. Gate Resistance Noise Figure NF (dB) 6V 5V VDS = 9 V RG = 120 kΩ f = 1 kHz 20 50 100 200 500 1000 Gate Resistance RG (kΩ) Rev.4.00 Aug 10, 2005 page 5 of 9 0 VDS = 9 V VG1 = 9 V VG2S = 6 V RG = variable f = 200 MHz 5 10 15 20 25 Drain Current ID (mA) 30 BB302M Noise Figure vs. Drain Current Drain Current vs. Gate Resistance 30 VDS = 9 V VG1= 9 V VG2S = 6 V RG = variable f = 200 MHz 3 25 Drain Current ID (mA) Noise Figure NF (dB) 4 2 1 0 5 10 15 20 25 20 15 10 VDS = 9 V 5 VG1 = 9 V VG2S = 6 V 0 10 30 50 100 200 500 1000 Gate Resistance RG (kΩ) Drain Current ID (mA) Gain Reduction vs. Gate2 to Source Voltage Input Capacitance vs. Gate2 to Source Voltage 6 60 VDS = 9 V VG1 = 9 V VG2S = 6 V RG = 120 kΩ f = 200 MHz 50 40 Input Capacitance Ciss (pF) Gain Reduction GR (dB) 20 30 20 10 5 4 3 2 VDS = 9 V VG1 = 9 V RG = 120 kΩ f = 1 MHz 1 0 0 1 2 3 4 5 6 Gate2 to Source Voltage VG2S (V) Rev.4.00 Aug 10, 2005 page 6 of 9 7 1 2 3 4 5 6 Gate2 to Source Voltage VG2S (V) BB302M S21 Parameter vs. Frequency S11 Parameter vs. Frequency .8 1 90° 1.5 .6 Scale: 1 / div. 60° 120° 2 .4 3 30° 150° 4 5 .2 10 .2 0 .4 .6 .8 1 1.5 2 3 45 10 180° 0° −10 −5 −4 −.2 −3 −.4 −30° −150° −2 −.6 −.8 −1 −60° −120° −1.5 −90° Test Condition : VDS = 9 V , VG1 = 9 V VG2S = 6 V , RG = 120 kΩ 50 to 1000 MHz (50 MHz step) Test Condition : VDS = 9 V , VG1 = 9 V VG2S = 6 V , RG = 120 kΩ 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency S22 Parameter vs. Frequency 90° Scale: 0.01 / div. .8 60° 120° 1 .6 1.5 2 .4 3 30° 150° 4 5 .2 10 180° 0° .2 0 .4 .6 .8 1 1.5 2 3 45 10 −10 −5 −4 −.2 −30° −150° −3 −.4 −120° −60° −90° Test Condition : VDS = 9 V , VG1 = 9 V VG2S = 6 V , RG = 120 kΩ 50 to 1000 MHz (50 MHz step) Rev.4.00 Aug 10, 2005 page 7 of 9 −2 −.6 −.8 −1 −1.5 Test Condition : VDS = 9 V , VG1 = 9 V VG2S = 6 V , RG = 120 kΩ 50 to 1000 MHz (50 MHz step) BB302M S Parameter (VDS = VG1 = 9V, VG2S = 6V, RG = 120kΩ, Zo = 50Ω) f(MHz) S11 S21 S12 S22 MAG. ANG. MAG. ANG. MAG. ANG. MAG. ANG. 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 0.988 0.986 0.979 0.964 0.948 0.939 0.920 0.904 0.885 0.864 0.848 0.826 0.808 0.789 0.773 0.755 –5.2 –10.4 –16.0 –21.5 –26.9 –32.0 –37.3 –42.3 –47.1 –51.7 –56.5 –60.9 –65.0 –69.4 –73.7 –77.9 2.13 2.13 2.12 2.08 2.04 2.00 1.95 1.91 1.86 1.81 1.76 1.70 1.66 1.61 1.56 1.51 174.1 167.9 161.6 155.2 149.1 143.0 137.3 131.5 125.7 120.1 115.1 110.1 104.7 100.3 95.4 90.5 0.00052 0.00087 0.00156 0.00226 0.00254 0.00339 0.00335 0.00338 0.00351 0.00347 0.00355 0.00300 0.00289 0.00246 0.00211 0.00166 90.0 72.5 79.4 78.4 71.0 72.0 59.0 66.3 62.2 56.6 61.5 61.4 51.1 57.6 70.0 77.5 0.985 0.993 0.992 0.990 0.987 0.985 0.982 0.978 0.974 0.970 0.966 0.961 0.957 0.952 0.947 0.943 –1.3 –3.6 –5.5 –7.5 –9.6 –11.4 –13.3 –15.3 –17.1 –18.9 –21.0 –22.7 –24.5 –26.6 –28.3 –30.2 850 900 950 1000 0.735 0.721 0.703 0.677 –82.1 –86.3 –90.7 –93.9 1.47 1.42 1.39 1.34 85.9 81.3 76.9 72.4 0.00165 0.00123 0.00176 0.00204 114.5 114.5 145.8 164.0 0.937 0.933 0.927 0.923 –32.2 –34.1 –35.9 –37.9 Rev.4.00 Aug 10, 2005 page 8 of 9 BB302M Package Dimensions JEITA Package Code RENESAS Code SC-61AA Package Name PLSP0004ZA-A MASS[Typ.] MPAK-4 / MPAK-4V D 0.013g A e e2 b1 Q B c B E HE Reference Symbol L A LP L1 A A3 x M S b A e2 A2 e I1 A b5 S b b2 e1 A1 y S b1 b3 c1 c c1 I1 c b4 A-A Section B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q Dimension in Millimeters Min 1.0 0 1.0 0.35 0.55 0.1 2.7 1.35 2.2 0.35 0.15 0.25 Nom 1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8 Max 1.3 0.1 1.2 0.5 0.7 0.15 3.1 1.65 3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.95 1.05 0.3 Ordering Information Part Name BB302MBW-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 Aug 10, 2005 page 9 of 9 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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