3SK300 Silicon N Channel Dual Gate MOS FET UHF / VHF RF Amplifier REJ03G0818-0300 (Previous ADE-208-449A) Rev.3.00 Aug.10.2005 Features • Low noise figure. NF = 1.0 dB typ. at f = 200 MHz • High gain PG = 27.6 dB typ. at f = 200 MHz Outline RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4) 2 3 1 4 Note: Marking is “ZR–“ Rev.3.00 Aug 10, 2005 page 1 of 6 1. Source 2. Gate1 3. Gate2 4. Drain 3SK300 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate 1 to source voltage Gate 2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 14 ±8 ±8 25 150 150 –55 to +150 Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V(BR)DSX Min 14 Typ — Max — Unit V Gate 1 to source breakdown voltage Gate 2 to source breakdown voltage Gate 1 cutoff current Gate 2 cutoff current Drain current V(BR)G1SS V(BR)G2SS IG1SS IG2SS IDS(op) ±8 ±8 — — 4 — — — — 8 — — ±100 ±100 14 V V nA nA mA Gate 1 to source cutoff voltage VG1S(off) 0 +0.2 +1.0 V VDS = 10 V, VG2S = 3 V, ID = 100 µA Gate 2 to source cutoff voltage VG2S(off) 0 +0.3 +1.0 V VDS = 10 V, VG1S = 3 V, ID = 100 µA Forward transfer admittance |yfs| 20 25 — ms Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Power gain Noise figure Noise figure Ciss Coss Crss PG NF PG NF NF 2.4 0.8 — 24 — 12 — — 3.1 1.1 0.021 27.6 1.0 15.6 3.0 2.7 3.5 1.4 0.04 — 1.5 — 4.0 3.5 pF pF pF dB dB dB dB dB VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 1 kHz VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 1 MHz Rev.3.00 Aug 10, 2005 page 2 of 6 Test conditions ID = 200 µA, VG1S = –3 V, VG2S = –3 V IG1 = ±10 µA, VDS = VG2S = 0 IG2 = ±10 µA, VDS = VG1S = 0 VG1S = ±6 V, VDS = VG2S = 0 VG2S = ±6 V, VDS = VG1S = 0 VDS = 6 V, VG1S = 0.75 V, VG2S = 3 V VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 200 MHz VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 900 MHz VDS = 6 V, VG2S = 3 V, ID = 10 mA, f = 60 MHz 3SK300 Main Characteristics Typical Output Characteristics 20 200 Drain current ID (mA) 1.2 V 150 100 50 VG2S = 3 V Pulse test 16 1.0 V 12 0.8 V 8 0.6 V 4 VG1S = 0.4 V 0 50 100 150 200 0 2 4 6 8 10 Ambient Temperature Ta (°C) Drain to source voltage VDS (V) Drain Current vs. Gate1 to Source Voltage Drain Current vs. Gate2 to Source Voltage 20 20 3.0 V VDS = 6 V Pulse test 2.5 V 2.0 V 16 1.5 V 12 1.0 V 8 3.0 V 2.0 V VDS = 6 V Pulse test 2.5 V Drain current ID (mA) Drain current ID (mA) Channel power dissipation Pch (mW) Maximum Channel Power Dissipation Curve 4 16 1.5 V 1.0 V 12 8 4 VG1S = 0.5 V VG2S = 0.5 V 1 2 3 4 5 0 1 2 3 4 5 Gate1 to source voltage VG1S (V) Gate2 to source voltage VG2S (V) Forward Transfer Admittance vs. Gate1 to Source Voltage Power Gain vs. Drain Current 50 30 VDS = 6 V f = 1kHz 3V 2.5 V 18 2V 12 1.5 V 6 VDS = 6 V VG2S = 3V f = 200MHz 40 24 Power gain PG (dB) Forward transfer admittance |yfs| (ms) 0 1V 30 20 10 VG2S = 0.5 V 0 0.4 0.8 1.2 1.6 2 Gate1 to source voltage VG1S (V) Rev.3.00 Aug 10, 2005 page 3 of 6 0 4 8 12 16 Drain current ID (mA) 20 3SK300 Power Gain vs. Drain to Source Voltage Noise Figure vs. Drain Current 5 50 Noise figure NF (dB) 4 Power gain PG (dB) VDS = 6 V VG2S = 3V f = 200MHz 3 2 1 0 4 8 12 16 VG2S = 3V ID = 10mA f = 200MHz 40 30 20 10 0 20 2 5 Power gain PG (dB) Noise figure NF (dB) 10 20 VG2S = 3V ID = 10mA f = 200MHz 4 3 2 1 16 12 8 VDS = 6V VG2S = 3V f = 900MHz 4 2 4 6 8 0 10 Noise Figure vs. Drain Current 4 16 Power gain PG (dB) 20 3 2 VDS = 6V VG2S = 3V f = 900MHz 4 8 12 16 Drain current ID (mA) Rev.3.00 Aug 10, 2005 page 4 of 6 8 12 16 20 Power Gain vs. Drain to Source Voltage 5 1 4 Drain current ID (mA) Drain to source voltage VDS (V) Noise figure NF (dB) 8 Power Gain vs. Drain Current Noise Figure vs. Drain to Source Voltage 0 6 Drain to source voltage VDS (V) Drain current ID (mA) 0 4 20 12 8 VG2S = 3V ID = 10mA f = 900MHz 4 0 2 4 6 8 Drain to source voltage VDS (V) 10 3SK300 Noise Figure vs. Drain Current Noise Figure vs. Drain to Source Voltage 5 VG2S = 3V I D = 10mA f = 900MHz 8 Noise figure NF (dB) Noise figure NF (dB) 10 6 4 2 0 2 4 6 8 10 3 2 5 VG2S = 3V ID = 10mA f = 60MHz 4 3 2 1 2 4 6 8 Drain to source voltage VDS (V) Rev.3.00 Aug 10, 2005 page 5 of 6 0 4 8 12 16 Drain current ID (mA) Noise Figure vs. Drain to Source Voltage Noise figure NF (dB) 4 1 Drain to source voltage VDS (V) 0 VDS = 6V VG2S = 3V f = 60MHz 10 20 3SK300 Package Dimensions JEITA Package Code RENESAS Code SC-61AA Package Name PLSP0004ZA-A MASS[Typ.] MPAK-4 / MPAK-4V D 0.013g A e e2 b1 Q c B B E HE Reference Symbol L A LP L1 A A3 x M S b A e2 A2 e I1 A b5 S b b2 e1 A1 y S b1 b3 c1 c c1 I1 c b4 A-A Section B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q Dimension in Millimeters Min 1.0 0 1.0 0.35 0.55 0.1 2.7 1.35 2.2 0.35 0.15 0.25 Nom 1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8 Max 1.3 0.1 1.2 0.5 0.7 0.15 3.1 1.65 3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.95 1.05 0.3 Ordering Information Part Name 3SK300ZR-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Aug 10, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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