BB502C Built in Biasing Circuit MOS FET IC UHF RF Amplifier REJ03G0832-0600 (Previous ADE-208-810C) Rev.6.00 Apr 27, 2006 Features • • • • Built in Biasing Circuit; To reduce using parts cost & PC board space. Low noise; NF = 1.6 dB typ. at f = 900 MHz High gain; PG = 22 dB typ. at f = 900 MHz Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; CMPAK-4(SOT-343mod) Outline RENESAS Package code: PTSP0004ZA-A (Package name: CMPAK-4) 2 3 1 4 Notes: 1. Marking is “BS–”. 2. BB502C is individual type number of RENESAS BBFET. Rev.6.00 Apr 27, 2006 page 1 of 10 1. Source 2. Gate1 3. Gate2 4. Drain BB502C Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Symbol VDS VG1S Ratings 6 Unit V +6 −0 V Gate2 to source voltage VG2S V Drain current Channel power dissipation Channel temperature Storage temperature ID Pch Tch Tstg +6 −0 20 100 150 –55 to +150 mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) Min 6 +6 +6 — — 0.5 Typ — — — — — 0.7 Max — — — +100 +100 1.0 Unit V V V nA nA V VG2S(off) 0.5 0.7 1.0 V Drain current ID(op) 8 11 14 mA VDS = 5 V, VG1 = 5 V VG2S = 4 V, RG = 180 kΩ Forward transfer admittance |yfs| 20 25 30 mS Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Ciss Coss Crss PG NF 1.4 0.7 — 17 — 1.7 1.1 0.02 22 1.6 2.0 1.5 0.05 — 2.2 pF pF pF dB dB VDS = 5 V, VG1 = 5 V, VG2S =4 V RG = 180 kΩ, f = 1 kHz VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 180 kΩ f = 1 MHz Gate2 to source cutoff voltage Rev.6.00 Apr 27, 2006 page 2 of 10 Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 IG2 = +10 µA, VG1S = VDS = 0 VG1S = +5 V, VG2S = VDS = 0 VG2S = +5 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 180 kΩ f = 900 MHz BB502C Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 VG1 RG Gate 2 Gate 1 Drain Source A ID Application Circuit VDS = 5 V VAGC = 4 to 0.3 V BBFET Input RG VGG = 5 V Rev.6.00 Apr 27, 2006 page 3 of 10 RFC Output BB502C 900MHz Power Gain, Noise Figure Test Circuit VD VG1 VG2 C6 C4 C5 R1 R2 C3 R3 RFC Output (50Ω) D G2 L3 Input (50Ω) L4 G1 S L1 L2 C1 C1, C2 : C3 : C4 to C6 : R1 : R2 : R3 : C2 Variable Capacitor (10pF MAX) Disk Capacitor (1000pF) Air Capacitor (1000pF) 180 kΩ 47 kΩ 4.7 kΩ L2: L1: 10 3 3 8 10 26 (φ1mm Copper wire) Unit: mm 21 L4: L3: 18 10 10 7 7 29 RFC: φ1mm Copper wire with enamel 4turns inside dia 6mm Rev.6.00 Apr 27, 2006 page 4 of 10 BB502C Typical Output Characteristics 20 150 100 50 0 50 100 150 1 2 3 kΩ 4 5 20 Drain Current ID (mA) VDS = 5 V RG = 120 kΩ 3V 8 4 VG2S = 1 V 1 2 3 4 16 VDS = 5 V RG = 180 kΩ 12 4V 3V 8 2V 4 VG2S = 1 V 0 5 1 2 3 4 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Drain Current vs. Gate1 Voltage Forward Transfer Admittance vs. Gate1 Voltage VDS = 5 V RG = 270 kΩ 12 8 3V 4V 2V 4 VG2S = 1 V 1 2 3 4 Gate1 Voltage VG1 (V) Rev.6.00 Apr 27, 2006 page 5 of 10 5 Forward Transfer Admittance |yfs| (mS) Drain Current ID (mA) 330 Drain Current vs. Gate1 Voltage 20 Drain Current ID (mA) 4 Drain Current vs. Gate1 Voltage 2V 0 8 Drain to Source Voltage VDS (V) 4V 16 kΩ 0 18 k Ω 0 22 Ω 0k 7 2 Ambient Temperature Ta (°C) 12 0 12 0 200 20 16 16 VG2S = 4 V VG1 = VDS R G = 15 12 0 0 kΩ kΩ 200 Drain Current ID (mA) Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 5 30 VDS = 5 V RG = 120 kΩ 24 f = 1 kHz 4V 3V 18 2V 12 6 VG2S = 1 V 0 1 2 3 4 Gate1 Voltage VG1 (V) 5 BB502C Forward Transfer Admittance vs. Gate1 Voltage 30 24 VDS = 5 V RG = 180 kΩ f = 1 kHz 4V 3V 18 2V 12 6 VG2S = 1 V 0 1 2 3 4 5 Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance vs. Gate1 Voltage 30 VDS = 5 V RG = 270 kΩ f = 1 kHz 24 18 12 6 VG2S = 1 V 0 Gate1 Voltage VG1 (V) 2 3 4 5 Noise Figure vs. Gate Resistance 30 4 25 Noise Figure NF (dB) Power Gain PG (dB) 1 Gate1 Voltage VG1 (V) Power Gain vs. Gate Resistance 20 15 10 4V 3V VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 3 2 1 5 0 100 500 200 0 100 1000 Gate Resistance RG (kΩ) 4 Noise Figure NF (dB) Power Gain PG (dB) 25 20 15 0 0 1000 Noise Figure vs. Drain Current 30 5 500 Gate Resistance RG (kΩ) Power Gain vs. Drain Current 10 200 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 5 10 15 Drain Current ID (mA) Rev.6.00 Apr 27, 2006 page 6 of 10 20 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 3 2 1 0 0 5 10 15 Drain Current ID (mA) 20 BB502C Power Gain vs. Gate2 to Source Voltage Drain Current vs. Gate Resistance 25 VDS = VG1 = 5 V VG2S = 4 V 15 Power Gain PG (dB) Drain Current ID (mA) 20 10 5 0 100 500 200 VDS = 5 V RG = 180 kΩ f = 900 MHz 5 2 4 3 Gate2 to Source Voltage VG2S (V) Noise Figure vs. Gate2 to Source Voltage Input Capacitance vs. Gate2 to Source Voltage 4 VDS = 5 V RG = 180 kΩ f = 900 MHz 4 Input Capacitance Ciss (pF) Noise Figure NF (dB) 10 Gate Resistance RG (kΩ) 3 2 1 1 2 4 3 Gate2 to Source Voltage VG2S (V) Gain Reduction vs. Gate2 to Source Voltage 0 Gain Reduction GR (dB) 15 0 1 1000 5 10 20 30 VDS = VG1 = 5 V VG2S = 4 V RG = 180 kΩ 40 50 20 4 3 2 1 0 Gate2 to Source Voltage VG2S (V) Rev.6.00 Apr 27, 2006 page 7 of 10 3 2 VDS = 5 V RG = 180 kΩ f = 1 MHz 1 0 0 1 2 3 4 Gate2 to Source Voltage VG2S (V) BB502C S11 Parameter vs. Frequency .8 1 S21 Parameter vs. Frequency 90° 1.5 .6 2 Scale: 1 / div. 60° 120° .4 3 4 5 .2 30° 150° 10 .2 0 .4 .6 .8 1 1.5 2 3 45 10 180° 0° –10 –5 –4 –.2 –.4 –30° –150° –3 –2 –.6 –.8 –1 –60° –120° –1.5 –90° Test Condition; VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency S22 Parameter vs. Frequency 90° Scale: 0.002 / div. .8 60° 120° 1 .6 1.5 2 .4 3 30° 150° 4 5 .2 10 180° 0° .2 0 .4 .6 .8 1 1.5 2 3 45 10 –10 –5 –4 –.2 –30° –150° –3 –.4 –60° –120° –90° Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Rev.6.00 Apr 27, 2006 page 8 of 10 –2 –.6 –.8 –1 –1.5 Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) BB502C S Parameter (VDS = VG1 = 5V, VG2S = 4V, RG = 180kΩ, Zo = 50Ω) S11 f(MHz) S21 S12 S22 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 MAG. 0.994 0.994 0.991 0.985 0.985 0.975 0.969 0.962 0.954 0.945 0.935 0.925 0.918 0.909 0.898 0.887 ANG. –2.8 –5.7 –9.2 –12.5 –15.5 –18.7 –22.0 –24.9 –27.7 –30.8 –33.8 –36.6 –39.5 –42.5 –45.0 –47.8 MAG. 2.52 2.51 2.50 2.47 2.46 2.43 2.40 2.38 2.35 2.31 2.28 2.25 2.21 2.18 2.14 2.09 ANG. 176.2 172.4 168.1 164.1 160.0 156.4 152.3 148.6 144.6 141.0 136.7 133.4 130.3 126.1 122.9 119.5 MAG. 0.00072 0.00161 0.00230 0.00297 0.00374 0.00436 0.00507 0.00557 0.00625 0.00663 0.00721 0.00747 0.00761 0.00807 0.00828 0.00801 ANG. 88.6 80.9 86.6 78.0 78.9 80.6 70.9 77.3 72.4 70.0 70.5 68.4 65.6 65.6 67.6 65.1 MAG. 0.995 0.998 0.997 0.996 0.994 0.992 0.990 0.989 0.987 0.984 0.981 0.978 0.975 0.972 0.969 0.965 ANG. –2.2 –4.0 –6.2 –8.2 –10.2 –12.2 –14.2 –16.3 –18.5 –20.4 –22.4 –24.3 –26.4 –28.3 –30.2 –32.2 850 900 950 1000 0.874 0.862 0.855 0.845 –50.6 –53.0 –55.5 –58.1 2.07 2.03 1.99 1.95 116.0 112.7 109.4 108.1 0.00815 0.00832 0.00738 0.00802 63.6 65.1 61.8 65.8 0.961 0.958 0.954 0.951 –34.2 –36.1 –37.9 –39.8 Rev.6.00 Apr 27, 2006 page 9 of 10 BB502C Package Dimensions Package Name CMPAK-4 JEITA Package Code SC-82A RENESAS Code PTSP0004ZA-A D e2 Previous Code CMPAK-4(T) / CMPAK-4(T)V MASS[Typ.] 0.006g A e Q b1 c B B E HE LP Reference Symbol L A A x M L1 S A e2 A2 e l1 b5 S b c A A1 y S b2 A3 b e1 b1 b3 c1 c1 c A-A Section l1 b4 B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 l1 Q Dimension in Millimeters Min 0.8 0 0.8 0.25 0.35 0.1 1.8 1.15 1.8 0.3 0.1 0.2 Nom 0.9 0.25 0.32 0.42 0.3 0.4 0.13 0.11 2.0 1.25 0.65 0.6 2.1 Max 1.1 0.1 1.0 0.4 0.5 0.15 2.2 1.35 2.4 0.7 0.5 0.6 0.05 0.05 0.45 0.55 1.5 0.9 0.2 Ordering Information Part Name BB502CBS-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.6.00 Apr 27, 2006 page 10 of 10 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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