LQFP A JCET Company Low Profile Quad Flat Pack: LQFP, LQFP-ep HIGHLIGHTS • 7 x 7mm to 28 x 28mm body sizes • 32 to 208 lead counts • Lead pitch range from 0.80mm to 0.40mm FEATURES • Body Sizes: 7 x 7mm to 28 x 28mm • Package Height: 1.4mm • Lead Counts: 32L to 208L • Lead Pitch: 0.80mm to 0.40mm • Available in gold or copper wirebond versions • Wide range of open tool leadframe and die pad sizes available DESCRIPTION • Moisture Sensitivity: JEDEC Level 3 • JEDEC standard compliant • Lead-free, Green and Low Alpha materials sets available APPLICATIONS STATS ChipPAC also offers the LQFP in an Exposed Pad configuration (LQFP-ep). This is a thermally enhanced version of the LQFP package. Thermal enhancement is achieved by means of an exposed die pad, which can be soldered to a mother PC board for effective heat removal and grounding, if needed. This enhanced thermal package is made possible by a deep downset die pad leadframe design. • 3D Graphics • Multimedia • PC Chipsets • Video / Audio • Telecom • Disc Drives • Communication Boards (Ethernet, ISDN) www.cj-elec.com STATS ChipPAC’s LQFP is a low profile (1.4mm) version of the QFP. The LQFP is a leadframe based, plastic encapsulated package with gull wing shaped leads on four sides. The LQFP offers pin counts up to 208, and is suitable for designs with high I/Os while meeting low profile requirements. They are used for mainstream cost sensitive applications. www.statschippac.com LQFP A JCET Company Low Profile Quad Flat Pack: LQFP, LQFP-ep SPECIFICATIONS RELIABILITY Die Thickness Wire Lead Finish Marking Packing Options Moisture Sensitivity Level Temperature Cycling High Temperature Storage Pressure Cooker Test Liquid Thermal Shock (opt) 280-430µm (11-17mils) range preferred Gold: 18 -30µm (0.7-1.2mils) diameter Copper: 18 -30µm (0.7-1.2mils) diameter Contact STATS ChipPAC for availability Matte Tin Laser JEDEC tray / tape and reel JEDEC Level 3 -65°C/150°C, 1000 cycles 150°C, 500 hrs 121°C 100% RH, 2 atm, 168 hrs -55°C/125°C, 1000 cycles LQFP THERMAL PERFORMANCE, θja (°C/W) Package 48L 100L 208L Body Size (mm) 7 x 7 x 1.4 14 x 14 x 1.4 28 x 28 x 1.4 Die Size (mm) Thermal Performance, θja (°C/W) 3.8 x 3.8 50.0 7.8 x 7.8 37.2 7.8 x 7.8 32.1 Pad Size (mm) 5.3 x 5.3 9.0 x 9.0 9.0 x 9.0 Note: Simulation data for package mounted on 4 layer PCB (per JEDEC JESD51-7) under natural convection as defined in JESD51-2. LQFP-ep THERMAL PERFORMANCE, θja (°C/W) Package 48L 64L 80L Body Size (mm) 7 x 7 x 1.0 10 x 10 x 1.0 12 x 12 x 1.0 Pad Size (mm) 5.5 x 5.5 6.5 x 6.5 7.2 x 7.2 Die Size (mm) 5.3 x 5.3 6.0 x 6.0 6.0 x 6.0 PCB Vias 25 36 36 Thermal Performance, θja (°C/W) 26.9 24.0 23.0 Note: Simulation data for package mounted on 4 layer PCB (per JEDEC JESD51-7) under natural convection as defined in JESD51-2. Based on TQFP-ep simulations. ELECTRICAL PERFORMANCE Electrical parasitic data is highly dependent on the package layout. 3D electrical simulation can be used on the specific package design to provide the best prediction of electrical behavior. Data below is for a frequency of 100MHz and assumes 1.0 mil gold bonding wire. onductor C Length Component (mm) Wire 2 Lead (7 x 7mm, 32L) 1.4 - 2.2 Total (7 x 7mm, 32L) Wire 2 Lead (14 x 14mm, 128L) 3.0 - 4.5 Total (14 x 14mm, 128L) Resistance (mOhms) 120 11.0 - 18.0 131 - 138 120 24.0 - 36.0 144.0 - 156.0 Inductance (nH) 1.65 0.64 - 0.99 2.29 - 2.64 1.65 1.96 - 2.92 3.61 - 4.57 CROSS-SECTION Inductance Mutual (nH) 0.45 - 0.85 0.31 - 0.49 0.76 - 1.34 0.45 - 0.85 1.08 - 1.61 1.53 - 2.46 Package Size (mm) Lead Count LQFP 7 x 7 32, 48, 64 10 x 10 44, 64, 80 14 x 14 64, 80, 100, 120 20 x 20 144, 176 24 x 24 176 28 x 28 208 LQFP-ep 10 x 10 64 14 x 14 64, 80, 100 20 x 20 144, 176 24 x 24 176 NOTE: Other LQFP-ep packages available with tooling up in an exposed pad leadframe design. LQFP-ep Global Offices Capacitance Mutual (pF) 0.01 - 0.02 0.07 - 0.12 0.08 - 0.14 0.01 - 0.02 0.20 - 0.30 0.21 - 0.32 PACKAGE CONFIGURATIONS LQFP Corporate Office Capacitance (pF) 0.10 0.21 - 0.33 0.31 - 0.43 0.10 0.45 - 0.67 0.55 - 0.77 10 Ang Mo Kio St. 65, #04-08/09 Techpoint, Singapore 569059 Tel: 65-6824-7777 Fax: 65-6720-7823 USA 510-979-8000 CHINA 86-21-5976-5858 KOREA 82-32-340-3114 SWITZERLAND 41-21-8047-200 The STATS ChipPAC logo is a registered trademark of STATS ChipPAC Pte. Ltd. Trademark registered in United States. Singapore company registration number 199407932D. All other product names and other company names herein are for identification purposes only and may be the trademarks or registered trademarks of their respective owners. STATS ChipPAC disclaims any and all rights in those marks. STATS ChipPAC makes no guarantee or warranty of its accuracy in the information given, or that the use of such information will not infringe on intellectual rights of third parties. Under no circumstances shall STATS ChipPAC be liable for any damages whatsoever arising out of the use of, or inability to use the materials in this document. STATS ChipPAC reserves the right to change the information at any time and without notice. ©Copyright 2016. STATS ChipPAC Pte. Ltd. All rights reserved. Apr 2016